SG11202005645RA - Robust quantum logical gates - Google Patents

Robust quantum logical gates

Info

Publication number
SG11202005645RA
SG11202005645RA SG11202005645RA SG11202005645RA SG11202005645RA SG 11202005645R A SG11202005645R A SG 11202005645RA SG 11202005645R A SG11202005645R A SG 11202005645RA SG 11202005645R A SG11202005645R A SG 11202005645RA SG 11202005645R A SG11202005645R A SG 11202005645RA
Authority
SG
Singapore
Prior art keywords
logical gates
robust quantum
quantum logical
robust
gates
Prior art date
Application number
SG11202005645RA
Inventor
Liang Jiang
Steven Girvin
Brian Lester
Yvonne Gao
Robert Schoelkopf
Original Assignee
Univ Yale
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univ Yale filed Critical Univ Yale
Publication of SG11202005645RA publication Critical patent/SG11202005645RA/en

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/10Junction-based devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/20Models of quantum computing, e.g. quantum circuits or universal quantum computers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P5/00Coupling devices of the waveguide type
    • H01P5/12Coupling devices having more than two ports
    • H01P5/16Conjugate devices, i.e. devices having at least one port decoupled from one other port
    • H01P5/18Conjugate devices, i.e. devices having at least one port decoupled from one other port consisting of two coupled guides, e.g. directional couplers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/40Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/70Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N99/00Subject matter not provided for in other groups of this subclass
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/195Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/10Junction-based devices
    • H10N60/12Josephson-effect devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Data Mining & Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Evolutionary Computation (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computational Mathematics (AREA)
  • Artificial Intelligence (AREA)
  • Computer Hardware Design (AREA)
  • Optical Modulation, Optical Deflection, Nonlinear Optics, Optical Demodulation, Optical Logic Elements (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Lasers (AREA)
SG11202005645RA 2018-01-05 2019-01-05 Robust quantum logical gates SG11202005645RA (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201862613937P 2018-01-05 2018-01-05
US201862733326P 2018-09-19 2018-09-19
PCT/US2019/012440 WO2019156759A2 (en) 2018-01-05 2019-01-05 Robust quantum logical gates

Publications (1)

Publication Number Publication Date
SG11202005645RA true SG11202005645RA (en) 2020-07-29

Family

ID=67548387

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11202005645RA SG11202005645RA (en) 2018-01-05 2019-01-05 Robust quantum logical gates

Country Status (8)

Country Link
US (1) US11451231B2 (en)
EP (1) EP3735710A4 (en)
JP (1) JP7372681B2 (en)
KR (1) KR20200104374A (en)
CN (1) CN111542935B (en)
CA (1) CA3085954A1 (en)
SG (1) SG11202005645RA (en)
WO (1) WO2019156759A2 (en)

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US11923870B2 (en) * 2020-10-27 2024-03-05 National Applied Research Laboratories Method for constructing a fault tolerant encode using a quantum computational model
CN113012066B (en) * 2021-03-15 2022-06-17 中南大学 Quantum line learning method and image blurring method based on parametric vitreous color sampling
CN116562384B (en) * 2023-07-10 2023-09-12 合肥硅臻芯片技术有限公司 Fredkin quantum logic gate
CN118348690B (en) * 2024-06-17 2024-08-30 合肥国家实验室 Non-dissipative virtual time evolution method, interference device and quantum cooling device

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Also Published As

Publication number Publication date
JP7372681B2 (en) 2023-11-01
CA3085954A1 (en) 2019-08-15
KR20200104374A (en) 2020-09-03
CN111542935B (en) 2024-01-26
EP3735710A4 (en) 2021-09-15
WO2019156759A3 (en) 2019-09-26
EP3735710A2 (en) 2020-11-11
CN111542935A (en) 2020-08-14
JP2021509771A (en) 2021-04-01
US11451231B2 (en) 2022-09-20
US20200412369A1 (en) 2020-12-31
WO2019156759A2 (en) 2019-08-15

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