Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro

Tutorial of a HW design of MicroBlaze using DDR3 RAM on Arty A7 board; DDR3 RAM speed test application

This repository contains the hardware design source files of the Hex Five X300 RISC-V SoC. The X300 is Hex Five's official reference HW platform for its MultiZone Trusted Execution Environment and MultiZone Trusted Firmware. The X300 is an enhanced secure version of the SiFive's Freedom E300 built around the Rocket chip developed at U.C. Berkeley.

Innervator: Hardware Acceleration for Neural Networks

Library containing various VHDL IPs

A small FPGA and APSoC project of different implementations for testing byte-by-byte a serial flash. Refresh of fpga-serial-mem-tester-1 and -2.

A small FPGA and APSoC project of different implementations for testing Measurement and Activity Events of a SPI accelerometer. Refresh of fpga-serial-acl-tester-1 and -2.

In this project I wanted to implement a microprocessor on an FPGA with the ability to write files onto an SD card (micro SD in particular) exploiting the Arty A7 development board and the Digilent PModSD.

Vivado demonstrator projects for IPs in IpLibrary repo.

A small FPGA project of different implementations for testing Temperature and Relative Humidity readings of a IIC sensor

A small FPGA and APSoC project of different implementations for testing Temperature and Relative Humidity readings of a IIC sensor

A small FPGA and APSoC project of multiple implementation for testing and comparing color mixing between discrete RGB LEDs and an OLED RGB display

Implementation of a sampler using the XADC mounted on the Arty A7-35T development board and the PmodAD1 by Digilent (AD7476A).

Implementation of a particle detector using a cheap FPGA developement board. The FPGA exploits some ADCs and then if there are coincidences in the signals, the event is recorded.

Personal revision of the tutorial "Getting started with Vivado and Vitis for Baremetal system" by Digilent.