TW328615B - MOSFET device and method of controlling dopant diffusion and metal contamination in thin polycide gate conductor - Google Patents
MOSFET device and method of controlling dopant diffusion and metal contamination in thin polycide gate conductorInfo
- Publication number
- TW328615B TW328615B TW086107092A TW86107092A TW328615B TW 328615 B TW328615 B TW 328615B TW 086107092 A TW086107092 A TW 086107092A TW 86107092 A TW86107092 A TW 86107092A TW 328615 B TW328615 B TW 328615B
- Authority
- TW
- Taiwan
- Prior art keywords
- well
- mosfet device
- layer
- thin
- gate conductor
- Prior art date
Links
- 239000002019 doping agent Substances 0.000 title abstract 3
- 239000004020 conductor Substances 0.000 title 1
- 238000011109 contamination Methods 0.000 title 1
- 238000009792 diffusion process Methods 0.000 title 1
- 239000002184 metal Substances 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 230000004888 barrier function Effects 0.000 abstract 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 2
- 229920005591 polysilicon Polymers 0.000 abstract 2
- 238000002955 isolation Methods 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
- 229910052721 tungsten Inorganic materials 0.000 abstract 1
- 239000010937 tungsten Substances 0.000 abstract 1
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 abstract 1
- -1 tungsten nitride Chemical class 0.000 abstract 1
- 229910021342 tungsten silicide Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
- H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
- H01L21/28061—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
- H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
- H01L29/4941—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a barrier layer between the silicon and the metal or metal silicide upper layer, e.g. Silicide/TiN/Polysilicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4983—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET with a lateral structure, e.g. a Polysilicon gate with a lateral doping variation or with a lateral composition variation or characterised by the sidewalls being composed of conductive, resistive or dielectric material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/6656—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using multiple spacer layers, e.g. multiple sidewall spacers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/916—Narrow band gap semiconductor material, <<1ev
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/741,159 US5923999A (en) | 1996-10-29 | 1996-10-29 | Method of controlling dopant diffusion and metal contamination in thin polycide gate conductor of mosfet device |
Publications (1)
Publication Number | Publication Date |
---|---|
TW328615B true TW328615B (en) | 1998-03-21 |
Family
ID=24979635
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW086107092A TW328615B (en) | 1996-10-29 | 1997-05-26 | MOSFET device and method of controlling dopant diffusion and metal contamination in thin polycide gate conductor |
Country Status (5)
Country | Link |
---|---|
US (2) | US5923999A (zh) |
JP (1) | JP3557334B2 (zh) |
KR (1) | KR19980032299A (zh) |
SG (1) | SG68635A1 (zh) |
TW (1) | TW328615B (zh) |
Families Citing this family (60)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3635843B2 (ja) | 1997-02-25 | 2005-04-06 | 東京エレクトロン株式会社 | 膜積層構造及びその形成方法 |
US6103609A (en) * | 1997-12-11 | 2000-08-15 | Lg Semicon Co., Ltd. | Method for fabricating semiconductor device |
US6274292B1 (en) | 1998-02-25 | 2001-08-14 | Micron Technology, Inc. | Semiconductor processing methods |
US7804115B2 (en) | 1998-02-25 | 2010-09-28 | Micron Technology, Inc. | Semiconductor constructions having antireflective portions |
JPH11307604A (ja) | 1998-04-17 | 1999-11-05 | Toshiba Corp | プロセスモニタ方法及びプロセス装置 |
TW374227B (en) * | 1998-04-18 | 1999-11-11 | United Microelectronics Corp | Method for manufacturing a metal-oxide semiconductor transistor of a metal gate |
TW379374B (en) * | 1998-06-19 | 2000-01-11 | Siemens Ag | Method to improve thermal stability of tungsten silicide |
US6027961A (en) * | 1998-06-30 | 2000-02-22 | Motorola, Inc. | CMOS semiconductor devices and method of formation |
KR100530149B1 (ko) * | 1998-06-30 | 2006-02-03 | 주식회사 하이닉스반도체 | 반도체 소자의 게이트 전극 제조 방법 |
US6208004B1 (en) * | 1998-08-19 | 2001-03-27 | Philips Semiconductor, Inc. | Semiconductor device with high-temperature-stable gate electrode for sub-micron applications and fabrication thereof |
KR100433509B1 (ko) * | 1998-08-21 | 2004-05-31 | 미크론 테크놀로지,인코포레이티드 | 전계 효과 트랜지스터, 집적 회로, 전계 효과 트랜지스터 형성 방법, 그리고 집적 회로 형성 방법 |
US6268282B1 (en) * | 1998-09-03 | 2001-07-31 | Micron Technology, Inc. | Semiconductor processing methods of forming and utilizing antireflective material layers, and methods of forming transistor gate stacks |
US6060741A (en) * | 1998-09-16 | 2000-05-09 | Advanced Micro Devices, Inc. | Stacked gate structure for flash memory application |
KR100291513B1 (ko) * | 1998-12-22 | 2001-07-12 | 박종섭 | 반도체 소자의 제조방법 |
KR20000043197A (ko) * | 1998-12-28 | 2000-07-15 | 김영환 | 반도체소자의 게이트전극 형성방법 |
KR100367398B1 (ko) * | 1998-12-30 | 2003-02-20 | 주식회사 하이닉스반도체 | 금속 게이트전극 형성방법 |
US6313021B1 (en) * | 1999-01-15 | 2001-11-06 | Agere Systems Guardian Corp. | PMOS device having a layered silicon gate for improved silicide integrity and enhanced boron penetration resistance |
US7235499B1 (en) | 1999-01-20 | 2007-06-26 | Micron Technology, Inc. | Semiconductor processing methods |
JP3059150B1 (ja) | 1999-02-02 | 2000-07-04 | 沖電気工業株式会社 | ゲ―ト電極構造及びその製造方法 |
KR100773280B1 (ko) * | 1999-02-17 | 2007-11-05 | 가부시키가이샤 알박 | 배리어막제조방법및배리어막 |
US6291363B1 (en) * | 1999-03-01 | 2001-09-18 | Micron Technology, Inc. | Surface treatment of DARC films to reduce defects in subsequent cap layers |
KR100313943B1 (ko) * | 1999-04-22 | 2001-11-15 | 김영환 | 반도체 소자의 게이트 전극 형성 방법 |
KR100548538B1 (ko) * | 1999-06-28 | 2006-02-02 | 주식회사 하이닉스반도체 | 반도체 소자의 게이트 형성방법 |
JP2001035808A (ja) * | 1999-07-22 | 2001-02-09 | Semiconductor Energy Lab Co Ltd | 配線およびその作製方法、この配線を備えた半導体装置、ドライエッチング方法 |
JP2001102580A (ja) * | 1999-09-30 | 2001-04-13 | Nec Corp | 半導体装置及びその製造方法 |
JP2001203347A (ja) | 2000-01-18 | 2001-07-27 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
US6440860B1 (en) * | 2000-01-18 | 2002-08-27 | Micron Technology, Inc. | Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride |
US6294433B1 (en) * | 2000-02-09 | 2001-09-25 | Advanced Micro Devices, Inc. | Gate re-masking for deeper source/drain co-implantation processes |
KR100357225B1 (ko) * | 2000-02-29 | 2002-10-19 | 주식회사 하이닉스반도체 | 반도체 소자의 배선 제조방법 |
US6274484B1 (en) | 2000-03-17 | 2001-08-14 | Taiwan Semiconductor Manufacturing Company | Fabrication process for low resistivity tungsten layer with good adhesion to insulator layers |
TWI286338B (en) * | 2000-05-12 | 2007-09-01 | Semiconductor Energy Lab | Semiconductor device and manufacturing method thereof |
TW480576B (en) * | 2000-05-12 | 2002-03-21 | Semiconductor Energy Lab | Semiconductor device and method for manufacturing same |
US7253076B1 (en) * | 2000-06-08 | 2007-08-07 | Micron Technologies, Inc. | Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers |
KR100632618B1 (ko) * | 2000-06-30 | 2006-10-09 | 주식회사 하이닉스반도체 | 반도체 소자의 게이트 전극 형성 방법 |
US6774442B2 (en) * | 2000-07-21 | 2004-08-10 | Renesas Technology Corp. | Semiconductor device and CMOS transistor |
TW463341B (en) * | 2000-08-01 | 2001-11-11 | United Microelectronics Corp | Multi-level covering layer structure suitable for a silicide process |
JP2002093743A (ja) * | 2000-09-11 | 2002-03-29 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
KR100351907B1 (ko) * | 2000-11-17 | 2002-09-12 | 주식회사 하이닉스반도체 | 반도체 소자의 게이트 전극 형성방법 |
KR100393964B1 (ko) * | 2000-12-18 | 2003-08-06 | 주식회사 하이닉스반도체 | 에스램 소자의 게이트 형성 방법 |
US6734510B2 (en) * | 2001-03-15 | 2004-05-11 | Micron Technology, Ing. | Technique to mitigate short channel effects with vertical gate transistor with different gate materials |
US20050145959A1 (en) * | 2001-03-15 | 2005-07-07 | Leonard Forbes | Technique to mitigate short channel effects with vertical gate transistor with different gate materials |
US6518106B2 (en) * | 2001-05-26 | 2003-02-11 | Motorola, Inc. | Semiconductor device and a method therefor |
KR100709461B1 (ko) * | 2001-06-29 | 2007-04-18 | 주식회사 하이닉스반도체 | 텅스텐 게이트 형성 방법 |
JP2003045874A (ja) | 2001-07-27 | 2003-02-14 | Semiconductor Energy Lab Co Ltd | 金属配線およびその作製方法、並びに金属配線基板およびその作製方法 |
US20030040171A1 (en) * | 2001-08-22 | 2003-02-27 | Weimer Ronald A. | Method of composite gate formation |
JP3753994B2 (ja) * | 2002-03-11 | 2006-03-08 | 松下電器産業株式会社 | 半導体装置の製造方法 |
US6617176B1 (en) * | 2002-05-21 | 2003-09-09 | Advanced Micro Devices, Inc. | Method of determining barrier layer effectiveness for preventing metallization diffusion by forming a test specimen device and using a metal penetration measurement technique for fabricating a production semiconductor device and a test specimen device thereby formed |
US6831008B2 (en) * | 2002-09-30 | 2004-12-14 | Texas Instruments Incorporated | Nickel silicide—silicon nitride adhesion through surface passivation |
US7009291B2 (en) * | 2002-12-25 | 2006-03-07 | Denso Corporation | Semiconductor module and semiconductor device |
US6734089B1 (en) * | 2003-01-16 | 2004-05-11 | Micron Technology Inc | Techniques for improving wordline fabrication of a memory device |
TWI312536B (en) * | 2003-07-23 | 2009-07-21 | Nanya Technology Corporatio | Method for fabricating semiconductor device having stack-gate structure |
KR100525615B1 (ko) * | 2003-09-23 | 2005-11-02 | 삼성전자주식회사 | 고내압 전계효과 트랜지스터 및 이를 형성하는 방법 |
US20060110913A1 (en) * | 2004-11-24 | 2006-05-25 | Haiwei Xin | Gate structure having diffusion barrier layer |
KR100689884B1 (ko) * | 2005-02-15 | 2007-03-09 | 삼성전자주식회사 | 쇼트키 다이오드를 이용한 노이즈 제거를 위한 반도체 소자및 그 제조방법 |
US7439176B2 (en) * | 2005-04-04 | 2008-10-21 | Samsung Electronics Co., Ltd. | Semiconductor device multilayer structure, fabrication method for the same, semiconductor device having the same, and semiconductor device fabrication method |
JP2008311457A (ja) * | 2007-06-15 | 2008-12-25 | Renesas Technology Corp | 半導体装置の製造方法 |
US8847300B2 (en) * | 2009-05-08 | 2014-09-30 | SK Hynix Inc. | Semiconductor device and method for fabricating the same |
US8124515B2 (en) * | 2009-05-20 | 2012-02-28 | Globalfoundries Inc. | Gate etch optimization through silicon dopant profile change |
US9129945B2 (en) * | 2010-03-24 | 2015-09-08 | Applied Materials, Inc. | Formation of liner and barrier for tungsten as gate electrode and as contact plug to reduce resistance and enhance device performance |
US8836048B2 (en) | 2012-10-17 | 2014-09-16 | International Business Machines Corporation | Field effect transistor device having a hybrid metal gate stack |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4920071A (en) * | 1985-03-15 | 1990-04-24 | Fairchild Camera And Instrument Corporation | High temperature interconnect system for an integrated circuit |
JP2577342B2 (ja) * | 1985-03-30 | 1997-01-29 | 株式会社東芝 | 半導体装置およびその製造方法 |
US5164333A (en) * | 1990-06-19 | 1992-11-17 | Siemens Aktiengesellschaft | Method for manufacturing a multi-layer gate electrode for a mos transistor |
EP0517368B1 (en) * | 1991-05-03 | 1998-09-16 | STMicroelectronics, Inc. | Local interconnect for integrated circuits |
KR960009995B1 (ko) * | 1992-07-31 | 1996-07-25 | 삼성전자 주식회사 | 반도체 장치의 제조 방법 및 그 구조 |
US5365111A (en) * | 1992-12-23 | 1994-11-15 | Advanced Micro Devices, Inc. | Stable local interconnect/active area silicide structure for VLSI applications |
US5364803A (en) * | 1993-06-24 | 1994-11-15 | United Microelectronics Corporation | Method of preventing fluorine-induced gate oxide degradation in WSix polycide structure |
US5439831A (en) * | 1994-03-09 | 1995-08-08 | Siemens Aktiengesellschaft | Low junction leakage MOSFETs |
US5576579A (en) * | 1995-01-12 | 1996-11-19 | International Business Machines Corporation | Tasin oxygen diffusion barrier in multilayer structures |
US5656519A (en) * | 1995-02-14 | 1997-08-12 | Nec Corporation | Method for manufacturing salicide semiconductor device |
US5543362A (en) * | 1995-03-28 | 1996-08-06 | Motorola, Inc. | Process for fabricating refractory-metal silicide layers in a semiconductor device |
US5604140A (en) * | 1995-05-22 | 1997-02-18 | Lg Semicon, Co. Ltd. | Method for forming fine titanium nitride film and method for fabricating semiconductor element using the same |
US5733816A (en) * | 1995-12-13 | 1998-03-31 | Micron Technology, Inc. | Method for depositing a tungsten layer on silicon |
US5736455A (en) * | 1995-12-22 | 1998-04-07 | Micron Technology, Inc. | Method for passivating the sidewalls of a tungsten word line |
-
1996
- 1996-10-29 US US08/741,159 patent/US5923999A/en not_active Expired - Lifetime
-
1997
- 1997-05-26 TW TW086107092A patent/TW328615B/zh not_active IP Right Cessation
- 1997-08-21 KR KR1019970039856A patent/KR19980032299A/ko not_active Application Discontinuation
- 1997-09-25 SG SG1997003565A patent/SG68635A1/en unknown
- 1997-10-27 JP JP29370597A patent/JP3557334B2/ja not_active Expired - Fee Related
-
1999
- 1999-07-12 US US09/351,808 patent/US6114736A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US6114736A (en) | 2000-09-05 |
JP3557334B2 (ja) | 2004-08-25 |
SG68635A1 (en) | 1999-11-16 |
JPH10135460A (ja) | 1998-05-22 |
US5923999A (en) | 1999-07-13 |
KR19980032299A (ko) | 1998-07-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW328615B (en) | MOSFET device and method of controlling dopant diffusion and metal contamination in thin polycide gate conductor | |
US6312995B1 (en) | MOS transistor with assisted-gates and ultra-shallow “Psuedo” source and drain extensions for ultra-large-scale integration | |
US5447875A (en) | Self-aligned silicided gate process | |
US5496750A (en) | Elevated source/drain junction metal oxide semiconductor field-effect transistor using blanket silicon deposition | |
US6573149B2 (en) | Semiconductor device having a metal gate with a work function compatible with a semiconductor device | |
US7276775B2 (en) | Intrinsic dual gate oxide MOSFET using a damascene gate process | |
US5583067A (en) | Inverse T-gate semiconductor device with self-aligned punchthrough stops and method of fabrication | |
US7535067B2 (en) | Transistor in semiconductor devices and method of fabricating the same | |
US5885877A (en) | Composite gate electrode incorporating dopant diffusion-retarding barrier layer adjacent to underlying gate dielectric | |
US5851891A (en) | IGFET method of forming with silicide contact on ultra-thin gate | |
US5933721A (en) | Method for fabricating differential threshold voltage transistor pair | |
TW332924B (en) | Semiconductor | |
TW346652B (en) | Semiconductor production process | |
EP1205980A1 (en) | A method for forming a field effect transistor in a semiconductor substrate | |
WO2002097889A3 (en) | Semiconductor device and a method therefor | |
US6380055B2 (en) | Dopant diffusion-retarding barrier region formed within polysilicon gate layer | |
WO2002058159A3 (en) | Mos-gated power device with doped polysilicon body and process for forming same | |
WO2003015181B1 (en) | Transistor having high dielectric constant gate insulating layer and source and drain forming schottky contact with substrate | |
US6784506B2 (en) | Silicide process using high K-dielectrics | |
US5716866A (en) | Method of forming a semiconductor device | |
WO2001047025A8 (en) | Silicon carbide lateral mosfet and method of making the same | |
US20090179274A1 (en) | Semiconductor Device and Method for Fabricating the Same | |
US20050104135A1 (en) | Semiconductor device and manufacturing method thereof | |
EP1191604A3 (en) | Semiconductor memory device | |
US5877058A (en) | Method of forming an insulated-gate field-effect transistor with metal spacers |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |