JPS57100744A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS57100744A JPS57100744A JP17743980A JP17743980A JPS57100744A JP S57100744 A JPS57100744 A JP S57100744A JP 17743980 A JP17743980 A JP 17743980A JP 17743980 A JP17743980 A JP 17743980A JP S57100744 A JPS57100744 A JP S57100744A
- Authority
- JP
- Japan
- Prior art keywords
- region
- type
- isolation
- grown
- diffusing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/761—PN junctions
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Bipolar Transistors (AREA)
Abstract
PURPOSE:To reduce the necessary region area per one element by performing twice individually epitaxial growth and isolating and diffusion regions to the grown layer, thereby shortening the diffusing time and suppressing the lateral expansion of the isolation and diffusion region. CONSTITUTION:An example of applied to a P-N-P transistor is shown. An N type epitaxial layr 31 is grown on a P type substrate 1 formed with N<+> type buried layer 2, P type impurity is then diffused, and an isolation region 41 is formed. At this time, a P type collector buried region 9 is simultaneously formed. Subsequently, an N type epitaxial layer 32 is grown, P type impurity is diffused in the prescribed part, thereby forming an isolation region 42 connected to the isolation region 41. Simultaneously, a P type collector region 5 is formed. Eventually, an emitter region 6 is formed in the interior surrounded by the region 5. Since the epitaxial growth and the diffusing step are divided twice, the diffusing time can be shortened, thereby reducing the lateral expansion of the isolation regions 41, 42.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17743980A JPS57100744A (en) | 1980-12-15 | 1980-12-15 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17743980A JPS57100744A (en) | 1980-12-15 | 1980-12-15 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57100744A true JPS57100744A (en) | 1982-06-23 |
Family
ID=16030957
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17743980A Pending JPS57100744A (en) | 1980-12-15 | 1980-12-15 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57100744A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0632503A1 (en) * | 1993-07-01 | 1995-01-04 | Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno - CoRiMMe | Integrated edge structure for high voltage semiconductor devices and related manufacturing process |
-
1980
- 1980-12-15 JP JP17743980A patent/JPS57100744A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0632503A1 (en) * | 1993-07-01 | 1995-01-04 | Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno - CoRiMMe | Integrated edge structure for high voltage semiconductor devices and related manufacturing process |
US5489799A (en) * | 1993-07-01 | 1996-02-06 | Consorzio Per La Ricerca Sulla Microelecttronica Nel Mezzogiorno | Integrated edge structure for high voltage semiconductor devices and related manufacturing processs |
US5895249A (en) * | 1993-07-01 | 1999-04-20 | Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno | Integrated edge structure for high voltage semiconductor devices and related manufacturing process |
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