JP5399953B2 - Semiconductor element, semiconductor device using the same, and method for manufacturing semiconductor device - Google Patents

Description

  The present invention relates to a configuration of a semiconductor element bonded to a circuit board through a tin-based solder, a semiconductor device, and a method for manufacturing the same.

  In switching elements (IGBT, MOSFET, etc.) and rectifier elements used in power semiconductor devices such as inverters, it is necessary to reduce power loss. In recent years, for example, wide bands such as silicon carbide (SiC) and gallium nitride. Gap semiconductor power semiconductor devices have been developed. In the case of a wide gap semiconductor, the element itself has high heat resistance and can be operated at a high temperature with a large current. However, in order to exhibit its characteristics, the junction between the semiconductor element and the substrate must be firmly bonded. Don't be.

  High melting point solder containing lead has been used as a bonding material that can operate at high temperatures, but lead-free solder material (tin-based solder) based on tin (Sn) is used for safety and environmental considerations. It has become like this. However, in order to use tin-based solder, it was necessary to sequentially laminate a titanium layer, a nickel layer, and a gold layer on the bonding surface of the semiconductor element. However, it is necessary to form a thick nickel layer in order to suppress the formation of a passive film on the titanium layer, and it is difficult to perform highly reliable bonding because the conditions during soldering are strict. Met.

  Therefore, a tin alloy layer is provided on a metal layer made of titanium or the like on the bonding surface of the semiconductor element, and when the heat treatment is performed, the tin alloy layer is diffused into the tin-based solder to form a titanium-tin alloy layer and bonded. A semiconductor device that can realize bonding excellent in reliability and ohmic bonding has been proposed (see, for example, Patent Document 1).

JP 2006-108604 A (paragraph 0037, FIG. 1)

  However, when a thermal cycle test that simulates the thermal history at the time of manufacture and operation is performed on the semiconductor device having the above-described configuration, the alloy layer used and the composition of the tin-based solder are used, or the same material is combined. However, the bonding strength varies from individual to individual, and it has not been possible to obtain a highly reliable bonding and consequently a semiconductor device with high lifetime reliability.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to obtain a semiconductor element and a semiconductor device with high life reliability that can be bonded with high life reliability using a tin-based solder. To do.

A semiconductor element according to the present invention is a semiconductor element for bonding to a conductive member using tin-based solder, and is formed of a silicide layer and titanium on a bonding surface of the base material made of a semiconductor material with the conductive member. One of the first metal layer, the second metal layer made of antimony, the nickel layer, the copper layer, the layer in which the nickel layer is laminated on the copper layer, and the layer in which the copper layer is laminated on the tantalum layer a third metal layer made, are sequentially stacked from the substrate side, the thickness of the second metal layer and wherein the at 50nm or more.

  According to the present invention, in order to obtain a strong bond, it was found that an alloy of antimony and titanium must be formed in the bonding layer, and the antimony layer was provided in the semiconductor element. Thus, an alloy of titanium and antimony having a high bonding strength is stably formed, and a highly reliable semiconductor device that can maintain the bonding strength for a long time even at high temperatures can be obtained.

It is sectional drawing for demonstrating the structure of the semiconductor element concerning Embodiment 1 of this invention. 4 is a flowchart for explaining a method for manufacturing the semiconductor element and the semiconductor device according to the first embodiment of the present invention; It is sectional drawing for demonstrating a state when the semiconductor element concerning Embodiment 1 of this invention is joined to the electrically-conductive member. It is sectional drawing for demonstrating a state when the conventional semiconductor element is joined to the electrically-conductive member. It is a figure which shows the structure of the semiconductor device concerning Embodiment 3 of this invention.

Embodiment 1 FIG.
<Finding the cause of uneven bonding strength>
Before describing the configuration of the semiconductor element and the semiconductor device according to the first embodiment of the present invention, the cause of the variation in the bonding strength in the conventional semiconductor element described in the background art will be described. A first metal layer was provided on the joining surface of the semiconductor element, a second metal layer made of a tin alloy was further provided thereon, and a joined body with a copper plate was formed using several types of tin-based solders. As a result, the combination of materials that can be bonded stably for a long time during high-temperature operation was when titanium (Ti) was used for the first metal layer and Sn—Sb solder was used for the tin-based solder.

  However, even when the above materials are combined, there are a bonded body with high bonding strength and a bonded body with no bonding strength, and it has not been possible to obtain a bonded body stably and highly reliable. Then, when the cross section of the joined body with high joining strength and the joined body with no joining strength was analyzed, in the joined body with high joint strength, the first metal layer (Ti) —the second alloy layer (Sn) was Ti—Sb—. It turned out that the ternary alloy layer of Ti—Sb—Sn is formed sparsely in the joined body which is changed to the Sn ternary alloy layer and does not have high bonding strength. That is, in the above configuration, antimony (Sb) is supplied from the Sn—Sb-based alloy constituting the solder material, and the diffusion from Sb to the Ti layer in the solder varies, so that the bonding strength may vary. I understood.

  Therefore, in the semiconductor element according to the first embodiment of the present invention, a tin-based solder is formed on the circuit pattern by providing an antimony layer immediately above the titanium layer among the plurality of metal layers provided on the bonding surface of the semiconductor element. When joining with Ti, a Ti—Sb—Sn alloy was formed so that a semiconductor device having stable joining strength was obtained. Details will be described below.

  1 to 4 are diagrams for explaining a semiconductor element, a semiconductor device, and a method for manufacturing the semiconductor device according to the first embodiment of the present invention. FIG. 1 is a diagram showing a cross section for each process for explaining the configuration of a semiconductor element, FIG. 2 is a flowchart for explaining a method for manufacturing the semiconductor element and the semiconductor device, and FIG. 3 is a diagram when joining the semiconductor element to a conductive member The figure which shows the cross section for every process of this, FIG. 4: is sectional drawing explaining the state when joining the conventional semiconductor element for demonstrating the state of a junction part to a conductive member.

  First, the structure of the semiconductor element will be described with reference to FIG. FIG. 1 is a schematic cross-sectional view for explaining a configuration of a semiconductor element and a manufacturing method thereof according to an embodiment of the present invention. FIG. 1A shows a nickel layer 2 formed on a substrate 1 made of a semiconductor material. FIG. 1B shows a state in which the formed nickel layer 2 is nickel-silicidized 2S, and FIG. 1C shows a state in which four metal layers 3, 4, 5, and 6 are further formed. In the figure, a plate-like substrate 1 having a thickness of 500 μm made of silicon carbide (SiC), which is a wide band gap semiconductor material, was prepared as a material constituting the semiconductor element 1. Thereafter, a plurality of metal layers such as nickel (Ni), titanium (Ti), antimony (Sb), and gold (Au) are formed on at least one surface of the silicon carbide substrate by sputtering. The manufacturing method will be described with step numbers (in parentheses) in the flowchart shown in FIG.

First (step S10), as shown in FIG. 1A, a nickel layer 2 having a thickness of 50 nm is formed as a metal layer for forming silicide on one surface which is a bonding surface of the silicon carbide substrate 1. (Step S20) to obtain a nickel-added semiconductor substrate _10f1 . Thereafter, heat treatment is performed in a vacuum atmosphere at 800 ° C. for 1 hour (step S30), whereby nickel reacts with silicon of the silicon carbide base material 1 to be silicided. When the silicidation is completed (“Y” in step S40), as shown in FIG. 1B, the nickel layer 2 becomes a nickel silicide layer 2S having a thickness of about 50 nm, and the semiconductor substrate in which the junction surface is silicided 10 _f2 is obtained. Subsequently, as shown in FIG. 1 (c), a 200 nm thick Ti layer 3 as a first metal layer is formed on the surface of the silicide layer 2S, and a 100 nm thick Sb as a second metal layer is formed on the surface of the Ti layer 3. The 800 nm thick Ni layer 5 that is the third metal layer is formed on the surface of the layer 4 and the Sb layer 4, and the 100 nm thick Au layer 6 that is the fourth metal layer is sequentially formed on the surface of the Ni layer 5 (step S50). . When layer formation is completed for the first to fourth metal layers (“Y” in step S60), cutting to 7.0 mm square size by dicing (step S70) and cleaning (step S80) enable mounting on a semiconductor device. Semiconductor device 10 is obtained (preparation completion: step S90).

  Next, a bonded body of a semiconductor element and a conductive member, that is, a configuration of a semiconductor device and a manufacturing method will be described with reference to FIGS. FIG. 3 is a schematic cross-sectional view for explaining the configuration of the semiconductor device (bonded body) according to the embodiment of the present invention and the manufacturing method thereof, and FIG. 3 (a) is formed on the copper circuit pattern 17 of the circuit board. FIG. 3B shows a state in which the Sn-based solder 8 is applied, and FIG. 3B shows a state in which the Sn-based solder 8 is melted (the melted state and the solidified state after melting are described as 8M), and the Au layer 6 is dissolved in the solder 8M. FIG. 3C shows a state where the Ni layer 5 reacts with Sn in the solder 8M to form an alloy 5A. FIG. 3D shows the Ti layer 3 containing Sb of the Sb layer 4, the solder 8M and the alloyed Ni layer 5A. Shows a state in which Sn diffuses and reacts to form a ternary alloy layer 3A. For the sake of simplicity, only the copper material portion that is the conductive member of the circuit pattern 17 provided on the circuit board of the semiconductor device is shown in the figure.

  The circuit board was placed on a jig (not shown) so that the copper circuit pattern 17 that is a conductive member to be bonded to the semiconductor element 10 was directed upward, and bonding was started (step S110). The surface of the circuit pattern 17 is masked with a stainless steel mask having an opening diameter of 6 mm square and a thickness of 0.2 mm (step S120), and the solder paste 8 is applied to the circuit pattern 17 as shown in FIG. (Step S130), and the semiconductor element 10 was mounted on the surface of the printed solder paste 8 (step S140). As the solder paste 8, Sn—Sb solder containing 10 wt% Sb (9014-374F: manufactured by Senju Metal (alloy composition: 90Sn-10Sb: melting point: about 240 ° C.)) was used. By holding this on a hot plate set at 300 ° C. for 40 seconds (step S150), when the solder is melted and the following alloying is completed (“Y” in step S160), air cooling is performed thereafter. (Step S170), the semiconductor device 100 (or joined body) can be obtained.

  The reaction during this heat treatment will be described in more detail as follows. When the solder 8 is melted, the gold layer 6 is first dissolved in the solder 8M as shown in FIG. 3 (b). Next, as shown in FIG. 3 (c), the Sn component and the Ni layer in the solder 8M are dissolved. 5 reacts with Ni to form an Ni—Sn alloy layer 5A. Finally, as shown in FIG. 3D, Sb of the Sb layer 4 and Sn in the solder 8M and the Ni—Sn alloy layer 5A are diffused into the Ti layer 3 and alloyed to form Ti—Sb. A -Sn ternary alloy layer 3A is formed. Thereby, the semiconductor element 10 is firmly bonded to the copper circuit pattern 17, and a semiconductor device which is a strong bonded body is obtained.

<Comparison test>
Next, a comparative test was performed to evaluate the bonding strength when the semiconductor element 10 according to the present embodiment was bonded using tin-based solder. In this comparative test, in order to facilitate bonding and strength evaluation, a copper plate 7 having a thickness of 1.0 mm cut into a 10 mm square as a simulation of the circuit pattern 17 formed on the circuit board, not an actual circuit board. Was used. And the evaluation test is carried out under various conditions for the joined body 100 _ME in which the semiconductor element 10 according to this embodiment is joined to the copper plate 7 and the joined body 100 _{MC in} which the semiconductor element 10 _CE to be compared is joined to the copper plate 7. went.

The semiconductor element 10 _{CE serving as a} comparative sample was manufactured by the following method.
As shown in FIG. 4A, a nickel silicide layer 2S having a thickness of about 50 nm was formed on one surface of a semiconductor substrate 1 having a thickness of 500 μm by the same method as that for forming the semiconductor element 10. A Ti layer 3 having a thickness of 200 nm, which is a first metal layer, was formed on the surface of the silicide layer 2S by sputtering. Here, the Sb layer, which is the second metal layer, is omitted, and the Ni layer 5 having a thickness of 800 nm, which is the third metal layer, is formed on the surface of the Ti layer 3, and the fourth metal layer is formed on the surface of the Ni layer 5. An Au layer 6 having a thickness of 100 nm was sequentially formed. Thereafter, a 5.0 mm square size cut by dicing and washed was used as the comparative semiconductor element 10 _CE . That is, the difference between the comparative semiconductor element 10 _CE and the semiconductor element 10 is whether or not the Sb layer 4 that is the second metal layer is provided. Then, the bonding with the copper plate 7, that is, the manufacture of the example bonded body 100 _ME and the comparative bonded body 100 _MC was performed by the same method as that for manufacturing the semiconductor device 100. Three each of this example joined body 100 _ME and comparative example joined body 100 _MC were used.

The joined bodies 100 _ME and 100 _MC configured as described above are held at a high temperature of 200 ° C. for 2000 hours, held for 100 hours, held for 300 hours, held for 500 hours, held for 1000 hours, and held for 2000 hours. The adhesion strength of the joined body was measured. Judgment strength is determined using a push tester (ARF-05: Digital Force manufactured by Atonic Co., Ltd.) that can apply (measure) up to 5 kgf (approx. 50 N) from the lateral direction to the shearing direction after fixing the sample with a predetermined jig. Measured using a gauge). At this time, the case where the upper limit of measurement was 5 kgf did not peel off, and the adhesion was not abnormal. The evaluation results are shown in Table 1.

As shown in Table 1, the sample of the joined body 100 _ME (Samples 2-1, 2-2, 2-3) provided with the Sb layer 4 which is an example according to the present invention was held at a high temperature for 2000 hours In contrast, the sample of the joined body 100 _MC (samples 1-1, 1-2, 1-3) that does not include the Sb layer of the comparative example has a strength up to 100 hours. Although it was kept, it was found that the adhesion strength decreased when kept at a high temperature for 300 hours.

Next, the sample after the adhesion strength test was cut and polished so that the cross section of the bonded portion appeared, and elemental analysis of the cross section of the bonded portion was performed using wavelength dispersion X-ray analysis. As a result, in the case of the joined body 100 _{ME according to} the embodiment of the present invention that was able to maintain the adhesion strength, between the solder 8M and the Ti layer 3, the Sb layer 4, the Ni layer 5 or the Ni—Sn alloy layer 5A, As a result of diffusion, it was confirmed that a strong joint composed of the Ti—Sb—Sn ternary alloy layer 3A and the Ni—Sn alloy layer 5A as described with reference to FIG. 3D was formed. At this time, Sb was uniformly distributed in the ternary alloy layer 3A. On the other hand, as shown in FIG. 4B, in the joined body _100ME of the comparative example with reduced adhesion strength, a Ti—Sb—Sn alloy phase is partially formed by the diffusion of Sb in the solder 8M. However, the dispersion was unevenly distributed with the state of the Ti phase or Ti—Sn alloying phase, and it was confirmed that a strong bonded body was not uniformly formed.

<Applicable materials>
In the present embodiment, for the purpose of evaluating the bonding force, an example in which a base-plate-like silicon carbide substrate is used is shown, but a silicon carbide substrate having a pattern or the like formed on the back surface may be used. It is the same. Further, the size of the silicon carbide base material is not particularly limited, and may be appropriately adjusted according to the size of the semiconductor element to be manufactured.

  Further, as the semiconductor element, silicon can be used in addition to silicon carbide. Similarly to silicon carbide, gallium nitride (GaN), gallium arsenide (GaAs), and diamond, which are wide bandgap semiconductor materials, are similar to silicon carbide if an additional Si layer is formed on the surface to form a silicide layer. It is applicable to.

In addition, nickel is the most suitable material for the third metal layer 5, but copper can also be used in addition to nickel. However, when copper is used, a tantalum (Ta) layer is inserted between the Sb layer as the fourth metal layer 4 (combination B) in addition to copper alone (combination A) as shown below. It is desirable to cover the outermost surface with a Ni layer (combination C).
Combination A: Sb / Cu
Combination B: Sb / Ta / Cu
Combination C: Sb / Cu / Ni

  Although these metal layers 2, 3, 4, and 5 formed on the bonding surface of the silicon carbide base material have been formed by sputtering, it goes without saying that they may be formed by other known methods. In addition, although the suitable range changes with the magnitude | sizes of a metal seed | species (layer kind) and a semiconductor element, generally the thickness formed is the range of 10 nm to 2000 nm.

  In addition to copper, the conductive member to be joined to the semiconductor element 10 may be aluminum or a clad material for a semiconductor substrate such as CIC (Cu: Invar: Cu). Moreover, it can join similarly also to the electrically-conductive member formed on ceramic substrates, such as an organic substrate and AlSiC, SiN.

  For the metal layer 2 for forming the silicide layer 2S, a high melting point transition metal that forms silicide with silicon can be used in addition to Ni.

As mentioned above, according to the semiconductor element 10 concerning Embodiment 1 of this invention, it is the semiconductor element 10 for joining to the electrically-conductive member 7 using the tin base solder 8, Comprising: The base material 1 which consists of semiconductor materials On the joint surface with the conductive member 7, a silicide layer 2S, a first metal layer 3 made of titanium, a second metal layer 4 made of antimony, and a third metal layer containing nickel and / or copper 5 are sequentially laminated from the substrate 1 side, so that Sb of the second metal layer is taken into the first metal layer 3 having good bonding property to the silicide layer 2S and Ti— The Sb—Sn ternary alloy layer 3 A is formed , and the third metal layer 5 having good bondability with the solder 8 is the Sn alloy layer 5 A , and the Ti—Sb—Sn ternary alloy layer 3 A and the alloy. Since the layer 5 A is firmly bonded, a conductive member using tin-based solder A semiconductor device that can be bonded with high life reliability is obtained, and a semiconductor device with high life reliability can be obtained by using this semiconductor element and bonding with tin base solder.

  Moreover, according to the manufacturing method of the semiconductor element 10 concerning Embodiment 1 of this invention, in the case of the base material 1 which consists of a semiconductor material containing silicon, the nickel layer 2 is formed in a joint surface and it does not contain silicon. In the case of a substrate made of a semiconductor material, the nickel layer 2 is formed after the silicon layer is formed (step S20). Then, heat treatment is performed to form a silicide (steps S30 to S40), and the first metal layer 3, the second metal layer 4, and the third metal layer 5 are sequentially formed on the surface of the silicide layer 2S. A semiconductor element that can be firmly bonded to a conductive member with a base solder can be easily obtained.

Embodiment 2. FIG.
In the second embodiment, the bonding strength was evaluated by changing the thickness of the Sb layer 4 as the second metal layer of the semiconductor element 10 created in the first embodiment and the composition of the tin-base solder 8. This will be described with reference to FIG. 1 used in the first embodiment. The thickness and heat treatment conditions of the semiconductor substrate 1 and the nickel layer 2 for forming the nickel silicide layer 2S are the same as those in the first embodiment. Of the first metal layer 3, the second metal layer 4, the third metal layer 5, and the fourth metal layer 6 that are sequentially stacked on the nickel silicide layer 2 </ b> S, the Sb layer 4 that is the second metal layer is formed. The thickness was changed. Further, in the joining with the copper plate 7, the masking and heat treatment conditions were the same as those in the first embodiment, but the solder composition (Sb content) was changed. Three test samples of the same specification were prepared for each, and a push tester (ARF-20: manufactured by Atonic Co., Ltd.) capable of applying (measuring) up to 20 kgf (about 200 N) in the shear direction from the lateral direction of the joined body. The force applied when peeling occurred was defined as the adhesion strength. The measured adhesion strength value used each average value. The evaluation results are shown in Table 2.

  As shown in Table 2, when the Sb layer is formed as the second metal layer 4 adjacent to the first metal layer 3 (Ti layer) from the results of the samples 3-1 to 3-3, Sb is not included. Even if the solder is used, the adhesion strength of the joined body is maintained at 5 kgf or more until 2000 hours, which is significantly larger than the joined body without the Sb layer 4 (1-1 to 1-3) shown in the first embodiment. It was confirmed that the heat resistance related to the bonding strength was improved. That is, it was shown that by providing the Sb layer 4 adjacent to the Ti layer 3, the bonding reliability is improved.

  On the other hand, in Samples 3-2 and 3-3 in which the layer thickness of the Sb layer 4 is 50 nm or more, the adhesion strength is hardly lowered even after holding for 1000 hours, but the sample 3 in which the layer thickness of the Sb layer 4 is 5 nm. No. 1 shows a decrease in adhesion strength after 500 hours. Therefore, regardless of the solder composition (even when there is no Sb component in the solder), the layer thickness of the Sb layer 4 as the second metal layer should be 50 nm or more in order to obtain a highly reliable joint. Found it desirable.

  Further, in Examples 5-1 to 6-3, which were joined using a solder having an Sb content of 5 wt% or more, Samples 5-1 and 6-1 in which the thickness of the Sb layer 4 was 5 nm, which was thinner than 50 nm. However, it can be seen that the decrease in strength that occurs after the lapse of 2000 hours is very small, and that the bonding reliability is further improved by increasing the Sb concentration in the solder 8.

  Furthermore, when the layer thickness of the Sb layer 4 is set to 50 nm or more (Samples 5-2, 5-3, 6-2, 6-3), adhesion strength does not decrease even when kept at a high temperature for 2000 hours. confirmed. That is, it can be confirmed that a more reliable bonding can be obtained by setting the thickness of the Sb layer 4 as the second metal layer to 50 nm or more and the Sb content in the solder 8 to be bonded to 5 wt% or more. It was.

  As described above, according to the semiconductor element according to the second embodiment or the joined body of the semiconductor element and the conductive member, by setting the layer thickness of the Sb layer 4 as the second metal layer to 50 nm or more, Bonding reliability is higher. Furthermore, by setting the Sb concentration in the solder 8 used for joining to 5 wt% or more, a highly reliable joint is obtained in which the joint strength does not decrease even when kept at a high temperature for a long time.

Embodiment 3 FIG.
In Embodiment 3 of the present invention, a semiconductor device in which the above-described semiconductor elements are joined using tin-based solder will be described. FIG. 5 is a diagram for explaining a configuration of a semiconductor device in which the semiconductor element described in the first or second embodiment is mounted using tin-based solder, and FIG. 5A is a portion of the semiconductor device in which the semiconductor element is mounted. FIG. 5B is a cross-sectional view showing a cut surface taken along the line AA of FIG. In the figure, a power semiconductor device 100 includes a semiconductor element using a SiC base material in which a plurality of copper circuit patterns are formed on an insulating circuit board 11 and a drain electrode side is joined to one of the circuit patterns 17. 10 is arranged.

  The semiconductor element 10 was joined to the circuit pattern 17 using the tin-based solder 8 described above. As shown in FIG. 1, a silicide layer 2S and first to fourth metal layers 3 to 6 are sequentially formed on the junction surface of the semiconductor element 10 on the drain electrode side. In addition to the above-mentioned silicon carbide, a material obtained by forming a silicon layer on silicon or a so-called wide band gap semiconductor material such as gallium-arsenic, gallium nitride, diamond, or the like is used for the base material of the semiconductor element 10. . Further, the circuit pattern 17 which is a conductive member facing the semiconductor element 10 is made of copper, and a noble metal plating layer (not shown) such as gold, silver, palladium, platinum or the like having a thickness of about 1 μm is formed on the bonding surface. The method for bonding the semiconductor element 10 to the circuit pattern 17 is as shown in steps S110 to S180 of FIG. 2 described in the first embodiment, and a description thereof is omitted.

  However, the heat treatment (step S150) may be performed in a state where a predetermined load is applied to the semiconductor element 10 by a jig or an assembly apparatus (not shown). In this way, a semiconductor device or a semiconductor module in which the semiconductor element 10 and other members are mounted on the circuit pattern 17 can be manufactured. Since these semiconductor devices 100 have excellent electrical conductivity, thermal conductivity, and heat-resistant cycle life, particularly at the junction, they can cope with a high-temperature operating environment and are excellent in thermal stress. In particular, since the power semiconductor device that handles a large current is used at a high temperature, the effect becomes more remarkable.

  For example, the semiconductor element 10 and the copper terminal 18 are electrically connected by the copper inner frame 16 to the semiconductor element 10 mounted on the circuit board 11 as described above. Electrically connect. Such connection is repeated to form the semiconductor device 100. Strictly speaking, a gate pad and a source electrode are formed on the upper surface of the semiconductor element 10, but in the drawing, it is simplified and described as having a source electrode formed on the entire upper surface. Further, on the surface of the source electrode of the semiconductor element 10, a thin aluminum base (electrode) having a thickness of several μm (not shown) is formed to improve the connection.

  When the semiconductor element 100 is operated, the operating temperature rises to 200 ° C. or higher and may temporarily rise to several hundred degrees. However, when the semiconductor element 10 having the Sb layer 4 adjacent to the Ti layer 3 as in the present embodiment is joined using the tin-based solder 8, a strong Ti—Sb—Sn ternary alloy layer is formed at the joint. It is formed and can maintain strong bonding strength even at high temperatures.

  Here, for example, when silicon carbide, a gallium nitride-based material, or diamond is used for a semiconductor element that functions as a switching element or a rectifying element, power loss is lower than that of a conventionally formed element made of silicon. Therefore, the efficiency of the power semiconductor device can be increased. Further, since the withstand voltage is high and the allowable current density is also high, the power semiconductor device can be downsized. In addition, wide band gap semiconductor elements have high heat resistance, so they can operate at high temperatures, and the heat sink fins can be downsized and the water cooling section can be air cooled. Is possible.

  On the other hand, in order to exhibit the performance of the wide band gap semiconductor element, it is necessary to reduce the electrical resistance when current flows through the semiconductor element and to efficiently dissipate the heat generated in the semiconductor element. Therefore, if the semiconductor element described in the embodiment of the present invention is joined with tin-base solder, it has excellent heat dissipation characteristics and electrical conductivity, and can maintain a strong joint even under a thermal cycle during manufacturing or driving. A highly reliable semiconductor device or semiconductor module can be obtained.

  As described above, the semiconductor device according to the present embodiment includes the circuit board 11 on which the circuit pattern 17 is formed and the semiconductor element 10 mounted on the circuit pattern 17. Since tin-based solder is used for bonding to the pattern 11, it is possible to maintain a strong bonding even under a thermal cycle during manufacturing or driving, and to obtain a highly reliable semiconductor device.

  Further, according to the method of manufacturing a semiconductor device according to the present embodiment, the paste of tin base solder 8 is applied to the predetermined range on the circuit pattern 17 (steps S120 and S130), and the paste of tin base solder 8 is applied. Since the semiconductor element 10 described above is installed in the portion (step S140) and the tin-base solder 8 is heated so as to melt (steps S150 to S160), it is strong even under the thermal cycle during manufacturing and driving. A highly reliable semiconductor device 100 can be obtained while maintaining bonding.

  In particular, since the tin-based solder 8 having an Sb content of 5 wt% or more is used, the semiconductor device 100 with higher reliability can be obtained.

1 semiconductor substrate, 2 metal layer for forming silicide (2S: silicide layer),
3 Ti layer (first metal layer) (3 A : Ti—Sb—Sn ternary alloyed layer), 4 Sb layer (second metal layer), 5 Third metal layer (5 A : Ni—Sn alloyed layer) , 6 Au layer (4th metal layer), 7 Copper plate (conductive member), 8 Tin-based solder (8M: after melting)
11 Circuit board, 17 Circuit pattern (conductive member), 100 Semiconductor device .

Claims (6)

A semiconductor element for joining to a conductive member using tin-based solder,
On the joint surface with the conductive member of the base material made of a semiconductor material,
A silicide layer;
A first metal layer made of titanium;
A second metal layer made of antimony;
A third metal layer comprising any one of a nickel layer, a copper layer, a layer obtained by laminating a nickel layer on the copper layer, and a layer obtained by laminating a copper layer on the tantalum layer is sequentially laminated from the base material side. and,
A semiconductor element, wherein the thickness of the second metal layer is 50 nm or more . The semiconductor device according to claim 1 , wherein the semiconductor material is a wide band gap semiconductor material. 3. The semiconductor device according to claim 2 , wherein the wide band gap semiconductor material is any one of silicon carbide, gallium nitride, gallium arsenide, and diamond. A circuit board on which a circuit pattern is formed;
A semiconductor element according to any one of claims 1 to 3 mounted on the circuit pattern, wherein a tin-based solder is used for joining the semiconductor element to the circuit pattern. Semiconductor device. The semiconductor device according to claim 4 , wherein the tin-based solder contains 5 wt% or more of antimony. Apply tin-based solder paste to a predetermined area on the circuit pattern of the circuit board constituting the semiconductor device,
The semiconductor element according to any one of claims 1 to 3 is installed in a portion where the tin-based solder paste is applied,
Heating so that the tin-based solder melts;
A method for manufacturing a semiconductor device.

Images