JP4167349B2 - Receiving machine - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a receiver, particularly an AM / FM radio receiver, a portable telephone, and the like that are suitable for small size and light weight and low power consumption.
[0002]
[Prior art]
AM / FM radio receivers and receivers such as mobile phones generally modulate audio signals and emit radio waves (RF) radio waves, receive such radio waves with an antenna, and perform predetermined signal processing. This is a typical example of an analog electronic device that is later played back and listened with a speaker or an earphone (or a headphone).
[0003]
However, recent advances in semiconductor integrated circuit (IC) technology and digital technology are remarkable, and many IC and digital technologies including microprocessors are adopted in the analog electronic device field. For example, digital circuits are frequently used in the channel selection circuit, volume control circuit, etc. of recent receivers, and the receivers are now electronic devices of both analog and digital.
[0004]
As a typical example of a receiver, a block diagram showing a configuration of a typical superheterodyne AM / FM (two-band) radio receiver is shown in FIG.
[0005]
As shown in FIG. 2, a typical AM / FM radio receiver 10 includes an antenna 20 that receives an RF signal emitted from a broadcasting station, an FM receiver 30, an AM receiver 40 (both receivers 30 and 40 are connected to each other). Collectively referred to as an analog signal processing unit), a tuning PLL (phase-locked loop) frequency synthesizer unit (digital signal processing unit) 50, an audio processor unit 60 for adjusting volume and sound quality, an output amplification unit 70, and a speaker (or Earphone) 80.
[0006]
The FM receiver 30 includes an RF amplifier 31, an FM mixer 32, an IF (intermediate frequency) filter 33, an IF amplifier 34, an IF filter 35, an IF limiter amplifier 36, an RM detector 37, and an FM demodulator 38. The RF amplifier 31 amplifies the FM signal received by the antenna 20 with a predetermined gain. The FM mixer 32 mixes the received RF signal amplified by the RF amplifier 31 and the local oscillation signal from the PLL frequency synthesizer unit 50. The IF filter 33 is a filter that selects and passes a desired IF signal (for example, 10.7 MHz) from the output of the FM mixer 32. The IF amplifier 34 amplifies the output of the IF filter 33 with high gain. The IF filter 35 passes a desired IF signal out of the output of the IF amplifier 34. The IF limiter amplifier 36 operates to remove unnecessary AM components by limiting the amplitude. The FM detector 37 performs FM detection on the FM signal from the IF limiter amplifier 36 and outputs an audio signal. The FM demodulator 38 demodulates the L (left) and R (right) signals of the stereo signal from the output signal from the FM detector 37.
[0007]
Next, the AM receiver 40 includes an RF amplifier 41, a first mixer 42, a first IF filter 43, a second mixer 44, a second IF filter 45, a second IF amplifier 46, and an AM detector 47. . The RF amplifier 41 amplifies the RF signal received by the antenna 20 with a predetermined gain. The first mixer 42 mixes the RF signal from the RF amplifier 41 with the local oscillation signal from the PLL frequency synthesizer unit 50. The first IF filter 43 passes the first IF signal component of 10.8 MHz, for example, out of the output of the first mixer 42. The second mixer 44 mixes the first IF signal from the first filter 43 with the local oscillation signal from the PLL frequency synthesizer unit 50, and obtains a second IF signal of 450 KHz, for example. The second IF filter 45 passes the second IF signal from the second mixer 44 to the subsequent stage. The second IF amplifier 46 amplifies the second IF signal with a predetermined gain. The AM detector 47 AM-detects the second IF signal and outputs an audio signal included therein.
[0008]
Note that the AM receiver 40 may convert the output of the RF amplifier 41 into a desired final IF signal of, for example, 450 KHz using a single mixer. However, as described above, the configuration of the PLL frequency synthesizer unit 50 of the AM receiver unit 40 and the FM receiver unit 30 is simplified by the two-stage IF mixer and IF frequency selection.
[0009]
The PLL frequency synthesizer unit 50 is a circuit for generating necessary local oscillation signals (or frequencies) for the mixers 32, 42, 44 of the FM receiver 30 and the AM receiver 40. This PLL frequency synthesizer unit 50 includes an FM / AM VCO (voltage controlled oscillator) 51, a 1/2 frequency divider 52, a programmable counter 53, a phase comparator 54, an LPF (low-pass filter) 55, 1/10 minutes. A frequency divider 56, a reference frequency divider 57, and a reference oscillator 58 are included. The FM / AM VCO 51 is a voltage-controlled variable oscillator having a conventional configuration including a variable capacitance element such as an amplifier, an LC (inductor, capacitor) resonance element, and a variable capacitance diode, and changes the capacitance of the variable capacitance element by the control voltage. The oscillation frequency is changed within a certain range. The 1/2 divider 52 divides the oscillation signal frequency of the VCO 51 by 1/2. Each time the programmable counter 53 counts an output pulse from the 1/2 frequency divider 52 to an arbitrarily set integer (referred to as N), it pulses the phase comparator 54. The reference oscillator 58 generates a highly accurate reference signal including, for example, a crystal resonator. In this example, a reference frequency of 10.35 MHz is oscillated. The reference frequency divider 57 divides the output frequency of the reference oscillator 58 by a predetermined division ratio (for example, 1/128). The phase comparator 54 compares the phase of the count output of the program counter 53 with the frequency division reference signal from the reference frequency divider 57, and generates a comparison output corresponding to the phase difference. The LPF 55 smoothes the output of the phase comparator 54 and applies it to the variable capacitance element of the VCO 51 to control the oscillation output of the VCO 51. The 1/10 frequency divider 56 divides the oscillation output of the VCO 51 by 1/10 and outputs it to the first mixer 42 of the AM receiver 40. The oscillation output of the VCO 51 is directly supplied to the FM mixer 32 of the FM receiver 30.
[0010]
According to the PLL frequency synthesizer 50 having such a configuration, the count value setting of the programmable counter 53 is N, the frequency division ratio of the reference frequency divider 57 is 1 / n, the oscillation frequency of the VCO 51 is fo, and the oscillation frequency of the reference oscillator 58 is Assuming fr, the following relationship is established between fo and fr.
fo × 1/2 × 1 / N = fr × 1 / n
fo = (2N / n) × fr
As is apparent from this equation, the oscillation frequency fo of the VCO 51 is a multiple proportional to N with respect to the reference frequency fr of the reference oscillator 58. Therefore, by changing the set value N of the programmable counter 53, the local oscillation frequency fo having an arbitrary multiple of the reference frequency fr is output from the VCO 51.
[0011]
The audio processor unit 60 includes an input selector unit 61, volume / left / right balance control 62, BASS control unit 63, TREBLE control unit 64, FADER control unit 65, and mute unit 66. The input selector 61 selects a signal source to be output to the output amplifier 70 and the speaker 80 from the outside (AUX) such as FM, AM, or a tape player. The volume / left / right balance control unit 62 adjusts the volume output from the speaker 80, the balance between the left and right speakers, and the like. The BASS control unit 63 and the TREBLE control unit 64 are filter circuits, and adjust the sound quality of the bass and treble, respectively. The FADER control unit 65 controls the volume of each speaker if there are speakers before and after the vehicle. The mute unit 66 blocks the output from the speaker 80.
[0012]
The tuning DAC (digital / analog converter) 90 converts the digital control input signal for the FM and AM RF amplifiers 31 and 41 into an analog DC value, and changes the tuning frequency of each of the RF amplifiers 31 and 41. . This makes it possible to amplify a signal having a required frequency in the RF signal received by the antenna 20 with high gain.
[0013]
In the FM / AM two-band radio receiver having the above-described configuration, particularly a portable receiver, the use of an IC is progressing in order to reduce the size and weight and to reduce the price. There are two types of ICs, bipolar ICs and unipolar (or MOS) ICs. The former is generally suitable for a high-frequency circuit, but is expensive because the manufacturing process is complicated, and the power consumption is relatively large. On the other hand, the latter, particularly a CMOS (complementary MOS) IC, is simple in manufacturing process and inexpensive in manufacturing, but is generally used for a digital circuit including a memory and a counter instead of a high-frequency analog circuit.
[0014]
In order to obtain a small, light and inexpensive receiver, it is preferable to integrate all the circuits in a single IC (one chip). However, because of the above-mentioned characteristics of the IC and the digital circuit generates more noise than the analog circuit, even the most commercially available radio receiver on the market is configured as shown in FIG. It is.
[0015]
That is, the IC radio receiver 100 includes an antenna 101, an analog signal processing unit 102, a digital signal processing unit 103, an output amplification unit 104, and a speaker 105. The analog signal processing unit 102 includes the amplifier, mixer, detector, and the like in FIG. 2, and is generally configured by one or more bipolar ICs. On the other hand, the digital signal processing unit 103 includes the PLL frequency synthesizer unit and the like in FIG. 2, and is configured by, for example, a CMOS type IC.
[0016]
[Problems to be solved by the invention]
However, when the analog signal processing unit 102 and the digital signal processing unit 103 are configured with two or more different ICs as in the radio receiver 100 of FIG. 3, more parts (devices) than a single IC are required. Therefore, it is difficult to further reduce the size and weight, and it is difficult to reduce the cost by increasing the number of assembly manufacturing steps. Moreover, for example, even if the analog / digital signal processing circuit is integrated on a single IC chip, noise from the digital signal processing unit is mixed into the analog signal processing unit, which is an important characteristic of a radio receiver or the like. It was considered impossible to raise the ratio sufficiently high.
[0017]
OBJECT OF THE INVENTION
An object of the present invention is to integrate both the analog signal processing unit and the digital signal processing unit described above into a single IC chip to reduce the size and weight and to provide an electrical signal such as a sufficient S / N ratio required by the receiver. It is to provide a receiver capable of obtaining characteristics.
[0018]
[Means for solving the problems]
According to the receiver of the present invention, the analog signal processing unit and the digital signal processing unit are integrated and formed on the same substantially rectangular semiconductor substrate. The analog signal processing unit is disposed along substantially one side of the semiconductor substrate, the digital signal processing unit is disposed along the side opposite to the one side of the semiconductor substrate, and the audio processor unit is disposed in a substantially central portion. It is characterized by that.
[0019]
According to a preferred embodiment of the present invention, each circuit portion is divided as finely as possible and surrounded by a guard ring to reduce noise.
[0020]
Preferably, both the analog signal processing unit and the digital signal processing unit are integrated with MOS transistors to reduce manufacturing cost and power consumption.
[0021]
In the case where the electrical characteristics are given priority over the manufacturing cost, the analog signal processing unit may be integrated on the same semiconductor substrate by the bipolar IC mixed IC and the digital signal processing unit by the MOS type IC.
[0022]
The analog signal processing unit includes both FM and AM receiving units, and a local oscillator is disposed in the vicinity of the mixer units of both the FM and AM receiving units.
[0023]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, a preferred embodiment of the receiver of the present invention will be described in detail with reference to FIG.
[0024]
FIG. 1 shows a layout (circuit layout diagram) of an analog and digital signal processing IC which is a main component of a receiver according to the present invention. 1A shows the basic layout of the receiver IC of the present invention, and FIG. 1B shows the layout of the analog / digital signal processing IC of the FM / AM radio receiver shown in FIG.
[0025]
First, a description will be given with reference to FIG. This receiver IC is formed on a substantially rectangular semiconductor substrate by, for example, a well-known MOS process. Although not shown, on the outer periphery of the substrate 1, for example, a large number of pads for connection with the substrate are formed. In this receiver IC, both the analog signal processing unit 2 and the digital signal processing unit 3 are integrated on the same semiconductor substrate 1.
[0026]
The analog signal processing unit 2 is disposed and formed along one side 1a of the substrate 1 or in the vicinity of one side 1a. Next, the digital signal processing unit 3 is arranged and formed along the side 1b opposite to the side 1a of the substrate 1. The digital signal processing unit 3 is, for example, a PLL frequency synthesizer unit of the receiver. Further, it is preferable that the local oscillator 4 for channel selection and the audio processor unit 5 are arranged and formed in the mixer of the analog signal processing unit 2 of the receiver substantially at the center of the substrate 1.
[0027]
The analog / digital signal processing IC for a receiver preferably forms a guard ring 6 by dividing each part as a whole or into a plurality of areas, and electrically isolates each circuit part to introduce noise. Or prevent the occurrence. For the guard ring 6, it is effective for noise reduction to enclose each part as finely as possible.
[0028]
By configuring the receiver IC as described above, the digital signal processing unit 3 having the largest noise generation amount can be separated from the analog signal processing unit 2 and noise can be reduced. In addition, by arranging the audio processor unit 5 in the center of the substrate 1, it is possible to further reduce noise reaching the analog signal processing unit 2 from the digital signal processing unit 3. With such an arrangement, it is possible to integrate both analog / digital signal processing units, which were conventionally considered impossible, on a single substrate. In particular, it can be formed by a well-known MOS IC whose manufacturing process is simpler, cheaper and consumes less power than bipolar ICs.
[0029]
Next, FIG. 1B shows a layout of an IC including the analog signal processing unit and the digital signal processing unit for the FM / AM radio receiver shown in the block diagram of FIG. Note that the output amplifier 70 and the speaker 80 in FIG. 2 are excluded from this IC. However, by providing a sufficient heat dissipation mechanism integrally or separately, the output amplifier 70 can also be formed on the same substrate and integrated into an IC.
[0030]
In FIG. 1B, the analog signal processing unit is an FM receiving unit arranged along one side 1a of the substrate 1, that is, an FM RF amplifier and mixer unit 2a, an FM IF unit 2b, an IF limiter amplification unit 2C, An FM detector 2d, an FM stereo decoder 2e, and an AGC unit 2f for automatically adjusting the gain of the IF amplifier are arranged and formed. These parts 2a to 2f are surrounded by individual guard rings. In addition, the AM receiving unit, that is, the AM RF amplifier and mixer unit 2A is arranged and formed substantially in parallel with the above-described FM RF amplifier and mixer unit 2a. Further, an AM IF and detector unit 2B are arranged and formed at the center of the substrate 1.
[0031]
A PLL frequency synthesizer unit 3a of the digital signal processing unit is arranged and formed along the other side 1b of the substrate 1, and a frequency counter unit 3b for counting and displaying the frequency of the selected broadcasting station is arranged and formed as necessary. .
[0032]
Next, the local oscillator unit 4 and the audio processor unit 5 that are input to the mixer 32 and the AM first mixer 42 of the FM and AM receiving circuits 30 and 40 are arranged and formed at the center of the substrate 1. The tuning DAC 7 and the audio processor unit 5 are arranged and formed on the FM receiving unit side. These parts are surrounded and shielded by the guard ring 6.
[0033]
1B has substantially the same structural characteristics as those of the IC described above with reference to FIG. 1A, and has the same effect.
[0034]
The preferred embodiment of the IC receiver of the present invention has been described in detail above. However, the present invention should not be limited to only such specific examples, and those skilled in the art can easily understand that various modifications and changes can be made according to specific applications without departing from the gist of the present invention. Like. For example, a part of the circuits of the FM and AM receiving units may be constituted by another IC or an individual device as necessary. Moreover, it is applicable also to receivers other than a radio receiver.
[0035]
【The invention's effect】
As can be understood from the above description, according to the receiver of the present invention, the analog signal processing unit and the digital signal processing unit are disposed at positions opposite to each other on the substrate, and the audio processor unit is disposed at the central portion. As a result, it is possible to arrange the analog and digital signal processing units of the receiver, which has heretofore been impossible due to problems such as noise, on the same substrate and integrate them on a single chip. Therefore, it can be reduced in size and weight and can be manufactured at low cost.
[0036]
Further, with such a configuration, all the circuits can be manufactured at a lower cost because the manufacturing process is simple and a low power consumption MOS type IC can be realized.
[Brief description of the drawings]
FIG. 1 shows a layout of a preferred embodiment of an IC for a receiver according to the present invention, (A) shows a basic layout, and (B) shows a specific layout example.
FIG. 2 is a block diagram showing a configuration of an FM / AM radio receiver to which the present invention can be applied.
FIG. 3 is a block diagram of a conventional IC receiver.
[Explanation of symbols]
1 ... Semiconductor substrate 1a ... One side 1b of substrate ... Opposite side 2 of substrate ... Analog signal processing unit 3 ... Digital signal processing unit 5 ... Audio processor unit 6 ... Guard ring

Claims (6)

A receiver having an analog signal processing unit that processes an analog signal received from an antenna, a digital signal processing unit that controls operation of the analog signal processing unit, and an audio processor unit that processes an output of the analog signal processing unit In
The analog signal processing unit and the digital signal processing unit are disposed on opposite sides of a substantially rectangular substrate, respectively, and the audio processor unit is disposed in a central portion to be integrated on the same substrate. Machine. 2. The receiver according to claim 1, wherein the analog signal processing unit and the digital signal processing unit are each divided into one or more circuit blocks, and each is surrounded by a guard ring. The analog signal processing unit is a heterodyne system including a mixer and an intermediate frequency amplifier, and the digital signal processing unit includes a PLL frequency synthesizer, and supplies a local oscillation signal to the mixer. Receiving machine. The receiver according to claim 1, wherein the analog signal processing unit includes FM and AM signal receiving circuits. The receiver according to claim 1, wherein the IC is formed by a MOS process. 2. The receiver according to claim 1, wherein the IC is a bipolar MOS mixed IC in which the analog signal processing unit and the digital signal processing unit are formed by bipolar and MOS processes, respectively.

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