JPH09307467A - Fm receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an FM receiver capable of reducing time and labor at the time of designing and manufacturing without necessitating variable capacitor and suitable for integration. SOLUTION: This FM receiver includes an antenna, a high frequency amplifier circuit, a tuning circuit 4, an FM wave detection circuit, a low frequency amplifier circuit and a speaker. The tuning circuit 4 is constituted of two inverter circuits 24 and 26, an LC element 30 forming a capacitor like a distribution factor by a pn jointing layer between inductor conductors, a resistor 22 connected to the input side of the inverter circuit 24, and FET 28 functioning as a variable resistor by being parallelly connected with the inverter circuit 24. This tuning circuit 4 allows a signal in the neighborhood of a prescribed frequency fixed by inductance belonging to the inductor conductors of the LC element 30 and capacitance belonging to the capacitor formed like a distribution factor to pass and varies the capacitance of this capacitor to receive desired FM broadcasting.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to an FM receiver for receiving FM waves.

[0002]

2. Description of the Related Art FIG. 16 is a diagram showing the configuration of a super heterodyne FM monaural receiver.

Like the AM receiver, the FM receiver also uses the superheterodyne system. In case of FM receiver,
100MH by using the super-heterodyne system
Since a broadcast wave having a high frequency close to z is converted to a low frequency (intermediate frequency) of about 1/10, which is easy to handle, amplification / demodulation processing becomes easy.

The broadcast wave received by the antenna is input to a high frequency amplifier circuit and amplified to a level required for the next frequency conversion process. The input circuit and high frequency amplifier circuit are
It has a bandpass filter characteristic, and signals other than the desired wave are appropriately attenuated here.

The frequency conversion circuit is composed of a mixing circuit and a local oscillation circuit. The desired wave is mixed with the signal from the local oscillation circuit so that the frequency of the difference between the frequency of the desired wave and the local oscillation frequency is exactly the intermediate frequency. To be converted.

With respect to the signal converted into the intermediate frequency by the frequency conversion circuit, only the desired signal is selectively separated and amplified by the bandpass filter of the intermediate frequency amplification circuit. FM
Although the signal is originally a signal whose amplitude is constant and whose frequency changes, the amplitude is not constant due to the influence of electric noise and multipath while the FM radio wave reaches the receiving antenna. If this is subjected to FM detection as it is, a noise component appears in the detection output and the sound quality is deteriorated. Therefore, an FM signal having a constant amplitude is formed through the amplitude limiting circuit, and then FM detection is performed.

When a monaural broadcast is received, an audio signal of 50 to 15000 Hz is obtained at the FM detection output.
Since the high frequency band of this signal is strengthened by the pre-emphasis circuit on the transmission side, the high frequency band is attenuated by the de-emphasis circuit and corrected to a flat frequency characteristic.

When a stereo broadcast is received, in addition to the sum signal (50 to 15000 Hz), 2 is added to the FM detection output.
3 to 53 kHz stereo sub-channel signal and 1
Although 9 kHz pilot signals are included, they are attenuated when passing through the de-emphasis circuit, and only the sum signal remains and monaural reproduction is performed (cited from pages 237 to 239 of "NHK Radio Technology Textbook" edited by the Japan Broadcasting Corporation).

[0009]

By the way, in the FM receiver using the above-mentioned super-heterodyne system, in order to improve the selectivity, the high frequency signal received by the antenna is input to the tuning circuit to perform a predetermined tuning process. The tuning frequency is changed in conjunction with the oscillation frequency of the local oscillation circuit so that only the radio wave of one broadcasting station is selected. Therefore, the conventional FM receiver includes a mechanical multiple variable capacitor, and the multiple variable capacitor is sized so as to have a predetermined capacitance according to the reception frequency. It was difficult to miniaturize and integrate the whole. Recently, FM receivers that use variable capacitance diodes instead of multiple variable capacitors have also appeared on the market, but it is necessary to link a plurality of variable capacitance diodes, and it is necessary to design in consideration of variations in the characteristics of component parts. Met.

Further, in the conventional FM receiver, the intermediate frequency signal is generated from the FM wave received by the antenna and the signal generated by the local oscillation circuit. In order to reduce the distortion of the intermediate frequency signal, the local oscillation circuit is used. The generated signal also had to be a sinusoidal signal with little distortion. Therefore, an LC oscillator circuit is used as the local oscillator circuit, and coils and transformers are often used together with the intermediate frequency amplifier circuit, and many external parts are required even when integrated. It was difficult to integrate the FM receiver as a whole.

The present invention has been made in view of the above points, and its object is to eliminate the need for a variable capacitor, reduce the labor at the time of designing and manufacturing, and suitable for integration. It is to provide an FM receiver.

[0012]

In the FM receiver according to each of the claims, the FM wave received by the antenna is input to the tuning circuit directly or after frequency conversion, and the tuning frequency of the tuning circuit is changed. Only the desired FM wave is extracted. Further, by performing high frequency amplification in the front stage of the tuning circuit or in addition to this, a good SN ratio can be realized.

In particular, this tuning circuit can be realized by a simple circuit configuration including a distributed constant type LC element formed on a semiconductor substrate and two inverter circuits or inverting amplifiers. Most parts of the machine can be integrally formed on the semiconductor substrate. Further, the bandwidth can be adjusted by changing the resistance value of the first resistor included in the tuning circuit, and a desired FM wave can be separated even with one stage or a small number of stages. It eliminates the need for multiple variable capacitors such as those used in.

More specifically, the above-mentioned LC element has two inductor conductors having a spiral shape and a pn junction layer having a spiral shape along these inductor conductors, and a pn junction is formed between the inductor conductors. A distributed constant capacitor is formed by the junction layer. By changing the reverse bias voltage applied to the pn junction layer, the capacitance of the capacitor formed in a distributed constant, that is, LC
Since the element constant of the element changes, the tuning frequency of the tuning circuit determined by the element constant of the LC element can also be changed arbitrarily, and the variable capacitor becomes unnecessary.

By changing the resistance value of the second resistor included in the tuning circuit, the output amplitude of the tuning circuit can be changed, and the gain control can be performed with a simple structure. The second resistance described above can be realized by using the channel of the FET as a resistor, and in particular, the p-channel F
When the ET and the n-channel FET are used in parallel connection, the non-linear characteristic of the FET can be improved, so that a tuning signal with less distortion can be obtained.

[0016]

BEST MODE FOR CARRYING OUT THE INVENTION An FM receiver according to one embodiment of the present invention will be specifically described below with reference to the drawings.

FIG. 1 is a diagram showing the configuration of an FM receiver of one embodiment to which the present invention is applied. The FM receiver shown in the figure includes a high frequency amplifier circuit 1, a local oscillator circuit (LOC) 2,
The mixing circuit 3, the tuning circuit 4, the automatic gain control (AGC) circuit 5, the FM detection circuit 6, the low frequency amplification circuit 7, and the speaker 8 are included.

The high frequency amplifier circuit 1 performs high frequency amplification on the FM wave received by the antenna 10, and is provided for the purpose of improving the SN ratio and reducing unnecessary radiation. When the FM receiver is used only in a place close to the FM wave transmitting station, for example, when receiving an in-house broadcast, the high frequency amplifier circuit 1 is omitted and the FM wave received by the antenna 10 is transmitted to the next stage. Alternatively, it may be directly input to the mixing circuit 3.

The local oscillating circuit 2 is a sine wave oscillating circuit having a constant oscillating frequency (for example, several tens of MHz), and outputs a sine wave signal with high frequency stability using a crystal oscillator.

The mixing circuit 3 mixes the signal output from the high frequency amplifier circuit 1 and the sine wave signal output from the local oscillation circuit 2 to generate an intermediate frequency signal (difference signal or sum signal).
Is output. The frequency of the output signal of the high frequency amplifier circuit 1 is set to f
1. If the frequency of the sine wave signal output from the local oscillator circuit 2 is f2, a difference signal having a frequency f1 -f2, for example, is output as an intermediate frequency signal.

The tuning circuit 4 has a tuning frequency set to f3, and selects only the intermediate frequency signal having a frequency near f3 from the intermediate frequency signals input from the mixing circuit 3 in the preceding stage and outputs it. The detailed configuration and operation of the tuning circuit 4 will be described later.

The AGC circuit 5 is for controlling the amplitude of the tuned FM wave output from the tuning circuit 4 to be constant, and feeds back a control voltage according to the output amplitude of the tuning circuit 4 to the tuning circuit 4. input. Specifically, as shown in FIG. 2 (A) or (B), the FM wave output from the tuning circuit 4 is half-wave rectified to generate a control voltage according to the amplitude of the FM wave.

The FM detection circuit 6 performs FM detection on the signal near the frequency f3 selected by the tuning circuit 4. There are various methods for FM detection, and among them, a PLL detection method suitable for circuit integration, a pulse count detection method, a quadrature detection method, a detection method using an AND gate, and the like can be applied.

FIG. 3 is a diagram showing the configuration of the FM detection circuit 6 when the PLL detection method is applied. FM shown in the figure
The detection circuit 6 has a PLL configuration including a voltage controlled oscillator (VCO), a phase comparator (PD), a charge pump (CP), and a low pass filter (LPF).

In a normal PLL, a reference signal from an oscillator is input to one input terminal of a phase comparator.
In the detection circuit 6, the tuning circuit 4 is connected to one input terminal of the phase comparator.
Output signal is input. Since the output signal of the tuning circuit 4 is an FM-modulated signal, its frequency slightly changes in response to the voice signal, and the control voltage applied from the low-pass filter to the voltage controlled oscillator also corresponds to the voice signal. Change. Therefore, the output of this low-pass filter can be taken out as an audio signal.

The low frequency amplifier circuit 7 performs voltage amplification and power amplification on the signal output from the FM detection circuit 6 and outputs the received voice from the speaker 8. Note that the received voice may be output from a receiver such as an earphone instead of being output from the speaker 8.

FIG. 4 is a circuit diagram showing the detailed structure of the tuning circuit 4 described above. The tuning circuit 4 shown in the figure includes a resistor 22 to which the output of the mixing circuit 3 is input at one end via an input terminal 34, and two inverter circuits 24 connected in series.
And 26, a FET 28 whose source or drain is connected to each of the input and output ends of the inverter circuit 26 in the subsequent stage and which functions as a variable resistance, and a distributed constant type LC connected to each input and output terminal of the inverter circuits 24 and 26.
The element 30, the output terminal of the inverter circuit 26, and the LC element 3
Capacitor 32 for blocking DC current inserted between 0 and
It is comprised including.

The output terminal of the inverter circuit 26 in the latter stage is connected to the output terminal 36 of the tuning circuit 4, and the signal output from the inverter circuit 26 is output via the output terminal 36 to the AGC circuit 5 and the FM detection circuit 6 in the latter stage. Are input respectively. Further, the gate of the FET 28 is connected to the amplitude control terminal 40, and the output voltage of the AGC circuit 5 is applied to the gate of the FET 28 via the amplitude control terminal 40.

The LC element 30 has a plurality of input / output terminals, one of which is connected to the tuning control terminal 38. The variable voltage power supply 9 shown in FIG. 1 is connected to the tuning control terminal 38, and the element constant of the LC element 30 changes according to the level of the voltage applied to the tuning control terminal 38 to change the tuning circuit. The tuning frequency of 4 changes.

Each of the inverter circuits 24 and 26 is
Normally, a digital signal is input and the logic of this input signal is inverted and output, but in the present embodiment, it is used as an analog element. For example, a commercially available CMOS 4000 series inverter circuit or the like is used.

The LC element 30 is a composite element including two inductor conductors and a distributed constant capacitor formed by a pn junction layer between the two inductor conductors. A first or second input / output terminal is connected near both ends of one inductor conductor, and these two input / output terminals are connected to the input / output terminals of the preceding inverter circuit 24, respectively. A third input / output terminal is connected near one end of the other inductor conductor, and the third input / output terminal is connected to the output end of the inverter circuit 26 at the subsequent stage via the capacitor 32. . The third input / output terminal is connected to the tuning control terminal 38 shown in FIG.

When the AC signal is input to one end of the resistor 22, the tuning circuit 4 having such a configuration selects only a signal in the vicinity of a predetermined frequency from the AC signal and outputs the selected signal from the inverter circuit 26 in the subsequent stage. . Therefore, only the signal having the frequency corresponding to the desired broadcast wave can be selected from the signals output from the mixing circuit 3.

The applicant of the present invention, when actually producing a circuit in which both the resistance value of the resistor 22 and the resistance value of the variable resistor by the FET 28 shown in FIG. It is confirmed that it works as an oscillator. The oscillation frequency is determined by the inductance of the inductor conductor of the LC element 30 and the capacitance of the capacitor formed in a distributed constant manner between the two inductor conductors, and the oscillation frequency changes when these values are changed. I'm sure.

Further, in this sine wave oscillator, when a variable resistor is connected in parallel to the inverter circuit 26 in the subsequent stage and the resistance value is reduced, the amplitude of the oscillation output is gradually reduced and becomes smaller than a certain value. Oscillation stops.

FIG. 5 is a diagram showing the relationship between the resistance value R2 of the variable resistor connected in parallel to the inverter circuit 26 in the subsequent stage and the amplitude of the oscillation output. As shown in the figure, the sine wave oscillator described above stops oscillating when the resistance value R2 is smaller than A, changes the amplitude between A and B in accordance with the change of the resistance value, and outputs the output amplitude above B. Is almost saturated.

(Usage Example 1 of Tuning Circuit) First, in the tuning circuit 4 of the present embodiment shown in FIG. 4, the resistance value R2 of the channel resistance between the source and drain of the FET 28 connected in parallel to the inverter circuit 26 at the subsequent stage is set to Consider a case where the value a is slightly smaller than A shown in FIG. 5 and the resistance value of the resistor 22 connected to the input side of the inverter circuit 24 is set to a predetermined value (finite value). By setting the resistance value of each resistor in this way, the tuning circuit 4 of the present embodiment is
Operates by acting as a filter that passes only signals near the oscillation frequency of the above-mentioned sine wave oscillator from the output of the mixing circuit 3 input to the input terminal 34 and outputs the signals. .

FIG. 6 is a diagram showing frequency characteristics of the tuning circuit 4 of the present embodiment in which the resistance values are set in this way. In the figure, the horizontal axis represents the frequency of the input signal, and the vertical axis represents the gain, that is, the ratio of the signal amplitude between the input and output signals in dB.

As shown in the figure, only a signal near a certain frequency passes, an output signal whose amplitude is almost equal to that of the input signal is output at the center frequency, and the input signal is attenuated at other frequencies.

Further, by changing the resistance value R1 of the resistor 22 provided in the preceding stage of the inverter circuit 24, the Q of the tuning circuit 4, that is, the pass band width of the signal can be changed. As shown in FIG. 6, when the resistance value R1 of the resistor 22 is large, only a signal having an extremely narrow frequency in the vicinity of the oscillation frequency of the sine wave oscillator described above is drawn in, resulting in a large Q and a narrow pass band width. On the other hand, when the resistance value R1 of the resistor 22 is reduced, a signal in a relatively wide range is drawn in, so that Q is small and the pass bandwidth is wide.

As described above, since the bandwidth of the tuning circuit 4 can be arbitrarily changed by changing the resistance value R1, it is necessary to pass the audio signal or the like in consideration of the separation of the adjacent FM waves. It is possible to appropriately determine the appropriate band.

(Use Example 2 of Tuning Circuit) By the way, in the above description, the FE connected in parallel to the inverter circuit 26.
Although the resistance value R2 of the channel resistance of T28 is set to a which is slightly smaller than A shown in FIG. 5, it may be set to A or more. The case of setting b between A and B shown in FIG. 5 is a state in which sine wave oscillation is performed in a state where no AC signal is input, and even when an AC signal is input in such a state, oscillation occurs. It has been confirmed that only signals near the frequency are pulled in and only signals near this frequency pass.

FIG. 7 is a diagram showing the frequency characteristic of the tuning circuit in which the resistance value R2 is set so as to oscillate in the state where no AC signal is input. In the figure, the horizontal axis represents the frequency of the input signal, and the vertical axis represents the gain, that is, the ratio of the signal amplitude between the input and output signals in dB.

Basically, the frequency characteristic shown in FIG.
The frequency characteristics are similar to those shown in (1), and only the signal in the vicinity of a certain frequency among the AC signals input to the tuning circuit 4 passes, and the input signal is attenuated at the other frequencies.

Further, it has been confirmed that the gain becomes larger than 0 and the input signal is amplified in the vicinity of the center frequency of the pass band. Therefore, when the tuning circuit 4 is used so as to oscillate a sine wave in the absence of an input signal, it can be operated as a tuning amplifier that passes only a signal near the oscillation frequency and amplifies the signal.

Further, when the resistance value R1 of the resistor 22 is varied, the Q of the tuning circuit, that is, the pass bandwidth can be changed similarly to the characteristic shown in FIG. 6, so that the optimum bandwidth can be easily obtained. Can be secured.

The two examples of use of the tuning circuit 4 shown above show what tuning characteristics the tuning circuit 4 has when the resistance value R2 between the source and drain of the FET 28 is set to a certain value. The actual tuning circuit 4
Since the AGC circuit 5 is connected to, the resistance value R2 changes according to the magnitude of the output amplitude of the tuning circuit 4.

For example, 79.5 MHz and 80.0 MHz
Consider the case where there is a broadcast wave of and there is no broadcast wave in the frequency between them. At a frequency between 79.5 MHz and 80.0 MHz where there is no broadcast wave, a signal having a constant amplitude is output from the output terminal 36 although there is no signal input to the input terminal 34 shown in FIG. AGC
Since the control is performed by the circuit 5, the resistance value R2 between the source and the drain of the FET 28 changes to the higher one, that is, from a to b shown in FIG. In this state, the tuning circuit 4 self-oscillates with no input.

From the self-oscillating state, the tuning frequency is set to 7
It is assumed that the frequency is changed to 9.5 MHz or 80.0 MHz.
79.5 MHz at input terminal 34 with self-oscillation
Alternatively, when a broadcast wave of 80.0 MHz is input, the output amplitude increases as the input increases, so that the resistance value R2 between the source and drain of the FET 28 decreases from b to a by the control of the AGC circuit 5. Changes to.

As described above, the self-oscillation is performed by the tuning circuit 4 even when there is no broadcast wave.
Unlike a receiver, there is no phenomenon that noise is generated in the absence of a carrier wave between broadcast waves, and a squelch circuit or a muting circuit used to eliminate this noise becomes unnecessary.

Further, the product name “Filmac” (manufactured by Niigata Seimitsu Co., Ltd.) is actually used as the distributed constant type LC element 30, and the circuit of FIG. 4 is constructed by using CMOS 4000 series inverter circuits 24 and 26. As a result of constructing and conducting experiments, it has been confirmed that the tuning circuit 4 having a pass band frequency of about 30 MHz can be realized. This frequency corresponds to CMOS 4000 series inverter circuit 2
The operating frequency is far exceeded when using 4, 26 as a digital circuit. That is, even when the tuning frequency is set to a high frequency of several tens of MHz, the tuning circuit 4 is constructed by using a general-purpose inexpensive CMOS inverter.
The tuning circuit 4 or the tuning circuit 4 can be configured.
Most of the components of the FM receiver, including, can be manufactured in an inexpensive semiconductor manufacturing process.

(Specific Example of LC Element) Next, a specific example of the LC element 30 included in the tuning circuit 4 will be described in detail. FIG.
[FIG. 3B] is a plan view of an LC element formed on a semiconductor substrate. 9 is an enlarged sectional view taken along the line AA shown in FIG.

The LC element 30 shown in these figures has a spiral n ⁺ region 202 formed near the surface of a p-type silicon substrate (p-Si substrate) 200 which is a semiconductor substrate.
Further, a spiral p ⁺ region 20 formed in a part thereof
4 and the n ⁺ region 202 and the p ⁺ region 204 form a pn junction layer 206.
In addition, a reverse bias voltage is applied between the p-Si substrate 200 and the n ⁺ region 202, and the n-region adjacent to the p-Si substrate 200 is rotated.
^The p-Si substrate 200 functions as an isolation region between the ⁺ regions 202.

The LC element 30 of the present embodiment is the surface of the above-mentioned n ⁺ region 202, which is the n ⁺ region 20.
The first electrode 210 having a spiral shape is formed at a position along the line 2. Similarly, on the surface of the p ⁺ region 204,
The spiral second electrode 212 is formed along the p ⁺ region 204. Further, three input / output electrodes 214, 216, and 218 are connected to both ends of the first electrode 210 and one end (for example, the outer peripheral side) of the second electrode 212, respectively. The three input / output electrodes 214, 2
The mounting of 16, 218 is done outside the active region so as not to damage the thin n ⁺ region 202 or p ⁺ region 204 as shown in FIG.

The LC element 30 having such a structure is
First and second electrodes 210 having a spiral shape,
Each of 212 acts as an inductor conductor. When the pn junction layer 206 electrically connected to each of the first and second electrodes 210 and 212 is used in the reverse bias state, it functions as a spiral capacitor. Therefore, the first and second electrodes 210, 212
A composite element in which the inductor formed by and the capacitor formed by the pn junction layer 206 exist in a distributed constant is formed.

In addition to the LC element 30 having the above-described structure, the p-Si substrate 200 is integrally formed with other components such as the inverter circuit 24 shown in FIG.
The entire tuning circuit 4 is integrated on one chip.

FIG. 10 is a diagram showing an equivalent circuit of the LC element having the structure shown in FIGS. 8 and 9. As shown in FIG. 3A, the first electrode 210 functions as an inductor having the inductance L1, and the second electrode 212 functions as an inductor having the inductance L2. In addition, a pn junction layer 206 is formed between the first and second electrodes 210 and 212 along the spiral winding direction. By using the pn junction layer 206 with a reverse bias, static A distributed constant capacitor having a capacitance C is formed. The LC element 30 included in the circuit shown in FIG. 4 is a simplified version of the equivalent circuit shown in FIG. 10A, and represents substantially the same element.

FIG. 10B shows a structure for applying a reverse bias voltage to the pn junction layer 206 included in the LC element 30. Specifically, the first input / output electrode 214 and the third
A variable voltage power source 9 for variable bias for applying a variable reverse bias voltage is connected between the input / output electrode 218 and the input / output electrode 218.

When the DC component of the signal input to the input terminal 34 of the tuning circuit 4 is constant, the signal shown in FIG.
The reverse bias of the pn junction layer 206 can be relatively changed by changing only the potential on the input / output electrode 218 side as shown in 0 (C). That is, the input terminal or the output terminal of the inverter circuit 24 is connected to both ends of the first electrode 214. For example, when the inverter circuit 24 is a CMOS inverter, the power supply voltage Vcc
Half of the voltage Vcc / 2 becomes the average voltage level of the input terminal or the output terminal of the inverter circuit 24 and becomes constant in terms of direct current, so that only the potential of the control terminal 38 for frequency control connected to the input / output electrode 218 is changed. Pn by changing
The reverse bias of the bonding layer 206 can be relatively changed. On the contrary, when the DC component of the signal output from the output terminal of the tuning circuit 4 is constant, that is, when the DC component of the input / output electrode 218 is constant, the input / output electrode 2
The reverse bias of the pn junction layer 206 can be relatively changed by changing only the potential on the 14 or 216 side.

As described above, the pn junction layer 206 shown in FIG.
By configuring the tuning circuit 4 shown in FIG. 4 using the LC element 30 capable of changing the reverse bias voltage applied between the n ⁺ region 202 and the p ⁺ region 204, the tuning frequency is arbitrarily set within a certain range. Can be changed. For example, in a general variable capacitance diode, the capacitance can be changed by about 50% by changing the reverse bias voltage.
By using the LC element 30 having the structure shown in FIG. 8, it can be seen that the pass band frequency can be changed by at least several tens of percent. Therefore, the output frequency of the tuning circuit 4 is 50M.
When set to around Hz, dozens of MHz to several tens of MH
The tuning frequency can be changed in the range of z and all F
The tuning circuit 4 capable of receiving M broadcast can be easily realized.

FIG. 11 is a diagram showing an example of a manufacturing process of the LC element 30 shown in FIG. The state in each manufacturing process of the BB line enlarged cross section of FIG. 8 is shown.

(1) Growth of epitaxial layer: First, after removing the oxide film on the surface of the p-Si substrate 200 (wafer), an n ⁺ type epitaxial layer 226 is grown on the entire surface of the p-Si substrate 200. (FIG. 11A).

(2) Formation of isolation region: Next, n ⁺ region 202 and p ⁺ region 204 shown in FIG.
Diffusion or ion implantation of p-type impurities is performed in order to make the region other than the above the isolation region.

Specifically, first, the epitaxial layer 226 is formed.
The surface of is thermally oxidized to form an oxide film 228. And
After the oxide film 228 at the position where the p region is to be formed is removed by photolithography, p-type impurities are selectively added by thermal diffusion or ion implantation to obtain p
Regions are selectively formed. The p region thus formed becomes a part of the p-Si substrate 200 to form an isolation region (FIG. 2 (B)).

As a result of the formation of the isolation region in this manner, the remaining epitaxial layer 226 forms the spiral n ⁺ region 202.

(3) Formation of pn junction layer: Next, by introducing a p-type impurity into a part of the spirally formed n ⁺ region 202 by thermal diffusion or ion implantation, the spirally formed p ⁺ region is formed. 204 is formed ((C) in the figure).

Specifically, first, p including the n ⁺ region 202
-The surface of the Si substrate 200 is thermally oxidized to form the oxide film 230. Then, after removing the oxide film 230 at the position where the p ⁺ region 204 is to be formed by photolithography, the p ⁺ region 204 is selectively formed by selectively adding p-type impurities by thermal diffusion or ion implantation. To be done.

This p ⁺ region 204 is formed by the n formed previously.
^Since it needs to be formed in the ⁺ region 202, the p ⁺ region 204 is formed by adding the p-type impurity in an amount equal to or larger than the amount of the n-type impurity already introduced.

In this way, the spiral pn junction layer 206 composed of the n ⁺ region 202 and the p ⁺ region 204 is formed.

(4) Formation of spiral electrode: Next, after forming an oxide film 232 on the surface by thermal oxidation, a spiral-shaped hole is formed on each surface of the n ⁺ region 202 and the p ⁺ region 204 by photolithography. Then, the first and second electrodes 210, 2 are formed by vapor-depositing aluminum, for example, on the spirally formed portion.
12 is formed ((D) in the figure). Further, thereafter, each of the three input / output electrodes 214, 216, 218 is formed by vapor deposition of aluminum.

The process of manufacturing the above-mentioned LC element 30 includes
Basically, it is similar to the process of manufacturing a normal bipolar transistor or diode, and the pn junction layer 20
6 and the shape of the isolation region between them are different. Therefore, this can be dealt with by changing the shape of the photomask in the process of manufacturing a general bipolar transistor, which is easy to manufacture and is suitable for downsizing.

Further, in the manufacturing process of the LC element 30 described above, the case where isolation is performed after first forming the n ⁺ region on the entire surface by epitaxial growth has been described as an example, but on the surface of the p-Si substrate 200. After forming the oxide film, holes corresponding to the spiral n ⁺ region 202 are formed by photolithography, and the n ⁺ region 202 is formed by introducing n-type impurities into this portion by thermal diffusion or ion implantation, The p ⁺ region 204 may be directly formed by the same method. Further, as a method of forming the pn junction layer, other general semiconductor manufacturing techniques can be used.

As described above, the FM receiver of this embodiment is
The tuning frequency can be continuously changed by varying the reverse bias voltage applied to the pn junction layer 206 of the LC element 30 in the tuning circuit 4. Therefore, it is possible to omit the variable condenser which has been indispensable in the past, and it is possible to significantly reduce the circuit scale of the entire FM receiver.

Further, unlike the conventional case, since the multiple variable capacitors and the plurality of variable caps corresponding to these are not used,
There are no interlocking errors, etc., and there is no need to consider them during design or manufacturing.

Further, in the FM receiver of this embodiment, the tuning circuit 4 is formed by components that can be formed on a semiconductor substrate such as an inverter circuit and an LC element, and the local oscillation circuit 2 whose oscillation frequency is fixed is also an inverter. Since it can be formed by using a circuit or the like, most of FM receivers except the speaker 8 and the like can be integrally formed on a semiconductor substrate into one chip without using a variable capacitor, a coil, or a transformer.
The overall size and cost of the M receiver can be reduced.

The present invention is not limited to the above embodiment, and various modifications can be made within the scope of the gist of the present invention.

For example, in the FM receiver of this embodiment described above, the case where the output of the tuning circuit 4 is directly input to the FM detection circuit 6 has been described. However, by providing a high frequency amplifier circuit between them, the tuning circuit You may make it carry out high frequency amplification of two steps before and after. When the two-stage high frequency amplification is performed in this way, the amplification degree can be suppressed to some extent by the preceding high frequency amplification, and a good SN ratio can be realized as a whole.

Further, in the FM receiver of this embodiment, the mixing circuit 3 is provided in front of the tuning circuit 4 to perform frequency conversion. However, the output of the high frequency amplifier circuit 1 is directly input to the tuning circuit 4 for tuning. It may be performed.

Further, in the present embodiment, the tuning circuit 4 included in the FM receiver has two inverter circuits 24, 2.
However, since these inverter circuits are used as analog elements, at least one of them may be formed by an inverting amplifier such as a source ground circuit.

Further, the LC element 30 shown in FIG.
Although the pn junction layer 206 is formed so as to correspond to substantially the entire length of the second electrodes 210 and 212, it may be replaced with a partially corresponding LC element 30a as shown in FIG.

Further, although the FET 28 is used as a variable resistance in the tuning circuit 4 of the present embodiment described above, the p-channel FET and the n-channel FET are connected in parallel to form a variable resistance, and the gate voltage of each FET is formed. May be changed. The point that the resistance value can be changed by changing the magnitude of the gate voltage is the same as in the case of the FET 28 shown in FIG. 4, but by combining two FETs in this way to form a variable resistance Since the non-linear region can be improved, the distortion of the output signal of the tuning circuit 4 can be further reduced.

Further, in each of the above-described embodiments, the description has been given by exemplifying the broadcast wave as the FM wave if necessary, but an FM wave using another frequency region or an FM modulated signal other than the audio signal is used. The present invention can also be applied to an FM receiver that receives an existing FM wave, such as a mobile phone or a teletext receiver.

Further, in the above description of the LC element 30,
Although the stray capacitance generated between the p-Si substrate 200 and the pn junction layer 206 is neglected, if the components shown in FIG. 4 are actually formed on the semiconductor substrate, the influence of the stray capacitance cannot be neglected. . This point has also been confirmed by simulation, and the characteristic is a change that is much smoother than the characteristic shown in FIG. Further, since there is a stray capacitance, the degree of change in the tuning frequency when the capacitance of the pn junction layer 206 is changed is small, which is not practical. Since the generation of stray capacitance causes various inconveniences, it would be convenient if the generation of unnecessary capacitance itself could be avoided.

FIG. 13 is a plan view of the LC element 30b in which the generation of stray capacitance is suppressed. 14 is an enlarged cross-sectional view taken along the line CC shown in FIG.

The LC element 30b shown in these figures is the same as that shown in FIG.
The LC element 30 shown in FIG.
The difference is that the p-well 302 formed on a part of the -Si substrate 300 is formed near the surface. In addition, an electrode 310 is applied to the p-well 302 in order to apply a predetermined voltage.
Is provided.

In the LC element 30b having such a structure, when a reverse bias voltage is applied to the pn junction layer 206, the potential of the p well 302 and the potential of the n ⁺ region 202 in contact with the p well 302 are substantially the same. To be
A predetermined voltage is applied to the electrode 310. In this way, if the potentials of the p well 302 and the n ⁺ region 202 become almost the same, it is possible to suppress the generation of stray capacitance in the vicinity of the boundary where they are adjacent. Similarly, FIG. 15 is a plan view of the LC element 30c in which generation of stray capacitance is suppressed, and shows a configuration corresponding to the LC element 30a shown in FIG.

[0086]

As described above, according to the present invention, only the desired FM wave is directly extracted by changing the tuning frequency of the tuning circuit. This tuning circuit can be realized by a simple circuit configuration including a distributed constant type LC element formed on a semiconductor substrate and two inverter circuits or inverting amplifiers, and most of the FM receiver components together with circuits other than the tuning circuit. Can be integrally formed on a semiconductor substrate. In addition, the bandwidth can be adjusted by changing the resistance value of the first resistor included in the tuning circuit.
Since a desired FM wave can be separated even with a small number of stages or a small number of stages, the multiple variable capacitors used in the conventional super-heterodyne system are unnecessary. More specifically, the above-mentioned LC element has two inductor conductors having a spiral shape and a pn junction layer having a spiral shape along these inductor conductors.
By changing the reverse bias voltage applied to the junction layer,
Since the capacitance of the capacitor formed in a distributed constant, that is, the element constant of the LC element changes, the tuning frequency of the tuning circuit that is determined by the element constant of the LC element can also be changed arbitrarily, eliminating the need for a variable capacitor. .

Further, a good SN ratio can be realized by performing high frequency amplification in the front stage of the tuning circuit, or in addition to this, in the rear stage of the tuning circuit.

Also, by changing the resistance value of the second resistor included in the tuning circuit, the output amplitude of the tuning circuit can be changed, and the gain control can be performed with a simple structure. The second resistance described above can be realized by using the channel of the FET as a resistor, and in particular, the p-channel F
When the ET and the n-channel FET are used in parallel connection, the non-linear characteristic of the FET can be improved, so that a tuning signal with less distortion can be obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an FM receiver according to an embodiment to which the present invention is applied.

FIG. 2 is a diagram showing a specific example of an AGC circuit.

FIG. 3 is a diagram showing a specific example of an FM detection circuit.

4 is a circuit diagram of a tuning circuit included in the FM receiver shown in FIG.

FIG. 5 is a diagram showing a relationship between a resistance value of a variable resistor connected in parallel to a second-stage inverter circuit and a signal amplitude of an oscillation output.

FIG. 6 is a diagram showing frequency characteristics of a tuning circuit.

FIG. 7 is a diagram showing frequency characteristics of a tuning circuit.

FIG. 8 is a plan view of an LC element formed on a semiconductor substrate.

9 is an enlarged cross-sectional view taken along the line AA shown in FIG.

10 is a diagram showing an equivalent circuit of the LC element shown in FIG.

FIG. 11 is a diagram showing an example of a manufacturing process of an LC element.

FIG. 12 is a diagram showing a modification of the LC element.

FIG. 13 is a diagram showing another modification of the LC element.

FIG. 14 is an enlarged cross-sectional view taken along line CC shown in FIG.

FIG. 15 is a diagram showing another modification of the LC element.

FIG. 16 is a block diagram showing a configuration of a conventional FM receiver.

[Explanation of symbols]

 1 High Frequency Amplifier Circuit 2 Local Oscillation Circuit (LOC) 3 Mixing Circuit 4 Tuning Circuit 5 Automatic Gain Control (AGC) Circuit 6 FM Detection Circuit 7 Low Frequency Amplifier Circuit 8 Speaker 9 Variable Voltage Power Supply 10 Antenna 22 Resistor 24, 26 Inverter Circuit 28 FET 30 LC element

Claims (13)

[Claims] 1. An FM receiver having a tuning circuit for selecting a frequency wave near a predetermined frequency from among FM waves received by an antenna, and an FM detection circuit for extracting an FM modulation signal from an output signal of the tuning circuit. In the tuning circuit, a first inverter circuit to which an AC signal is input via a first resistor and a second resistor are connected in parallel, and a first inverter circuit connected to an output side of the first inverter circuit. 2 inverter circuits, 2 inductor conductors formed in parallel on the semiconductor substrate, and a capacitor by a pn junction layer formed in a distributed constant manner between these 2 inductor conductors,
The output of the first inverter circuit is fed back to the input side through one of the two inductor conductors, and a part of the other of the two inductor conductors is included in the second inverter circuit. LC connected to the output side
And an element, wherein the FM wave inputted to the first resistor is tuned by passing a signal in the vicinity of a predetermined frequency from the FM wave and outputting the signal from the second inverter circuit. Receiving machine. 2. An FM receiver having a tuning circuit for selecting a frequency wave near a predetermined frequency from FM waves received by an antenna, and an FM detection circuit for extracting an FM modulated signal from an output signal of the tuning circuit, The tuning circuit has a first inverting amplifier to which an AC signal is input via a first resistor and a second resistor connected in parallel, and a first inverting amplifier connected to the output side of the first inverting amplifier. 2 inverting amplifiers, two inductor conductors formed in parallel on the semiconductor substrate, and a pn junction layer capacitor formed in a distributed constant manner between these two inductor conductors,
The output of the first inverting amplifier is fed back to the input side through one of the two inductor conductors, and a part of the other of the two inductor conductors is connected to the second inverting amplifier. An LC element connected to the output side, and tuning is performed by passing a signal in the vicinity of a predetermined frequency from the FM wave input to the first resistor and outputting the signal from the second inverting amplifier. An FM receiver characterized by performing. 3. The FM receiver according to claim 1, further comprising a high frequency amplifier circuit that amplifies an FM wave received by the antenna, before the tuning circuit. 4. The FM receiver according to claim 1, further comprising a high frequency amplifier circuit that amplifies a signal output from the tuning circuit between the tuning circuit and the FM detection circuit. Machine. 5. The difference signal or sum signal according to claim 1, wherein an oscillator for generating a sine wave having a fixed frequency and an output of the oscillator and an FM wave received by the antenna are mixed with each other. And a mixing circuit for inputting to the tuning circuit, and performing frequency conversion on the received FM wave. 6. The gain control circuit according to claim 1, further comprising a gain control circuit that outputs a control signal according to the magnitude of the output amplitude of the tuning circuit, and the tuning circuit is provided according to the control signal. An FM receiver characterized in that the output amplitude of the tuning circuit is adjusted by varying the resistance value of the second resistor included. 7. The device according to claim 6, wherein the second resistor is formed by a channel of an FET, and the F is generated in accordance with a control signal output from the gain control circuit.
An FM receiver characterized by changing a channel resistance by changing a gate voltage of ET. 8. The device according to claim 6, wherein the second resistor is formed by connecting a p-channel type FET and an n-channel type FET in parallel, and is formed in accordance with a control signal output from the gain control circuit. An FM receiver characterized in that the channel resistance is changed by changing the magnitude of the gate voltage of each FET. 9. The FM receiver according to claim 1, wherein a tuning bandwidth is adjusted by changing a resistance value of the first resistor included in the tuning circuit. 10. The spiral element according to claim 1, wherein the LC elements are arranged concentrically adjacent to each other on the semiconductor substrate and function as the two inductor conductors. One electrode and a region near the surface of the semiconductor substrate and along the two electrodes, and a p region is electrically connected to one of the two electrodes and an n region is electrically connected to the other. And a spiral pn junction layer that functions as the capacitor by applying a reverse bias voltage, and an FM receiver. 11. The LC element according to claim 1, wherein the LC element is arranged adjacent to a well formed on the semiconductor substrate substantially concentrically on the well,
Two spiral-shaped electrodes functioning as the two inductor conductors, and a p region formed in a position near the surface of the well and along the two electrodes, and a p region is formed on either one of the two electrodes. A spiral-shaped pn junction layer that is electrically connected to the other side and that functions as the capacitor by applying a reverse bias voltage; and the potential of the well and the p region in contact with the well. Alternatively, the FM receiver is characterized in that the potential of the n region is substantially the same. 12. The capacitance according to claim 10, wherein the reverse bias voltage applied to the pn junction layer is changed to change the capacitance of the pn junction layer.
An FM receiver characterized by changing a tuning frequency. 13. The FM receiver according to claim 1, wherein components are integrally formed on the semiconductor substrate.