JP4004277B2 - Manufacturing method of semiconductor device - Google Patents

Description

[0001]
[Field of the Invention]
The present invention is a method of manufacturing a semiconductor device that is effective when a silicon film for a gate electrode to which boron is added is buried in a trench portion of a MOSFET or IGBT using the trench portion.
[0002]
[Prior art]
Recently, many MOSFETs and IGBTs have a high degree of integration having a groove-type structure in order to improve on-characteristics. In order to form a channel in the trench, it is necessary to form a gate oxide film on the sidewall of the trench and bury a silicon film for the gate electrode in the remaining trench. In order to ensure the yield and reliability of the element, it is necessary to uniformly apply the silicon film to the groove. That is, a film with good step coverage is required. Further, in order to make the MOSFET and IGBT operate uniformly with respect to each cell portion and at high speed, it is necessary to make the silicon film as the gate electrode as low resistance as possible. For this reason, the resistance is lowered by adding impurities to the silicon film. The demand for step coverage and low resistance is increasing as the degree of integration increases and miniaturization progresses.
[0003]
In the p-channel MOSFET and IGBT, it is required to manufacture a boron-added silicon film in the manufacturing process. The formation of the boron-added silicon film is a difficult process compared to the formation of the phosphorus-added silicon film required for n-channel MOSFETs and IGBTs.
[0004]
7, 8, and 9 are views for explaining a manufacturing process of a conventional semiconductor device. The process of forming a silicon film in the groove of the silicon substrate is shown. Hereinafter, conventional examples will be described.
[0005]
Using the silicon oxide film 32 adhered to the surface of the silicon substrate 30 shown in FIG. 7 as a mask, a groove 34 is formed on the surface of the silicon substrate 30 by anisotropic dry etching, and a MOSFET or IGBT is formed on the side wall of the groove 34. A silicon oxide film 31 to be a gate oxide film is formed. Next, the silicon substrate 30 is placed in a reaction chamber of the CVD apparatus, the silicon substrate is kept at 550 ° C., a mixed gas of monosilane gas and diborane gas is introduced into the CVD apparatus, the monosilane gas is decomposed, and a step including a small amount of boron. A silicon film 33 with good coverage is deposited.
[0006]
Thereafter, as shown in FIG. 8, the boron impurity concentration containing more boron than the deposited silicon film 33 by the mixed gas of monosilane gas and diborane gas while keeping the temperature of the silicon substrate at 550 ° C. in the CVD apparatus. A high silicon film 35 is deposited until the surface of the silicon substrate is flattened.
[0007]
Next, this silicon substrate 30 is kept at 900 ° C. for 30 minutes in a non-oxidizing atmosphere, and boron is diffused from the silicon film 35 to the silicon film 33, so that boron in the silicon films 33 and 35 in the groove 34 is formed. Make the concentration uniform.
[0008]
Thereafter, using an anisotropic dry etching apparatus, as shown in FIG. 9, the silicon films 33 and 35 deposited on the silicon substrate are etched to leave the silicon films 33 and 35 only in the groove 34, and the MOSFET is embedded. A silicon electrode is produced.
[0009]
In this way, a silicon film 33 having a relatively low boron concentration with good step coverage is deposited, and in order to lower the resistance of the gate electrode, a silicon film 35 having a relatively high boron concentration is deposited and then heat-treated. By filling the groove 34 without a gap, silicon films 33 and 35 having a certain low resistance can be obtained. However, even lower resistances are required for the gate electrodes of recent high performance and higher integration MOSFETs and IGBTs.
The monosilane gas does not undergo thermal decomposition unless the temperature is higher than 500 ° C., and the diborane gas does not decompose unless the temperature is much lower than this, so that it is difficult to increase the boron concentration in the silicon film. Lowering the reaction of the monosilane gas to 500 ° C or less is not very effective in increasing the boron concentration, but also reduces the film deposition rate and deteriorates the step coverage, so it can be used for production. Absent.
[0010]
FIG. 10 is a cross-sectional view of a semiconductor device for explaining problems of a conventional manufacturing method. A mixed gas of disilane gas and diborane gas can also be used when depositing the silicon films 33 and 35. Since the mixed gas of disilane gas and diborane gas is relatively low in temperature and has a small difference in thermal decomposition temperature, the boron concentration can be sufficiently increased, and the uniformity of boron distribution, that is, the uniformity of resistance is also good. However, when high-order silane gas containing disilane gas is used when the silicon films 33 and 35 are deposited and buried in the groove 24, it is easy to create voids. When these silicon films 33 and 35 are etched in order to leave the silicon films 33 and 35 only in the groove portion 24 when the air gap remains, the etching gas enters the air gap and the air gap in the groove portion 34 becomes larger, and reliability, Adversely affects properties.
[0011]
As described above, the conventional method cannot cope with the production of a silicon film having a low resistance and a small gap, which is required for a gate electrode of a recent high-performance MOSFET with higher integration and IGBT. Also, it is difficult to completely suppress the generation of voids by the method of filling the groove 34 with a film having good step coverage and a low resistance silicon film having poor step coverage.
[0012]
[Problems to be solved by the invention]
The present invention has been made in view of the above-described problems of the prior art, and its purpose is to reduce the resistivity of the silicon film filling the trench, eliminate the variation in resistivity, and eliminate the generation of voids. is there.
[0013]
[Means to solve the problem]
We have found a method of manufacturing a semiconductor device that has low resistance, little variation, and no voids by combining a silicon film with a mixed gas of silane gas and diborane gas and a silicon film with a mixed gas of disilane gas or higher order silane gas and diborane gas.
[0014]
As a means for solving the above-described problems, a method of manufacturing a semiconductor device according to the present invention includes a first step of forming a silicon oxide film on a semiconductor substrate having a groove, and monosilane gas and diborane gas on the silicon oxide film. A second step of depositing a first silicon film containing boron impurities by thermal decomposition of the mixed reaction gas; and the first step by thermal decomposition of the reaction gas mixed with disilane gas and diborane gas on the first silicon film. A third step of depositing a second silicon film containing a higher concentration of boron impurities than the silicon film, and a non-oxidizing property for making the boron impurity concentrations of the first silicon film and the second silicon film uniform And a fourth step of performing a heat treatment in an atmosphere, wherein the second step includes the first silicidation so as to fill the groove without gaps. Characterized by depositing the emission layer.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
1, 2, and 3 are cross-sectional views for explaining a manufacturing process of a semiconductor device according to the first embodiment of the present invention. 4, 5, and 6 are cross-sectional views for explaining a manufacturing process of a semiconductor device according to the second embodiment of the present invention.
[0016]
A first embodiment will be described.
As shown in FIG. 1, a silicon oxide film 12 is grown on the surface of the silicon substrate 10 by heat-treating the silicon substrate 10 in an oxidizing atmosphere. Next, the silicon oxide film 12 corresponding to the portion where the groove 14 is to be formed is removed by subjecting the silicon oxide film 12 to photographic processing. Using the remaining silicon oxide film 12 as a mask, a trench 14 having a width of 0.6 μm and a depth of 5 μm is formed by anisotropic dry etching. Next, the silicon substrate is heat-treated in an oxidizing atmosphere to form a silicon oxide film 11 having a thickness of 0.05 μm on the side wall of the groove 14.
[0017]
Next, the silicon substrate 10 is placed in a reaction chamber of a low pressure CVD apparatus, the silicon substrate is kept at 500 ° C., and the reaction chamber of the low pressure CVD apparatus is evacuated to a vacuum degree of 0.1 Pa. After that, a mixed gas having a flow rate of 90 sccm and 14 sccm for the monosilane gas that is the film forming gas for the silicon film 13 and diborane gas that is the impurity addition gas is introduced, respectively, and the degree of vacuum in the reaction chamber of the low pressure CVD apparatus is 13 Pa. In this state, the mixed gas of monosilane gas and diborane gas is decomposed, and a silicon film 13 containing a small amount of boron is deposited on the surface of this silicon substrate to a thickness of 0.125 μm.
[0018]
Next, nitrogen gas is introduced into the reaction chamber of the low pressure CVD apparatus, the gas in the reaction chamber is replaced while adjusting the degree of vacuum in the reaction chamber to 30 Pa, and the temperature of the silicon substrate is increased to 380 ° C. while the nitrogen gas is flowing. Lower.
This silicon substrate is kept at 380 ° C., and the reaction chamber of the low pressure CVD apparatus is evacuated to a vacuum degree of 0.1 Pa. Thereafter, a mixed gas having a flow rate of 150 sccm and 25 sccm of disilane gas, which is a film forming gas for the silicon film 13, and diborane gas, which is an impurity addition gas, is introduced, respectively, and the degree of vacuum in the reaction chamber of the low pressure CVD apparatus is set to 30 Pa. In this state, the mixed gas of disilane gas and diborane gas is decomposed, a silicon film 15 containing a large amount of boron is deposited on the surface of this silicon substrate 10 to a thickness of 0.125 μm, and silicon is embedded in the groove 24, and this silicon substrate 10 Flatten the surface.
[0019]
The processed silicon substrate 10 is placed in an annealing furnace, the silicon substrate 10 is kept at 850 ° C., and heat treatment is performed in a non-oxidizing atmosphere for 30 minutes to diffuse boron from the silicon film 15 to the silicon film 13. The boron concentration of the silicon films 13 and 15 in the groove 14 is made uniform.
[0020]
Thereafter, using an anisotropic dry etching apparatus, as shown in FIG. 3, the silicon films 13 and 15 deposited on the silicon substrate 10 are etched to leave the silicon films 13 and 15 only in the groove portions 14. In this way, a buried silicon electrode of the MOSFET is formed.
[0021]
Next, a second embodiment will be described. A feature different from the first embodiment is the thickness of the deposited silicon film.
As in the first embodiment, a silicon oxide film 22 is grown on the surface of the silicon substrate 20 as shown in FIG. Using this as a mask, a groove portion 14 having a width of 0.6 μm and a depth of 5 μm is formed using an anisotropic dry etching technique, and an oxide film 21 having a thickness of 0.05 μm is formed on the sidewall of the groove portion 24.
[0022]
Next, this silicon substrate 20 is placed in a reaction chamber of a low pressure CVD apparatus, and a silicon film 23 containing a small amount of boron is deposited on the surface of the silicon substrate 20 to a thickness of 0.25 μm or more, as in the first embodiment. As shown in FIG. 4, the silicon film 23 fills the grooves 24, and the surface of the silicon substrate 20 is smoothed.
[0023]
Next, the silicon substrate 20 is placed in a reaction chamber of a low pressure CVD apparatus, and a silicon film 25 containing a large amount of boron is formed on the silicon substrate 20 as shown in FIG. A thickness of 0.25 μm is deposited on the surface.
[0024]
This silicon substrate 20 is placed in an annealing furnace, and heat treatment is performed at 850 ° C. for 30 minutes in the same non-oxidizing atmosphere as in the first embodiment, so that boron is diffused from the silicon film 25 into the silicon film 23, thereby forming the groove portion 24. The boron concentration of the inner silicon film 23 is made uniform.
[0025]
In the second embodiment, the silicon film embedded in the groove portion 24 is only the silicon film 23 with good step coverage, and no film with poor step coverage is embedded as in the first embodiment, so there is no gap. Can not. Further, boron added to the silicon film 25 needs to be sufficiently diffused over the entire silicon film 23 to a depth of about 5 μm. However, since the silicon films 23 and 25 are polycrystalline or amorphous, the impurities are very high. It was easily diffused and sufficiently diffused in the silicon film 23 in the groove 24, and it was confirmed that the specific resistance of the silicon film 23 was sufficiently lowered.
[0026]
Although the silicon substrate has been described as the semiconductor substrate, it may be n-type silicon or p-type silicon. Further, it may be a silicon carbide or other semiconductor substrate. Even if the oxide film used for the groove forming mask is not a silicon oxide film, it may be a mask for forming the groove of the semiconductor substrate and may be a film of silicon nitride or the like that can prevent boron from diffusing into the semiconductor substrate. Good. The silicon oxide film formed inside the groove may be a silicon oxide film inside the groove, and may be a two-layer film or the like in which the silicon side to be embedded is a silicon nitride film and the inside of the groove is a silicon oxide film. Good.
[0027]
Regarding the use of the semiconductor device manufacturing method of the present invention, it has been described that it is effective for embedding a silicon film for a gate electrode to which boron is added in the trench portion of a MOSFET or IGBT using the trench portion. You can also.
[0028]
【The invention's effect】
According to the present invention, the resistivity of the silicon film filling the trench can be lowered, and variation in low efficiency can be reduced. Further, by using a film with good step coverage, a film without voids can be manufactured, and a reliable method for manufacturing a semiconductor device can be provided. By applying to a MOSFET or IGBT, on-resistance and high-speed characteristics can be improved. In addition, a high-speed response can be achieved by applying to a memory element using a groove.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view for illustrating a manufacturing step of a semiconductor device according to a first embodiment of the invention.
FIG. 2 is a cross-sectional view for illustrating a manufacturing step of the semiconductor device according to the first embodiment of the invention.
FIG. 3 is a cross-sectional view for illustrating a manufacturing step of the semiconductor device according to the first embodiment of the invention.
FIG. 4 is a cross-sectional view for illustrating a manufacturing step of the semiconductor device according to the second embodiment of the present invention.
FIG. 5 is a cross-sectional view for illustrating a manufacturing step of the semiconductor device according to the second embodiment of the present invention.
FIG. 6 is a cross-sectional view for illustrating a manufacturing step of the semiconductor device according to the second embodiment of the present invention.
FIG. 7 is a cross-sectional view for explaining a manufacturing process of a conventional semiconductor device.
FIG. 8 is a cross-sectional view for explaining a manufacturing process of a conventional semiconductor device.
FIG. 9 is a cross-sectional view for explaining a manufacturing process of a conventional semiconductor device.
FIG. 10 is a cross-sectional view of a semiconductor device for illustrating problems in a conventional method for manufacturing a semiconductor device.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 Silicon substrate 11, 12 Silicon oxide film 13, 15 Silicon film 14 Groove part 20 Silicon substrate 21, 22 Silicon oxide film 23, 25 Silicon film 24 Groove part 30 Silicon substrate 31, 32 Silicon oxide film 33, 35 Silicon film 34 Groove part

Claims (1)

A first step of forming a silicon oxide film on a semiconductor substrate having a groove;
A second step of depositing a first silicon film containing boron impurities on the silicon oxide film by thermal decomposition of a reaction gas mixed with monosilane gas and diborane gas;
A third step of depositing a second silicon film containing a higher concentration of boron impurities than the first silicon film by thermal decomposition of a reaction gas mixed with disilane gas and diborane gas on the first silicon film;
In a method for manufacturing a semiconductor device, comprising: a fourth step of performing a heat treatment in a non-oxidizing atmosphere that makes the boron impurity concentration of the first silicon film and the second silicon film uniform.
In the second step, the first silicon film is deposited so as to fill the groove portion without a gap.

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