JP2003158092A - Manufacturing method for semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method for a semiconductor device for reducing resistivity of silicon films 13 and 15 filling a groove part 14, eliminating the dispersion and eliminating generation of a gap. SOLUTION: The manufacturing method for the semiconductor device is provided with a first step of forming oxide films 11 and 12 on a surface of a semiconductor substrate 10 having the groove part 14, a second step of depositing a first silicon film 13 containing boron impurities of a prescribed concentration by thermal decomposition of a reaction gas in which a silicon compound gas and a boron compound gas are mixed, a step of depositing a second silicon film 15 containing the prescribed boron impurities different from the prescribed boron concentration on the first silicon film 13 by the thermal decomposition of the reaction gas in which the silicon compound gas and the boron compound gas are mixed, and a step of heat treatment of averaging boron impurity concentrations in the silicon films 13 and 15.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a MOS using a groove.
This is a method of manufacturing a semiconductor device which is effective when a silicon film for a gate electrode to which boron is added is embedded in a groove portion of an FET or an IGBT.

[0002]

2. Description of the Related Art Recently, many MOSFETs and IGBTs having a groove type structure and having a high degree of integration are used for improving the on-characteristics. In order to form a channel in the groove, it is necessary to form a gate oxide film on the sidewall of the groove and fill the remaining groove with a silicon film for a gate electrode. In order to secure the yield and reliability of the device, it is necessary to uniformly apply the silicon film to the groove. That is, a film having good step coverage is required. Further, in order to operate the MOSFET and the IGBT uniformly and at high speed with respect to each cell portion, the silicon film used as the gate electrode needs to have a resistance as low as possible. Therefore, impurities are added to the silicon film to reduce the resistance. The requirements for step coverage and low resistance are becoming stronger as the degree of integration increases and miniaturization progresses.

In p-channel MOSFETs and IGBTs,
It is required to manufacture a boron-added silicon film in the manufacturing process. The formation of this boron-added silicon film is a more difficult process than the formation of the phosphorus-added silicon film required for n-channel MOSFETs and IGBTs.

FIG. 7, FIG. 8 and FIG. 9 are views for explaining a conventional manufacturing process of a semiconductor device. It shows a process of forming a silicon film in a groove portion of a silicon substrate. Hereinafter, a conventional example will be described.

Using the silicon oxide film 32 attached to the surface of the silicon substrate 30 shown in FIG. 7 as a mask, a groove 34 is formed on the surface of the silicon substrate 30 by anisotropic dry etching, and the side wall of the groove 34 is formed. MOSFET and I
A silicon oxide film 31 to be a gate oxide film of GBT is formed. Next, the silicon substrate 30 is placed in a reaction chamber of a CVD apparatus, the silicon substrate is kept at 550 ° C., a mixed gas of monosilane gas and diborane gas is introduced into the CVD apparatus, the monosilane gas is decomposed, and a step containing a small amount of boron is formed. A silicon film 33 having good coverage is deposited.

Thereafter, as shown in FIG. 8, while the temperature of the silicon substrate was kept at 550 ° C. in the CVD apparatus, a mixed gas of monosilane gas and diborane gas contained more boron than the deposited silicon film 33. A silicon film 35 having a high boron impurity concentration is deposited until the surface of the silicon substrate is flattened.

Next, the silicon substrate 30 is kept at 900 ° C. in a non-oxidizing atmosphere and heat-treated for 30 minutes to diffuse boron from the silicon film 35 to the silicon film 33.
The boron concentration of the silicon films 33 and 35 in the groove 34 is made uniform.

Then, using an anisotropic dry etching apparatus, as shown in FIG. 9, the silicon films 33 and 35 deposited on the silicon substrate are etched to leave the silicon films 33 and 35 only in the groove 34. A buried silicon electrode of MOSFET is manufactured.

In this way, a silicon film 33 having a relatively low boron concentration, which has good step coverage, is deposited, and a silicon film 35 having a relatively high boron concentration is deposited in order to further reduce the resistance of the gate electrode. By doing so, it is possible to fill the groove portion 34 without voids and obtain the silicon films 33 and 35 having a somewhat low resistance. However, even lower resistance is required for the gate electrodes of recent high performance and highly integrated MOSFETs and IGBTs. It is difficult to raise the concentration of boron in the silicon film any more because the monosilane gas does not undergo thermal decomposition unless it is heated to a temperature higher than 500 ° C. and the diborane gas does not decompose unless the temperature is considerably lower than this. Reaction of monosilane gas at 500 ° C
Lowering the temperature below is not very effective in increasing the boron concentration, but also slows down the deposition rate of the film and deteriorates the step coverage, so it is not very useful for production.

FIG. 10 is a cross-sectional view of a semiconductor device for explaining the problems of the conventional manufacturing method. Silicon film 33,
It is also possible to use a mixed gas of disilane gas and diborane gas when depositing 35. Since the mixed gas of disilane gas and diborane gas has a relatively low temperature and the difference in thermal decomposition temperature is small, the boron concentration can be sufficiently increased, and the boron distribution is uniform, that is, the resistance is uniform. However, when a high-order silane gas containing disilane gas is used when depositing and burying the silicon films 33 and 35 in the groove 24, it is easy to form voids. When the voids remain, the silicon films 33 and 35 are left only in the groove 24 so that the silicon films 3 and 35 are not formed.
When etching 3, 35, the etching gas enters into the voids, and the voids in the groove 34 become large, resulting in reliability and
It has a bad influence on the characteristics.

As described above, the conventional method cannot cope with the formation of a silicon film having a low resistance and a small amount of voids, which is required for a gate electrode of a recent high performance and highly integrated MOSFET or IGBT. Further, it is difficult to completely suppress the generation of voids by the method of filling the groove 34 with a film having good step coverage and a low resistance silicon film having poor step coverage.

[0012]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the prior art, and an object thereof is to reduce the resistivity of the silicon film filling the groove portion and to reduce the variation in the resistivity. It is to eliminate the generation of voids.

[0013]

A semiconductor device having low resistance, less variation, and no voids formed by combining a silicon film formed by a mixed gas of silane gas and diborane gas and a disilane gas or a silicon film formed by a mixed gas of high-order silane gas and diborane gas. I found a manufacturing method of.

In order to solve the above-mentioned problems, the invention according to claim 1 is the first step of forming a predetermined silicon oxide film on the surface of a semiconductor substrate having a groove, and the thermal decomposition of a reaction gas mixed with monosilane gas and diborane gas. By a second step of depositing a first silicon film containing a predetermined concentration of boron impurities by means of thermal decomposition of a reaction gas mixed with a high-order silane gas and diborane gas by the predetermined boron on the first silicon film. A third step of depositing a second silicon film containing a predetermined boron impurity having a different concentration, and a fourth step of averaging the impurity concentrations of the first silicon film and the second silicon film by heat treatment. And a step of manufacturing the semiconductor device. The invention according to claim 2 is the method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor substrate is a silicon substrate, and the high-order silane gas in the third step is disilane gas. The invention according to claim 3 is the method for manufacturing a semiconductor device according to claim 1 or 2, wherein the groove portion is filled in the second step of depositing the first silicon film, and then the first silicon film is formed. A second silicon film is deposited.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1, FIG. 2 and FIG.
FIG. 6 is a cross-sectional view for explaining the manufacturing process for the semiconductor device according to the embodiment. 4, 5 and 6 are cross-sectional views for explaining the manufacturing process of the semiconductor device according to the second embodiment of the present invention.

The first embodiment will be described. As shown in FIG. 1, the silicon substrate 10 is heat-treated in an oxidizing atmosphere to grow a silicon oxide film 12 on the surface of the silicon substrate 10. Next, this silicon oxide film 12
Is subjected to a photo process to remove the silicon oxide film 12 corresponding to the portion where the groove 14 is formed. Using the remaining silicon oxide film 12 as a mask, a groove 14 having a width of 0.6 μm and a depth of 5 μm is formed by anisotropic dry etching.
Next, the silicon substrate is heat-treated in an oxidizing atmosphere to form a silicon oxide film 11 having a thickness of 0.05 μm on the side wall of the groove 14.

Next, the silicon substrate 10 is placed in the reaction chamber of the low pressure CVD apparatus, the temperature of the silicon substrate is kept at 500 ° C., and the reaction chamber of the low pressure CVD apparatus is evacuated to a vacuum degree of 0.1 Pa. Then, a mixed gas containing monosilane gas, which is a gas for forming the silicon film 13, and diborane gas, which is an impurity-adding gas, at a flow rate of 90 sccm and 14 sccm, respectively, is introduced, and the degree of vacuum in the reaction chamber of the low pressure CVD apparatus is set to 13 Pa. While maintaining the same, a mixed gas of monosilane gas and diborane gas is decomposed to form a silicon film 13 containing a small amount of boron on the surface of the silicon substrate with a thickness of 0.
Deposit 125 μm.

Next, nitrogen gas is introduced into the reaction chamber of the low pressure CVD apparatus, the gas in the reaction chamber is replaced while adjusting the degree of vacuum in the reaction chamber to 30 Pa, and the temperature of this silicon substrate is kept while flowing the nitrogen gas. Decrease to 380 ° C. This silicon substrate is kept at 380 ° C., and the reaction chamber of the low pressure CVD apparatus is evacuated to a vacuum degree of 0.1 Pa. After that, disilane gas, which is a gas for forming the silicon film 13, and diborane gas, which is an impurity-adding gas, are supplied at 150 sccm and 2 respectively.
A mixed gas having a flow rate of 5 sccm was introduced, and the mixed gas of disilane gas and diborane gas was decomposed in a state where the degree of vacuum in the reaction chamber of the low pressure CVD apparatus was maintained at 30 Pa to form a silicon film 15 containing a large amount of boron. A groove portion 24 is formed on the surface of the silicon substrate 10 with a thickness of 0.125 μm.
Is filled with silicon to flatten the surface of the silicon substrate 10.

The processed silicon substrate 10 is placed in an annealing furnace, the silicon substrate 10 is kept at 850 ° C., and heat treatment is performed for 30 minutes in a non-oxidizing atmosphere.
Boron is diffused from the silicon film 15 to the silicon film 13 to make the boron concentrations of the silicon films 13 and 15 in the groove 14 uniform.

Thereafter, as shown in FIG. 3, the anisotropic dry etching apparatus is used to etch the silicon films 13 and 15 deposited on the silicon substrate 10 to leave the silicon films 13 and 15 only in the groove portions 14. . In this way MOS
Create a buried silicon electrode for the FET.

Next, a second embodiment will be described. First
The feature different from the above embodiment is the thickness of the deposited silicon film. Similar to the first embodiment, a silicon oxide film 22 is grown on the surface of the silicon substrate 20 as shown in FIG.
Using this as a mask, a groove portion 14 having a width of 0.6 μm and a depth of 5 μm is formed by using an anisotropic dry etching technique, and an oxide film 21 having a thickness of 0.05 μm is formed on the side wall of the groove portion 24.

Next, this silicon substrate 20 is placed in a reaction chamber of a low pressure CVD apparatus, and a silicon film 23 containing a small amount of boron is formed on the surface of the silicon substrate 20 in a thickness of 0.25 μm or more as in the first embodiment. accumulate. As shown in FIG. 4, the silicon film 23 fills the groove 24, and
The surface of 0 is smoothed.

Next, this silicon substrate 20 is subjected to low pressure CVD.
It is installed in the reaction chamber of the apparatus, and in the same manner as in the first embodiment,
As shown in FIG. 5, a silicon film 25 containing a large amount of boron is formed on the surface of the silicon substrate 20 to have a thickness of 0.25 μm.
accumulate.

This silicon substrate 20 is placed in an annealing furnace, and the same 850 as the first embodiment is used in a non-oxidizing atmosphere at 850.
A heat treatment is performed at 30 ° C. for 30 minutes to diffuse boron from the silicon film 25 into the silicon film 23 and make the boron concentration of the silicon film 23 in the groove 24 uniform.

In the second embodiment, the silicon film to be buried in the groove 24 is only the silicon film 23 having a good step coverage, and unlike the first embodiment, the film having a bad step coverage is not buried. There are no voids. Further, the boron added to the silicon film 25 is the entire silicon film 23,
Although it is necessary that the silicon films 23 and 25 are sufficiently diffused over a depth of about 5 μm, the silicon films 23 and 25 are polycrystalline or amorphous.
It was confirmed that the impurities were very easily diffused, were sufficiently diffused in the silicon film 23 in the groove portion 24, and the specific resistance of the silicon film 23 was sufficiently lowered.

Although the silicon substrate has been described as the semiconductor substrate, it may be n-type silicon or p-type silicon. Further, it may be a semiconductor substrate such as silicon carbide. Even if the oxide film used for the groove formation mask is not a silicon oxide film, it serves as a groove formation mask for the semiconductor substrate and may be a film of silicon nitride or the like that can prevent boron from diffusing into the semiconductor substrate. Good. The silicon oxide film formed inside the groove may be a silicon oxide film inside the groove, and may be a two-layer film in which the silicon side to be embedded is a silicon nitride film and the inside of the groove is a silicon oxide film. Good.

Regarding the use of the method for manufacturing a semiconductor device according to the present invention, it has been described that it is effective for embedding a silicon film for a gate electrode added with boron in a groove portion of a MOSFET or an IGBT using the groove portion. It can also be used.

[0028]

According to the present invention, it is possible to reduce the resistivity of the silicon film filling the groove and reduce the variation in low efficiency. Further, by using a film having good step coverage, a film without voids can be formed, and a highly reliable method for manufacturing a semiconductor device can be provided. MOSFET and I
By applying it to the GBT, it is possible to improve the characteristics of on-resistance and high speed. Further, high speed response can be achieved by applying to a memory element using a groove.

[Brief description of drawings]

FIG. 1 is a sectional view for explaining a manufacturing process for a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view for explaining the manufacturing process for the semiconductor device according to the first embodiment of the present invention.

FIG. 3 is a cross-sectional view for explaining the manufacturing process for the semiconductor device according to the first embodiment of the present invention.

FIG. 4 is a cross-sectional view for explaining the manufacturing process for the semiconductor device according to the second embodiment of the present invention.

FIG. 5 is a cross-sectional view for explaining the manufacturing process for the semiconductor device according to the second embodiment of the present invention.

FIG. 6 is a cross-sectional view for explaining the manufacturing process for the semiconductor device according to the second embodiment of the present invention.

FIG. 7 is a cross-sectional view for explaining a conventional semiconductor device manufacturing process.

FIG. 8 is a cross-sectional view for explaining a conventional manufacturing process of a semiconductor device.

FIG. 9 is a cross-sectional view for explaining a conventional manufacturing process of a semiconductor device.

FIG. 10 is a cross-sectional view of a semiconductor device for explaining problems with the conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

10 Silicon substrate 11,12 Silicon oxide film 13, 15 Silicon film 14 Groove 20 Silicon substrate 21, 22 Silicon oxide film 23, 25 Silicon film 24 groove 30 Silicon substrate 31, 32 Silicon oxide film 33, 35 Silicon film 34 Groove

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H01L 29/78 653 H01L 29/78 301V 655 658E F term (reference) 4M104 BB40 CC05 DD45 DD57 DD78 FF01 GG09 GG18 5F045 AB03 AC01 AC19 AD09 AE13 BB16 BB19 5F140 AA00 AA01 AC01 AC24 BA01 BE07 BE11 BF01 BF04 BF32 BF37 BF43 BG28 BG31 BG33 BG37 BG44 BG45 CE05

Claims (3)

[Claims] 1. A first step of forming a predetermined silicon oxide film on a surface of a semiconductor substrate having a groove, and a first step of containing a boron impurity of a predetermined concentration by thermal decomposition of a reaction gas mixed with monosilane gas and diborane gas. A second step of depositing a silicon film, and a second step of containing a predetermined boron impurity different from the predetermined boron concentration on the first silicon film by thermal decomposition of a reaction gas mixed with a high-order silane gas and diborane gas. Of the semiconductor device, and a fourth step of averaging the impurity concentrations in the first silicon film and the second silicon film by heat treatment. Production method. 2. The semiconductor substrate is a silicon substrate,
The method for manufacturing a semiconductor device according to claim 1, wherein the high-order silane gas in the third step is disilane gas. 3. The second silicon film is deposited after the trench is filled in the second step of depositing the first silicon film. Of manufacturing a semiconductor device of.