GB2529903A - IQ signal generator system and method - Google Patents

IQ signal generator system and method Download PDF

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Publication number
GB2529903A
GB2529903A GB1415851.3A GB201415851A GB2529903A GB 2529903 A GB2529903 A GB 2529903A GB 201415851 A GB201415851 A GB 201415851A GB 2529903 A GB2529903 A GB 2529903A
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United Kingdom
Prior art keywords
amplifier
port
generator
transistor
quadrature coupler
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
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GB1415851.3A
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GB201415851D0 (en
Inventor
Domenico Pepe
Domenico Zito
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University College Cork
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University College Cork
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Priority to GB1415851.3A priority Critical patent/GB2529903A/en
Publication of GB201415851D0 publication Critical patent/GB201415851D0/en
Priority to PCT/EP2015/070383 priority patent/WO2016034740A1/en
Publication of GB2529903A publication Critical patent/GB2529903A/en
Withdrawn legal-status Critical Current

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/18Networks for phase shifting
    • H03H7/21Networks for phase shifting providing two or more phase shifted output signals, e.g. n-phase output
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00Networks using active elements
    • H03H11/02Multiple-port networks
    • H03H11/16Networks for phase shifting
    • H03H11/22Networks for phase shifting providing two or more phase shifted output signals, e.g. n-phase output

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  • Amplifiers (AREA)

Abstract

An IQ signal generator comprising a quadrature coupler merged into an amplifier An IQ generator, which may be used in a vector modulator, comprises a quadrature coupler merged into an amplifier. I and Q signals of equal magnitude are derived from ports 2 and 3 when the single-ended input Vin is applied to the gate of the common source input transistor M1. The quadrature coupler may comprise a lumped element configuration L,C/2, which provides a compact circuit design, or an equivalent distributed component configuration such as a branch line coupler (figure 4). The circuit provides good IQ amplitude matching, less I/Q imbalance, no losses, and less noise than prior art IQ generators. The optical common-gate output transistors M3,M4 provide configuration which improves isolation of the generator outputs.

Description

signal generator System and Method
Field
The present invention is concerned with providing an 10 signal generator. More particularly, the invention is concerned with providing an 10 signal generator for a vector modulator phase shifter.
Background
A common design requirement in electronic circuits is to provide two signals with a 90 degree phase shift, commonly referred as in-phase (I) and in-quadrature (0) signals. There are a number of methods typically used to obtain such a 90 degree phase shift. These include the use of delay lines and polyphase filters.
All-pass polyphase filters usually result in losses which impair the Noise Figure (NF) of the receiver. Delay lines generally introduce fewer losses than polyphase filters. However, delay lines present a small but unavoidable attenuation in the delayed path. This attenuation can lead to an imbalance of the in-phase (I) and quadrature (0), components of the output signal. For particular applications, such as for example, but not limited to, passive imaging, the minimization of losses and NF contribution in the receiver chain can be an imperative requirement.
In order to minimize the losses associated with such phase shifters, it is known to integrate delay lines or polyphase filters into a common-source or a cascode amplifier. For example, a solution incorporating polyphase filters has the O and 18O nodes connected to the load and the drain of the common source transistors, and the 9O and 27O nodes connected to the load only. This connection makes the node impedances equal only if the drain impedance of the common source transistors tends to infinite. However, this occurs only at lower frequencies and for long-channel devices.
Moreover, this circuitry may only be realized by means of a differential topology.
It is an object of the present invention to provide a phase shifter which s overcomes at least some of the above mentioned problems and weaknesses of solutions currently available.
Summary
According to the invention there is provided, as set out in the appended claims, a 10 generator for a vector modulator phase shifter comprising: an amplifier comprising an integrated quadrature coupler, the quadrature coupler comprising an input port and an isolated port and a first and a second output port; wherein the first output port of the quadrature coupler is adapted to is generate an in-phase component of an output signal of the amplifier and the second output port of the quadrature coupler is adapted to generate a quadrature component of an output signal of the amplifier.
In one embodiment the quadrature coupler comprises a coupled line quadrature coupler.
In one embodiment the coupled line quadrature coupler comprises a plurality of lumped circuit components.
In one embodiment the coupled line quadrature coupler further comprises an input port and an isolated port, a first and a second output port, and wherein the lumped circuit components comprise a first and a second inductor forming a transformer and a first and a second capacitor; wherein the first inductor is connected between the input port and the first output port and the second inductor is connected between the isolated port and the second output port, and the first capacitor is coupled between the input port and the second output port and the second capacitor is connected between the isolated port and the first output port.
In one embodiment the quadrature coupler comprises a branch line coupler.
In one embodiment the branch line quadrature coupler comprises a plurality of distributed circuit components.
In one embodiment the first and the second output ports are connected to the same load impedance.
In one embodiment the amplifier comprises a cascode amplifier.
In one embodiment the cascode amplifier comprises a first transistor, a second transistor, a third transistor and a fourth transistor, wherein the input port is connected to the drain of the first transistor and the isolated port is connected to is the drain of the second transistor, and the first output port is connected to the source of the third transistor and the second output port is connected to the source of the fourth transistor.
In one embodiment the amplifier comprises a common-source amplifier.
In one embodiment the common-source amplifier comprises a first and a second transistor and a first and a second resistor, wherein the input port is connected to the drain of the first transistor and the isolated port is connected to the drain of the second transistor, and the first output port is connected to the first resistor and the second output port is connected to the second resistor.
In one embodiment the amplifier is a single-ended amplifier.
In one embodiment the amplifier is a differential amplifier.
According to another embodiment there is provided a method of generating an signal comprising: configuring an amplifier with an integrated quadrature coupler, the quadrature coupler comprising an input port and an isolated port and a first and a second output port; generating an in-phase component of an output signal of the s amplifier from the first output port of the quadrature coupler; and generating a quadrature component of an output signal of the amplifier at the second output port.
Brief Description of the Drawings
The invention will be more clearly understood from the following description of embodiments thereof, given by way of example only, with reference to the accompanying drawings, in which:-Figure 1 discloses one embodiment of the 10 generator of the present is invention when integrated into a common-source amplifier; Figure 2 discloses another embodiment of the 10 generator of the invention when integrated into a cascode amplifier with single-ended I and 0 outputs; Figure 3 discloses yet another embodiment of the 10 generator of the invention when integrated into a cascode amplifier with differential I and 0 outputs; and Figure 4 discloses yet another embodiment of the 10 generator of the present invention when integrated into a cascode amplifier when the quadrature coupler is a branch line hybrid coupler.
Detailed Description of the Drawings
The 10 generator of the present invention comprises an amplifier comprising an integrated quadrature coupler, wherein a first output port of the quadrature coupler is adapted to generate the in-phase component of the output signal of the amplifier and a second output port of the quadrature coupler is adapted to generate the quadrature component of the output signal of the amplifier.
The 10 generator of the present invention may be provided by many different implementations of a quadrature coupler integrated into an amplifier. For example, the quadrature coupler can be implemented through either lumped s components or distributed components. In addition, the quadrature coupler can be integrated into any type of amplifier, such as, but not limited to, a common source amplifier or a cascode amplifier.
Figures 1 to 4 illustrate four exemplary implementations of the 10 generator of the invention. However, it will be appreciated that the invention could equally well be applied to many other amplifier and quadrature coupler arrangements.
Figure 1 shows an embodiment of the invention where the quadrature coupler is implemented with lumped circuit components and is integrated into the circuitry is of a common-source amplifier.
As shown in the figure, the quadrature coupler comprises a port 1 (input port) and a port 4 (isolated port) and a port 2 (first output port) and a port 3 (second output port). The lumped circuit components within the ports comprise a first and a second inductor of value L forming a transformer, and a first and a second capacitor of value C/2.The circuit components are sized as follows: L=Zo/wo; C=1/(Zowo); Zo=(LC)112; wo=2ufo; where fo is the central frequency of operation. The first inductor is connected between the input port 1 and the output port 2. The first inductor is magnetically coupled with the second inductor connected between the port 4 and the output port 3. The first capacitor is connected between the input port 1 and the output port 3, and the second capacitor is connected between the port 4 and the output port 2.
The common-source amplifier comprises a first transistor Ml and a second transistor M2 and load impedances Ri and Ro. Ri and Ro are sized as follows: Ri=Ro=Zo. The sources of transistors Ml and M2 are connected to ground. The input port 1 of the quadrature coupler is connected to the drain of the first transistor Ml and the port 4 is connected to the drain of the second transistor M2. The gate of transistor Ml is connected to an input voltage Vin, with or without a dc decoupling capacitor CD. The gates of both transistors Ml and M2 are biased by a voltage Vbias via resistance Rbias. Alternatively, Ml and M2 could be biased through other common techniques, for example, through current s mirrors. The first output port 2 of the quadrature coupler is connected to the resistor Ri and the second output port 3 is connected to the resistor Ra. The other end of resistors Ri and Ra are connected to a supply voltage VDD.
In operation, the in-phase component of the output signal of the amplifier, V0rni, is obtained at the first output port 2 of the quadrature coupler (the I output node), and the quadrature component of the output signal of the amplifier Vout_Q is obtained at the second output port 3 (the 0 output node). At the operating frequency fo. the input signal power is equally split by the coupler into two signal paths, one towards the port 2 and one towards the port 3. As an effect of the is lumped component quadrature coupler, the output signal at the port 2 is delayed by 45 with respect to the input signal; whereas the output signal at the port 3 is anticipated by 452 with respect to the input signal. Overall, the output signals at the port 2 and port 3 are shifted by 9O.
Figure 2 shows an alternative embodiment of the invention where the quadrature coupler is integrated into a cascode amplifier. It can be seen that the circuit of Figure 2 is similar to the circuit of Figure 1, in that the input port 1 and the port 4 are connected to the same components as those of Figure 1.
However, the first output port 2 of the quadrature coupler is now connected to the source of the transistor MS of the cascode amplifier, while the second output port 3 is connected to the source of a fourth transistor M4. The drain of transistor M3 is connected to the supply voltage VDD via inductor Li, whereas the drain of transistor M4 is connected to the supply voltage VDD via inductor La.
The gates of both transistors MS and M4 are also connected to the supply voltage VDD.
In operation, the in-phase component of the output signal of the amplifier, Vouti, is obtained at the drain of transistor MS and the quadrature component of the output signal of the amplifier, V0t_a, is obtained at the drain of the transistor M4.
As explained for the circuit in Figure 1, at the operating frequency to, the input signal power is equally split by the coupler into two signal paths, one towards the port 2 and one towards the port 3. Overall, the output signals at the port 2 s and port 3 are shifted by 9O. With respect to the circuit in Figure 1, the circuit in Figure 2 provides better isolations from the output of the amplifier to the input terminal of the amplifier, as well as to the output terminals (ports) of the quadrature coupler.
Figure 3 shows an alternative embodiment of the invention where the quadrature coupler is integrated into a cascade amplifier. It can be seen that this circuit is the same as the circuit of Figure 2, except that the inductors Li and La now provide differential I components, Vouti+ and V0ti-, and differential 0 components, V0t_o+ and V0t_o-, respectively. The functionality is the same as is described for the circuit in Figure 2, with the difference that output differential signals I and 0 are provided in the case of the circuit in Figure 3.
Figure 4 shows an alternative embodiment of the invention where the quadrature coupler is implemented through distributed components and integrated into a cascode amplifier. It can be seen that this circuit is the same as the circuit of Figure 2, except that the quadrature coupler is now implemented through a branch-line quadrature coupler realized with distributed components such as transmission lines, rather than lumped components. The functionality is the same as described for the circuit in Figure 2, with the difference that output signals I and 0 are obtained as an effect of the quadrature coupler implemented via a branch-line directional coupler with distributed components such as transmission lines.
The present invention has a number of advantages when compared to prior art phase shifter implementations. Firstly, the 10 generator of the present invention enables I and 0 output components of exactly the same amplitude to be generated. It can also provide for the generation of I and 0 signal components having less I/O imbalance, no losses and less noise when compared with prior art phase shifters.
In the present invention, the I and 0 output nodes of the coupler are connected s to loads of equal impedance. Moreover, the spirals of the transformer are connected in series between the common-source and common-gate transistors, allowing a compensation of the parasitic capacitances at those nodes. As a result, the present invention is also suitable for operation at extremely high frequencies.
In addition, the present invention can be realized in both single-ended and differential topologies, in a more compact circuit design.
As the present invention can be implemented with lumped components, it also is allows a great area saving on silicon compared to delay line implementations.
It will be appreciated that 10 generator of the present invention can be used for phase shifting in the RF path, baseband path and Local Oscillator (LO) path.
The 10 generator can be exploited in a vector modulator phase shifter in an integrated circuit, and, in general in any application in which 10 generation is needed. Examples of applications are, but not limited to, the emerging mm-wave wireless applications for communication and sensing, where a phased array approach is required, such as 60 0Hz multi-gigabit-per-second wireless communications, 77 and 79 0Hz automotive radars, and W-band imagers. It will be appreciated that the selection of the particular embodiment of 10 generator circuitry to use is thus dependent on the application in which it is to be used.
The embodiments in the invention described with reference to the drawings comprise a computer apparatus and/or processes performed in a computer apparatus. However, the invention also extends to computer programs, particularly computer programs stored on or in a carrier adapted to bring the invention into practice. The program may be in the form of source code, object code, or a code intermediate source and object code, such as in partially compiled form or in any other form suitable for use in the implementation of the method according to the invention. The carrier may comprise a storage medium such as ROM, e.g. CD ROM, or magnetic recording medium, e.g. a floppy disk or hard disk. The carrier may be an electrical or optical signal which may be transmitted via an electrical or an optical cable or by radio or other means.
In the specification the terms "comprise, comprises, comprised and comprising" or any variation thereof and the terms include, includes, included and including" or any variation thereof are considered to be totally interchangeable and they should all be afforded the widest possible interpretation and vice versa.
The invention is not limited to the embodiments hereinbefore described but may be varied in both construction and detail.

Claims (14)

  1. Claims 1. An 10 generator for a vector modulator phase shifter comprising: an amplifier comprising an integrated quadrature coupler, the quadrature coupler comprising an input port and an isolated port and a first and a second output port; wherein the first output port of the quadrature coupler is adapted to generate an in-phase component of an output signal of the amplifier and the second output port of the quadrature coupler is adapted to generate a quadrature component of an output signal of the amplifier.
  2. 2. The 10 generator of Claim 1, wherein the quadrature coupler comprises a coupled line quadrature coupler.
  3. 3. The 10 generator of Claim 2, where the coupled line quadrature coupler comprises a plurality of lumped circuit components.
  4. 4. The 10 generator of Claim 3, where the coupled line quadrature coupler further comprises an input port and an isolated port, a first and a second output port, and wherein the lumped circuit components comprise a first and a second inductor forming a transformer and a first and a second capacitor; wherein the first inductor is connected between the input port and the first output port and the second inductor is connected between the isolated port and the second output port, and the first capacitor is coupled between the input port and the second output port and the seoond capacitor is connected between the isolated port and the first output port.
  5. 5. The 10 generator of Claim 1, wherein the quadrature coupler comprises a branch line coupler.
  6. 6. The 10 generator of Claim 5, wherein the branch line quadrature coupler comprises a plurality of distributed circuit components.
  7. 7. The 10 generator of any of the previous claims, wherein the first and the s second output ports are connected to the same load impedance.
  8. 8. The 10 generator of any of the previous claims, wherein the amplifier comprises a cascode amplifier.
  9. 9. The 10 generator of Claim 7, wherein the cascode amplifier comprises a first transistor, a second transistor, a third transistor and a fourth transistor, wherein the input port is connected to the drain of the first transistor and the isolated port is connected to the drain of the second transistor, and the first output port is connected to the source of the third is transistor and the second output port is connected to the source of the fourth transistor.
  10. 10. The 10 generator of any of Claims ito 7, wherein the amplifier comprises a common-source amplifier.
  11. 11.The 10 generator of Claim 10, wherein the common-source amplifier comprises a first and a second transistor and a first and a second resistor, wherein the input port is connected to the drain of the first transistor and the isolated port is connected to the drain of the second transistor, and the first output port is connected to the first resistor and the second output port is connected to the second resistor.
  12. 12.The 10 generator of any of the previous claims wherein the amplifier is a single-ended amplifier.
  13. 13.The 10 generator of any of Claims 1 to 11, wherein the amplifier is a differential amplifier.
  14. 14.A method of generating an IQ signal comprising: configuring an amplifier with an integrated quadrature coupler, the quadrature coupler comprising an input port and an isolated port and a first and a second output port; generating an in-phase component of an output signal of the amplifier from the first output port of the quadrature coupler; and generating a quadrature component of an output signal of the amplifier at the second output port. IC)
GB1415851.3A 2014-09-05 2014-09-08 IQ signal generator system and method Withdrawn GB2529903A (en)

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GB1415851.3A GB2529903A (en) 2014-09-08 2014-09-08 IQ signal generator system and method
PCT/EP2015/070383 WO2016034740A1 (en) 2014-09-05 2015-09-07 Iq signal generator system and method

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GB2529903A true GB2529903A (en) 2016-03-09

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021113011A1 (en) * 2019-12-06 2021-06-10 Qualcomm Incorporated Phase shifter with active signal phase generation

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111641396B (en) * 2020-06-30 2023-05-05 湘潭大学 Charge amplifying circuit for front-end reading system of silicon drift detector
CN112165303A (en) * 2020-10-16 2021-01-01 中国电子科技集团公司第三十八研究所 Broadband quadrature phase generation network based on stacked transformer
CN114499456B (en) * 2021-12-31 2023-11-10 电子科技大学 Broadband orthogonal signal generator based on two-stage hybrid

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2361123A (en) * 2000-04-04 2001-10-10 Nokia Mobile Phones Ltd Polyphase filters in silicon integrated circuit technology
US6909886B2 (en) * 2002-08-30 2005-06-21 Microtune ( Texas), L.P. Current driven polyphase filters and method of operation
US8243855B2 (en) * 2008-05-09 2012-08-14 Freescale Semiconductor, Inc. Calibrated quadrature generation for multi-GHz receiver

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3452300A (en) * 1965-08-11 1969-06-24 Merrimac Research & Dev Inc Four port directive coupler having electrical symmetry with respect to both axes
US6362685B1 (en) * 2000-07-20 2002-03-26 Rockwell Collins, Inc. Power amplifier with multilevel power modes
US6806768B2 (en) * 2001-10-31 2004-10-19 Qualcomm Incorporated Balanced power amplifier with a bypass structure
JP5799951B2 (en) * 2010-04-19 2015-10-28 日本電気株式会社 Phase shifter
WO2014086385A1 (en) * 2012-12-03 2014-06-12 Telefonaktiebolaget Lm Ericsson (Publ) An i/q network

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2361123A (en) * 2000-04-04 2001-10-10 Nokia Mobile Phones Ltd Polyphase filters in silicon integrated circuit technology
US6909886B2 (en) * 2002-08-30 2005-06-21 Microtune ( Texas), L.P. Current driven polyphase filters and method of operation
US8243855B2 (en) * 2008-05-09 2012-08-14 Freescale Semiconductor, Inc. Calibrated quadrature generation for multi-GHz receiver

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021113011A1 (en) * 2019-12-06 2021-06-10 Qualcomm Incorporated Phase shifter with active signal phase generation
US11569555B2 (en) 2019-12-06 2023-01-31 Qualcomm Incorporated Phase shifter with active signal phase generation

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GB201415851D0 (en) 2014-10-22

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