CN114980497A - Method for manufacturing circuit board circuit structure with through hole and manufactured circuit board circuit structure with through hole - Google Patents

Method for manufacturing circuit board circuit structure with through hole and manufactured circuit board circuit structure with through hole Download PDF

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Publication number
CN114980497A
CN114980497A CN202110194303.1A CN202110194303A CN114980497A CN 114980497 A CN114980497 A CN 114980497A CN 202110194303 A CN202110194303 A CN 202110194303A CN 114980497 A CN114980497 A CN 114980497A
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China
Prior art keywords
layer
hole
photoresist
copper
layers
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CN202110194303.1A
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Chinese (zh)
Inventor
许议文
叶辰影
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Jialianyi Tech Suzhou Co ltd
Career Electronic Kunshan Co ltd
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Jialianyi Tech Suzhou Co ltd
Career Electronic Kunshan Co ltd
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Application filed by Jialianyi Tech Suzhou Co ltd, Career Electronic Kunshan Co ltd filed Critical Jialianyi Tech Suzhou Co ltd
Priority to CN202110194303.1A priority Critical patent/CN114980497A/en
Priority to TW110106817A priority patent/TWI747752B/en
Publication of CN114980497A publication Critical patent/CN114980497A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/423Plated through-holes or plated via connections characterised by electroplating method
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0562Details of resist

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

A method for manufacturing a circuit board structure with a via hole comprises providing a substrate, wherein the substrate comprises a substrate layer, two copper layers and at least one hole, the two copper layers are respectively formed on a first surface and a second surface opposite to the substrate layer, the two copper layers are provided with a first circuit pattern structure, the at least one hole is communicated to the second surface of the substrate layer from the first surface side, and the substrate further comprises two second photoresist layers on the copper layers to form pattern structures; forming a metallization layer by a chemical method, and covering the surface of the hole and the surfaces of the second photoresist layers on the two sides; electroplating to form a copper-clad layer, covering the surface of the hole and stopping on the second photoresist layer; removing the second photoresist layer; covering the second copper layer with the second third photoresist layer to form a second circuit pattern structure; etching the uncovered copper layers; and removing the second third photoresist layer.

Description

Method for manufacturing circuit board circuit structure with through hole and manufactured circuit board circuit structure with through hole
Technical Field
A method for manufacturing a circuit board with a via hole, and more particularly, to a method for manufacturing a circuit structure of a circuit board and a circuit structure with a via hole.
Background
The traditional selective plating method comprises the steps of drilling, cleaning holes, metalizing, using a dry film for shielding, exposing and developing the metalized holes, electroplating, and forming a protruding part around the hole after electroplating. When the circuit is manufactured, in order to effectively cover the convex part, the selective thickness of the photoresist cannot be thinned, so that the resolution and the etching forming are limited, and the fine circuit manufacturing of the circuit structure of the circuit board is influenced.
Disclosure of Invention
In view of the above, an embodiment of the present invention provides a method for manufacturing a circuit board circuit structure having a via hole, including providing a substrate, the substrate including a substrate layer, a copper layer and at least one hole. The substrate layer is provided with a first surface and a second surface which are opposite, two copper layers are respectively formed on the first surface and the second surface of the substrate layer, the copper layer on the first surface side is provided with a first circuit pattern structure, the first circuit pattern structure is formed through two first photoresist layers, at least one hole is communicated to the second surface of the substrate layer from the first surface side, the substrate further comprises two second photoresist layers on the surfaces of the two copper layers, and the second photoresist layer on the first surface side is provided with a pattern structure; forming a metallization layer in a chemical manner, wherein the metallization layer covers the surface of the at least one hole, the surface of the second photoresist layer positioned on the first surface side and the surface of the second photoresist layer positioned on the second surface side; forming a copper-clad layer through electroplating, wherein the copper-clad layer covers the surface of the at least one hole, extends along the at least one hole and is stopped at the second photoresist layer; removing the second photoresist layer; covering two third photoresist layers on the surfaces of the two copper layers, and exposing and developing to form a second circuit pattern structure on the third photoresist layer on the second surface side; etching to remove the surface of each copper layer uncovered by each third photoresist layer; and removing the second third photoresist layer.
In some embodiments, the at least one hole is drilled from the surface of the copper layer on the first surface side, so as to form the at least one hole, and the at least one hole is communicated with the second surface of the substrate layer.
In some embodiments, after the drilling is completed, the first circuit pattern structure is formed by covering two first photoresist layers on the surfaces of two copper layers, and exposing and developing the first photoresist layer on the side of the first surface; etching to remove the surface of each copper layer uncovered by each first photoresist layer; removing the two first photoresist layers.
In some embodiments, the second photoresist layer on the first surface side is exposed and developed to form a pattern structure.
In some embodiments, before drilling, the first circuit pattern structure is formed by covering two first photoresist layers on the surfaces of two copper layers, and exposing and developing the first photoresist layer on the first surface side to form the first circuit pattern structure; etching to remove the surface of each copper layer uncovered by each first photoresist layer; removing the two first photoresist layers.
In some embodiments, each of the second photoresist layers is resist by blanket exposure.
In some embodiments, the at least one hole is drilled from the surface of the second photoresist layer on the first surface side to form the at least one hole, and the at least one hole is conducted to the second surface of the substrate layer.
In some embodiments, the second photoresist layer further comprises a film, which is removed before metallization.
In some embodiments, the two first photoresist layers, the two second photoresist layers and the two third photoresist layers are dry film photoresists.
In some embodiments, the at least one hole is formed by laser drilling.
In some embodiments, the metallization layer is formed through a neutral or weakly acidic metallization system.
In some embodiments, the first circuit pattern structure has at least one ear portion surrounding the at least one hole.
In some embodiments, the pattern structure has at least one notch portion, and the at least one notch portion substantially corresponds to the at least one ear portion.
In addition, in another embodiment, the present disclosure provides a circuit board circuit structure with a via hole, which is manufactured by the manufacturing method of the above embodiments.
In summary, the pattern structure formed by the photoresist layer can effectively prevent the problem that the electroplated layer overflows the holes when the holes are electroplated, and the photoresist layer can be easily removed without affecting the manufacturing efficiency of the circuit board circuit structure. The two layers of circuits are manufactured separately, and the convex part formed by the selective plating process orifice is not needed to be considered when the circuits are manufactured, so that thinner dry films can be used for manufacturing the circuits with better quality.
Drawings
Fig. 1 is a schematic structural diagram (one) of a method for manufacturing a circuit board circuit structure with a via hole according to a first embodiment;
FIG. 2 is a schematic structural diagram (II) illustrating a method for manufacturing a circuit board with a via hole according to a first embodiment;
FIG. 3 is a schematic structural diagram (III) illustrating a method for manufacturing a circuit board with a via hole according to a first embodiment;
FIG. 4 is a schematic structural diagram (IV) of the method for manufacturing a circuit board circuit structure with a via hole according to the first embodiment;
FIG. 5 is a schematic structural diagram (V) illustrating a method for manufacturing a circuit board with a via hole according to the first embodiment;
FIG. 6 is a sixth schematic view illustrating a method for manufacturing a circuit board with a via hole according to the first embodiment;
FIG. 7 is a schematic structural diagram (VII) illustrating a method for manufacturing a circuit board circuit structure with a via hole according to a first embodiment;
FIG. 8 is a schematic structural diagram (eight) of the method for manufacturing a circuit board circuit structure with a via hole according to the first embodiment;
FIG. 9 is a schematic structural diagram (nine) of a method for manufacturing a circuit board circuit structure with a via hole according to the first embodiment;
FIG. 10 is a first schematic structural diagram illustrating a method for manufacturing a circuit board with a via hole according to a second embodiment;
FIG. 11 is a schematic structural diagram (II) illustrating a method for manufacturing a circuit board with a via hole according to a second embodiment;
FIG. 12 is a schematic structural diagram (III) illustrating a method for manufacturing a circuit board with a via hole according to a second embodiment;
FIG. 12a is a schematic diagram of a circuit board layout structure with a via hole of the second embodiment;
FIG. 13 is a hole pattern diagram (I) of a method for fabricating a circuit board structure with a via hole according to another embodiment;
FIG. 14 is a hole pattern diagram (II) of a circuit board circuit structure with a via hole according to another embodiment;
FIG. 15 is a flowchart illustrating a method for fabricating a circuit board structure with a via hole according to a first embodiment;
FIG. 16 is a circuit pattern and drilling flow chart of the method for fabricating a circuit board circuit structure with a via hole according to the first embodiment;
FIG. 17 is a circuit pattern and drilling flow chart of a method for fabricating a circuit board structure with through holes according to a second embodiment;
FIG. 17a is a first flowchart illustrating a method for forming a circuit structure of a circuit board with a via hole according to a second embodiment;
fig. 17b is a film removing flow chart of the method for manufacturing the circuit board circuit structure with via holes according to the second embodiment (ii).
[ notation ] to show
100 circuit board circuit structure
10 base plate
11 base material layer
111 first surface
112 second surface
12 copper layer
12a copper layer
12b copper layer
13 the first photoresist layer
13a the first photoresist layer
13b second photoresist layer
131 first line pattern structure
132 ear part
14 the second photoresist layer
14a second photoresist layer
14b a second photoresist layer
141 pattern structure
142, a notch part
143 polyethylene terephthalate film
15 metallization layer
16 copper-clad layer
17 the third photoresist layer
17a the third photoresist layer
17b a third photoresist layer
171 second line pattern structure
20 holes
21 pore wall
22: bottom of hole
30 holes
31 hole wall
Step S5a, drilling a hole on the substrate from the surface of the copper layer on the first surface side
Step S5b, covering two first photoresist layers on the surfaces of the two copper layers, exposing and developing to form a first circuit pattern structure on the first photoresist layer on the first surface side
Step S6a, covering two first photoresist layers on the surfaces of the two copper layers, exposing and developing to form a first circuit pattern structure on the first photoresist layer on the first surface side
Step S6b, an etching process is performed to remove the surface of each copper layer not covered by each first photoresist layer
Step S7a, an etching process is performed to remove the surface of each copper layer not covered by each first photoresist layer
Step S7b, removing the two first photoresist layers
Step S8a, removing the two first photoresist layers
Step S8b, covering the second photoresist layer on the surface of the two copper layers, and exposing the second photoresist layer to resist chemical
Step S8 b' of removing the polyethylene terephthalate film
Step S9a, covering the second photoresist layer on the surfaces of the two copper layers
Step S9b, drilling a hole on the substrate from the surface of the second photoresist layer on the first surface side
Step S9 b' drilling holes from the polyethylene terephthalate film on the surface of the second photoresist layer on the first surface side
Step S9 b' of removing the polyethylene terephthalate film
Step S10, providing a substrate having a first circuit pattern structure, at least one hole and two second photoresist layers, the second photoresist layer on the first surface side having a pattern structure
Step S11, forming a metallization layer by chemical means, the metallization layer covering the surface of the at least one hole, the surface of the second photoresist layer on the first surface side, and the surface of the second photoresist layer on the second surface side
Step S12, a copper-clad layer is formed by electroplating, the copper-clad layer covers the surface of the at least one hole and stops on the second photoresist layer
Step S13, removing the second photoresist layer
Step S14, covering two third photoresist layers on the surfaces of the two copper layers, exposing and developing to form a second circuit pattern structure on the third photoresist layer on the second surface side
Step S15, an etching process is performed to remove the surface of each copper layer not covered by each third photoresist layer
Step S16, removing the second third photoresist layer
Detailed Description
Referring to fig. 1 to 6 and 15, fig. 1 to 6 are schematic structural diagrams (a) to (vi) of a method for manufacturing a circuit board circuit structure with a via hole according to a first embodiment, and fig. 15 is a flowchart of the method for manufacturing the circuit board circuit structure with the via hole according to the first embodiment. For convenience of the following description, the copper layer formed on the first surface 111 side is illustrated as a copper layer 12a, and the copper layer formed on the second surface 112 side is illustrated as a copper layer 12 b. The first photoresist layer on the first surface 111 side is illustrated as a first photoresist layer 13a, and the first photoresist layer on the second surface 112 side is illustrated as a first photoresist layer 13 b. As shown in fig. 1 and fig. 15, the method for manufacturing the circuit board circuit structure 100 with a via hole of the first embodiment includes providing a substrate 10 (step S10), where the substrate 10 includes a base material layer 11, a copper layer 12, at least one hole 20, and two second photoresist layers 14. The substrate layer 11 has a first surface 111 and a second surface 112 opposite to each other, and the two copper layers 12 are formed on the first surface 111 and the second surface 112 of the substrate layer 11, respectively. The copper layer 12a on the first surface 111 side has a first circuit pattern structure 131, and the first circuit pattern structure 131 is formed by the first photoresist layer 13a on the first surface 111 side in the two first photoresist layers 13 (detailed later). In the first embodiment, the first circuit pattern structure 131 is formed by using the conventional processes, such as the photolithography process of the circuit board, and forming the required first circuit pattern structure 131 by attaching the dry film photoresist and then using the positive photoresist or the negative photoresist. The holes 20 are two examples, but not limited thereto. The first circuit pattern structure 131 has at least one ear portion 132, and the number of the at least one ear portion 132 corresponds to the number of the holes 20. The ear portion 132 surrounds the hole 20. The ear portion 132 surrounds the opening side of the hole 20, that is, in the first embodiment, the ear portion 132 is located at the first surface 111 side. In the first embodiment, the photoresist layer is a dry film photoresist. That is, the circuit board circuit structures 100 with the same or different specifications can be simultaneously fabricated by using the first surface 111 and the second surface 112 of the substrate layer 11, or the circuit board circuit structure 100 can be fabricated by using only a single side surface. In this embodiment, the circuit board circuit structure 100 is formed on a single side surface as an example, but not limited thereto.
As shown in fig. 1 and fig. 15, two second photoresist layers 14 are formed on the surfaces of two copper layers 12, and the second photoresist layer 14a on the first surface 111 side has a pattern structure 141. The formation of the pattern structure 141 of the second photoresist layer 14a on the first surface 111 side has various embodiments (detailed later). For convenience of the following description, the second photoresist layer formed on the first surface 111 side is illustrated as the second photoresist layer 14a, and the second photoresist layer formed on the second surface 112 side is illustrated as the second photoresist layer 14 b. In the first embodiment, the via 20 is conducted from the second photoresist layer 14a on the first surface 111 side to the second surface 112 of the substrate layer 11, and various embodiments of the via 20 (detailed later) are provided. The hole 20 includes a hole wall 21 and a hole bottom 22, and the hole wall 21 includes the copper layer 12a and the side surface of the substrate layer 11 exposed by the conduction of the hole 20. The via bottom 22 includes a surface of the copper layer 12b bonded to the second surface 112. As shown in fig. 1, in the first embodiment, the second photoresist layer 14a having at least one notch 142 is formed on the first surface 111 side of the pattern structure 141, and a portion to be plated is exposed through the at least one notch 142. The number of the at least one notch 142 corresponds to the number of the holes 20. The pattern structure 141 completely covers the copper layer 12b on the second surface 112 side. The notch 142 corresponds to the ear 132, and more specifically, the edge of the notch 142 corresponds to the center of the ear 132, so that the notch 142 forms a step structure with the ear 132.
As shown in fig. 2 and 15, the metallization layer 15 is formed by a chemical method (step S11), and the metallization layer 15 covers the surface of the at least one hole 20, the surface of the second photoresist layer 14a on the first surface 111 side, and the surface of the second photoresist layer 14b on the second surface 112 side. In the first embodiment, the photoresist layer is formed by using a dry film photoresist, which is a conventional dry film photoresist such as a contact alkaline metallization system, which causes the dry film photoresist structure to be damaged and even fall off, so that in the first embodiment, the metallization layer 15 is formed by a neutral or weakly acidic metallization system. In the first embodiment, the surface of the hole 20, the surface of the second photoresist layer 14a on the first surface 111 side, and the surface of the second photoresist layer 14b on the second surface 112 side are formed and covered by a chemically neutral or weakly acidic metallization system. Generally, the coverage area of the metallization layer 15 does not include portions of the metal material, such as the side surface of the copper layer 12a exposed by drilling and the surface of the copper layer 12b exposed by drilling. In addition, the metallization layer 15 extends from the surface of the hole 20 to the surface of the second photoresist layer 14a on the first surface 111 side, so that the metallization layer 15 also covers the exposed surface of the ear portion 132 and the side surface of the second photoresist layer 14a exposed by the gap portion 142 of the pattern structure 141.
As shown in fig. 3 and 15, after the metallization layer 15 is formed, a copper-clad layer 16 is formed by electroplating (step S12), wherein the copper-clad layer 16 covers the surface of the at least one hole 20 and ends at the second photoresist layer 14 along the at least one hole 20. In the first embodiment, the surface of the hole 20, i.e. the side surfaces of the copper layer 12a and the substrate layer 11 exposed by the conduction of the hole 20, is formed and covered by electroplating. The copper-clad layer 16 extends along the ear portion 132, and because of the stepped structure formed by the ear portion 132 and the notch portion 142, the copper-clad layer 16 covers the ear portion 132, and the extension of the copper-clad layer 16 is stopped at the second photoresist layer 14a on the first surface 111 side.
As shown in fig. 4 and fig. 15, after the electroplating is completed, the second photoresist layer 14 is removed (step S13).
For convenience of the following description, the third photoresist layer on the first surface 111 side is illustrated as a third photoresist layer 17a, and the third photoresist layer on the second surface 112 side is illustrated as a third photoresist layer 17 b. As shown in fig. 5 and fig. 15, the second copper layer 12 is covered with two third photoresist layers 17, and exposed and developed to form a second circuit pattern structure 171 on the third photoresist layer 17b on the second surface 112 side (step S14). In the first embodiment, the first surface 111 side is kept with the complete copper layer 12a, and the second surface 112 side is formed with the second line pattern structure 171 of the desired line structure.
As shown in fig. 5 and fig. 15, an etching process is performed to remove the surface of each copper layer 12 not covered by the third photoresist layer 17 (step S15). As shown in fig. 5, after the etching process, the two copper layers 12 not covered by the second photoresist layer 17 are removed from the substrate 10, and only the two copper layers 12 of the second circuit pattern structure 171 to be formed are remained. In the first embodiment, the copper layer 12a on the first surface 111 side is completely covered by the third photoresist layer 17a, so that the copper layer 12a is completely remained. And the second wiring pattern structure 171 of the copper layer 12b on the second surface 112 side forms a desired wiring structure, that is, the wiring structure on the second surface 112 side is completed.
Next, as shown in fig. 6 and fig. 15, the second photoresist layer 17 is removed (step S16), so as to complete the circuit board circuit structure 100 with a via hole.
Specifically, the coverage of the metallization layer 15 is increased by the second photoresist layer 14, and the copper-clad layer 16 extends along the step structure formed by the first circuit pattern structure 131 and the pattern structure 141, and is blocked by the second photoresist layer 14a on the first surface 111 side, so that the copper-clad layer 16 is attached to the copper layer 12 having the first circuit pattern structure 131.
In addition, in the first embodiment, the circuit board circuit structure 100 is suitable for, for example, a double-sided board or a multi-layer board, where a double-sided board using a base material layer 11 and two copper layers 12 is taken as an example. For example, in the first embodiment, the metallization is performed by using a neutral or weakly acidic metallization system, such as neutral or weakly acidic metallization, the bottom layer of the substrate needs to be fully conductive, whereas the multilayer board is manufactured by stacking layer by layer. When the outer board of the multi-layer board is manufactured, the bottom layer of the inner board cannot be fully conductive because the inner board is already manufactured, so the circuit board circuit structure 100 of the first embodiment is suitable for the inner board of a double-sided board or a multi-layer board, for example. In the first embodiment, the base material layer 11 may be any pure metal material or composite metal material.
In the first embodiment, after the hole 20 is drilled, the dry film photoresist is used to form the desired circuit on the copper layer 12a on the first surface 111 side with the first circuit pattern structure 131, so as to obtain better circuit resolution and etching capability and enable the formation of a fine circuit. The process of fabricating the circuit first has various implementation aspects. The embodiment of the via hole 20, the formation of the first line pattern structure 131, and the formation of the pattern structure 141 will be described in detail.
For example, please refer to fig. 7-9 and fig. 16. Fig. 7 to 9 are schematic structural views (seventh) to (ninth) of the method for manufacturing a circuit board wiring structure with a via hole according to the first embodiment. Fig. 16 is a circuit pattern and drilling flow chart of the method for manufacturing the circuit board circuit structure with the through hole according to the first embodiment. In the first embodiment, the holes 20 are formed before the first line pattern structure 131 is completed. As shown in fig. 7 and 16, the substrate 10 is drilled from the surface of the copper layer 12a on the first surface 111 side (step S5a) to form the hole 20, and the hole 20 is conducted to the second surface 112 of the base material layer 11. The via hole 20 passes through the copper layer 12a and the base material layer 11 in order from the copper layer 12a on the first surface 111 side to the copper layer 12b on the second surface 112 side, and forms a via hole. In the first embodiment, the hole 20 is formed by laser machining.
As shown in fig. 8 and 16, the surfaces of the two copper layers 12 are covered with two first photoresist layers 13, and the first photoresist layers 13 on the first surface 111 side are exposed and developed to form a first circuit pattern structure 131 (step S6 a). In the first embodiment, the first surface 111 side forms the first circuit pattern structure 131 of the desired circuit structure, while the second surface 112 side retains the complete copper layer 12 b.
As shown in fig. 9 and 16, an etching process is performed to remove the surface of each copper layer 12 not covered by each first photoresist layer 13 (step S7 a). After the etching process, the two copper layers 12 not covered by the two first photoresist layers 13 are removed from the substrate 10, and only the two copper layers 12 of the first circuit pattern structure 131 to be formed are remained. In the first embodiment, the first circuit pattern structure 131 of the copper layer 12a on the first surface 111 side forms the required circuit structure, that is, the circuit structure on the first surface 111 side is completed first, and the copper layer 12b on the second surface 112 side retains the complete copper layer 12b because it is completely covered by the first photoresist layer 13 b.
As shown in fig. 9 and 16, the two first photoresist layers 13 are removed (step S8a), and two copper layers 12 forming the desired first circuit pattern structure 131 are left on the substrate 10. Then, the substrate 10 of step S10 is completed by covering the surfaces of the two copper layers 12 with the second photoresist layer 14 (step S9 a). The through hole 20 has various embodiments, in the first embodiment, the second photoresist layer 14a on the first surface 111 side is exposed and developed to form the gap portion 142 of the pattern structure 141, and the hole 20 is formed by drilling the hole in the gap portion 142 of the pattern structure 141, so that the hole 20 is conducted from the second photoresist layer 14a on the first surface 111 side to the second surface 112 of the substrate layer 11, thereby forming the substrate 10 shown in fig. 1.
Please refer to fig. 10 to 12 and 17. Fig. 10 to 12 are schematic structural views (a) to (b) of a method for manufacturing a circuit board circuit structure with a via hole according to a second embodiment. Fig. 17 is a circuit pattern and drilling flow chart of a method for manufacturing a circuit board circuit structure with a via hole according to a second embodiment. In the second embodiment, the first line pattern structure 131 is completed before drilling. As shown in fig. 10 and 17, the surfaces of the two copper layers 12 are covered with two first photoresist layers 13, and the first photoresist layers 13 on the first surface 111 side are exposed and developed to form a first circuit pattern structure 131 (step S5 b). In the first embodiment, the first surface 111 side forms the first circuit pattern structure 131 of the desired circuit structure, while the second surface 112 side retains the complete copper layer 12 b.
As shown in fig. 11 and 17, an etching process is performed to remove the surface of each copper layer 12 not covered by each first photoresist layer 13 (step S6 b). After the etching process, the two copper layers 12 not covered by the two first photoresist layers 13 are removed from the substrate 10, and only the two copper layers 12 of the first circuit pattern structure 131 to be formed are remained. In the first embodiment, the first circuit pattern structure 131 of the copper layer 12a on the first surface 111 side forms the required circuit structure, that is, the circuit structure on the first surface 111 side is completed first, and the copper layer 12b on the second surface 112 side retains the complete copper layer 12b because it is completely covered by the first photoresist layer 13 b. The first photoresist layer 13 is then removed (step S7b), leaving the two copper layers 12 on the substrate 10 to form the desired first circuit pattern structure 131.
As shown in fig. 12 and 17, after completing the circuit structure of the copper layer 12a on the first surface 111 side, the second photoresist layer 14 is covered on the surfaces of the two copper layers 12, and through blanket exposure, each second photoresist layer 14 is made resistant (step S8b), and the substrate 10 is drilled from the surface of the second photoresist layer 14a on the first surface 111 side (step S9 b). The through hole 20 has various embodiments, in the second embodiment, the opening portion 142 of the pattern structure 141 and the hole 20 are simultaneously formed by drilling, so that the hole 20 is conducted from the second photoresist layer 14a on the first surface 111 side to the second surface 112 of the substrate layer 11. The via hole 20 passes through the second photoresist layer 14a, the copper layer 12a and the base material layer 11 in sequence from the second photoresist layer 14a on the first surface 111 side to the copper layer 12b on the second surface 112 side to form a via hole, thereby forming the substrate 10 shown in fig. 1. In the second embodiment, the notch 142 and the hole 20 are formed by laser processing. The substrate 10 of step S10 is completed after the via 20 is connected. In another embodiment, the gap portion 142 of the pattern structure 141 can also be formed by exposure and development, and the same steps and processes are not repeated, after the first circuit pattern structure 131 is formed, the substrate 10 is drilled from the surface of the copper layer 12a on the first surface 111 side, and the hole 20 is conducted from the copper layer 12a on the first surface 111 side to the second surface 112 of the substrate layer 11. Then, covering the second photoresist layer 14 on the surfaces of the two copper layers 12, exposing and developing to form a pattern structure 141 on the second photoresist layer 14 on the first surface 111 side, thereby completing the substrate 10 of step S10.
Please refer to fig. 12a, fig. 17a and fig. 17 b. Fig. 12a is a film diagram of the circuit board wiring structure with a via hole of the second embodiment. Fig. 17a and 17b are flow charts (a) and (b) of film removal in the method for manufacturing a circuit board circuit structure with a via hole according to the second embodiment. In the second embodiment, an optical-grade Polyethylene terephthalate (PET) film is generally present on the surface of the dry film to protect the dry film from reaction caused by air contact, and the PET film is removed before development in a general process. As shown in fig. 12a and 17a, in the second embodiment, the substrate 10 is blanket-exposed and not developed, so that the substrate 10 covers the surfaces of the two copper layers 12 with the two second photoresist layers 14, and after each second photoresist layer 14 is provided with resistance by blanket exposure (step S8b), the polyethylene terephthalate film 143 is removed (step S8 b'), and then holes are drilled from the surface of the second photoresist layer 14a on the first surface 111 side (step S9b), but not limited thereto. As shown in fig. 12a and 17b, in another embodiment, the substrate 10 is formed by covering the surfaces of the two copper layers 12 with the two second photoresist layers 14, exposing the surfaces of the two copper layers to full exposure to make each second photoresist layer 14 resistant (step S8b), drilling holes from the polyethylene terephthalate film 143 on the surface of the second photoresist layer 14a on the first surface 111 side (step S9 b'), and then removing the polyethylene terephthalate film 143 (step S9b "). In another embodiment, the wet film resist is taken as an example, and since the PET film is not present in the wet film resist, the action of removing the PET film is not required.
Please refer to fig. 13 and 14. Fig. 13 and fig. 14 are schematic hole structure diagrams (a) to (b) illustrating a method for manufacturing a circuit board circuit structure with a via hole according to another embodiment. Taking the first embodiment as an example, in another implementation aspect, the hole penetrates through the substrate 10 to form a through hole. Parts which are the same as the parts in the above embodiments will not be described again, and only parts which are different will be described. A hole is drilled from the surface of the copper layer 12a on the first surface 111 side, and the hole 30 formed by the drilling penetrates the substrate 10. The hole 30 forms a through hole from the copper layer 12a on the first surface 111 side through the copper layer 12a, the base material layer 11, and the copper layer 12 b. The hole 30 includes a hole wall 31, and the hole wall 31 includes side surfaces of the copper layer 12a, the substrate layer 11, and the copper layer 12b exposed by drilling. The first line pattern structure 131 is then completed. In the step of forming the metallization layer 15, the metallization layer 15 covers the hole 30, and generally, the coverage area of the metallization layer 15 does not include portions of the metal material, such as the side surface of the copper layer 12a exposed by the drilling and the side surface of the copper layer 12b exposed by the drilling. In addition, the metallization layer 15 also covers the surface of the second photoresist layer 14a on the first surface 111 side. During the electroplating process, the copper-clad layer 16 covers the surface of the hole 30 and extends to the first surface 111 side to stop the second photoresist layer 14 a. After removing the second photoresist layer 14 and completing the fabrication of the second circuit pattern structure 171, the circuit board circuit structure 100 with via holes as shown in fig. 14 is completed.
In summary, according to the method for manufacturing a circuit board line structure with a via hole of an embodiment, the line structure on the first surface 111 side is completed, the coverage of the metallization layer 15 is increased by the second photoresist layer 14, the copper-clad layer 16 extends along the step structure formed by the first line pattern structure 131 and the pattern structure 141, and is blocked by the second photoresist layer 14a on the first surface 111 side, so that the copper-clad layer 16 is attached to the copper layer 12 having the first line pattern structure 131. Then, the circuit structure on the second surface 112 side is fabricated to complete the circuit board circuit structure 100 with the via hole. The circuit board circuit structure 100 with a via hole completed by the method of the present invention includes a substrate layer 11, two copper layers 12 and a copper-clad layer 16, wherein the copper-clad layer 16 covers the hole 20, and the copper-clad layer 16 extends along at least one ear portion 132 and covers the at least one ear portion 132. Because the copper-clad layer 16 does not extend beyond the ear portion 132 due to the blocking of the second photoresist layer 14a on the first surface 111 side, the substrate 10 has a smoother surface.
Although the present disclosure has been described with reference to the preferred embodiments, it should be understood that various changes and modifications can be made therein by those skilled in the art without departing from the spirit of the present disclosure, and therefore, the scope of the present disclosure should be determined only by the appended claims.

Claims (14)

1. A method for manufacturing a circuit board circuit structure with a via hole is characterized by comprising the following steps:
providing a substrate, wherein the substrate comprises a substrate layer, two copper layers and at least one hole, the substrate layer is provided with a first surface and a second surface which are opposite, the two copper layers are respectively formed on the first surface and the second surface of the substrate layer, the copper layer on the first surface side is provided with a first line pattern structure, the first line pattern structure is formed through two first light resistance layers, the substrate further comprises two second light resistance layers on the surfaces of the two copper layers, the second light resistance layer on the first surface side is provided with a pattern structure, and the at least one hole is communicated to the second surface of the substrate layer from the second light resistance layer on the first surface side;
forming a metallization layer by a chemical method, wherein the metallization layer covers the surface of the at least one hole, the surface of the second photoresist layer positioned on the first surface side and the surface of the second photoresist layer positioned on the second surface side;
forming a copper-clad layer by electroplating, wherein the copper-clad layer covers the surface of the at least one hole, extends along the at least one hole and is stopped at the second photoresist layer;
removing the second photoresist layer;
covering two third photoresist layers on the surfaces of the two copper layers, and exposing and developing to form a second circuit pattern structure on the third photoresist layer on the second surface side;
performing an etching process to remove the surface of each copper layer not covered by each third photoresist layer; and
removing the second third photoresist layer.
2. The method as claimed in claim 1, wherein the at least one hole is drilled from the surface of the copper layer on the first surface side to form the at least one hole, and the at least one hole is conducted to the second surface of the substrate layer.
3. The method as claimed in claim 2, wherein after drilling, the first circuit pattern structure is formed by covering the two first photoresist layers on the surfaces of the two copper layers, exposing and developing to form the first circuit pattern structure on the first photoresist layer;
performing an etching process to remove the surface of each copper layer not covered by each first photoresist layer; and
removing the two first photoresist layers.
4. The method as claimed in claim 3, wherein the second photoresist layer on the first surface side is exposed and developed to form the pattern structure.
5. The method for manufacturing circuit board with via hole as claimed in claim 1, wherein before drilling, the first circuit pattern structure is formed by covering the two first photoresist layers on the surfaces of the two copper layers, exposing and developing to form the first circuit pattern structure on the first photoresist layer on the first surface side;
performing an etching process to remove the surface of each copper layer not covered by each first photoresist layer; and
removing the two first photoresist layers.
6. The method for manufacturing circuit board with via hole as claimed in claim 5, wherein each of said second photoresist layers has chemical resistance by blanket exposure.
7. The method as claimed in claim 6, wherein the at least one hole is drilled from the surface of the second photoresist layer on the first surface side to form the at least one hole, and the at least one hole is conducted to the second surface of the substrate layer.
8. The method of claim 7, wherein said second photoresist layer further comprises a film, said film being removed prior to metallization.
9. The method for manufacturing circuit board with via hole of claim 1, wherein the two first photoresist layers, the two second photoresist layers and the two third photoresist layers are dry film photoresists.
10. The method of claim 1, wherein the at least one hole is formed by laser drilling.
11. The method for forming a circuit structure of a circuit board having a via hole of claim 1, wherein said metallization layer is formed through a neutral or weakly acidic metallization system.
12. The method for manufacturing a circuit board structure with a via according to claim 1, wherein the first circuit pattern structure has at least one ear surrounding the at least one hole.
13. The method for manufacturing circuit board with via according to claim 12, wherein the pattern structure has at least one notch portion substantially corresponding to the at least one ear portion.
14. A circuit board with through hole structure manufactured by the method for manufacturing a circuit board with through hole according to any one of claims 1 to 13.
CN202110194303.1A 2021-02-20 2021-02-20 Method for manufacturing circuit board circuit structure with through hole and manufactured circuit board circuit structure with through hole Pending CN114980497A (en)

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Application publication date: 20220830