KR20140039921A - Method of manufacturing printed circuit board - Google Patents

Abstract

A method for manufacturing a printed circuit board according to an embodiment of the present invention includes the steps of providing a base substrate with a metal layer stacked on at least one side of an insulation layer; forming a via hole on the base substrate by etching the base substrate; forming a seed layer on the upper side of the base substrate and the inner wall of the via hole; forming a plating layer on the formed seed layer; and forming a circuit pattern by patterning the metal layer, the seed layer, and the plating layer.

Description

Method of manufacturing printed circuit board {Method of manufacturing printed circuit board}

The embodiment relates to a method of manufacturing a printed circuit board.

In recent years, with the development of integrated semiconductor integrated circuits, the development of surface mount technology for directly mounting small chip components, and the miniaturization of electronic equipment, there is a need for printed circuit boards that can be easily embedded in more complex and narrow spaces. In response to these demands, flexible printed circuit boards have been developed.

Such flexible printed circuit boards are rapidly increasing in demand due to the development of electronic devices such as portable terminals, LCDs, PDPs, cameras, printer heads, and the demands thereof are increasing.

Such types of flexible printed circuit boards include single-sided, double-sided and multi-layer flexible printed circuit boards depending on the position and number of circuit patterns formed thereon. Among them, the cross-sectional flexible printed circuit board is one in which a circuit pattern is formed, and the mounting density of the component is low and the manufacturing method is simple. In the double-sided flexible printed circuit board, circuit patterns are formed on both upper and lower surfaces, and the circuit formed on the upper surface and the circuit formed on the lower surface are connected through the through holes. In addition, the multi-layer flexible printed circuit board is a three-dimensional circuit board having an inner layer circuit and an outer layer circuit, and has the advantage that high-density component mounting and wiring distance can be shortened by three-dimensional wiring.

Such a flexible printed circuit board is manufactured using FCCL (Flexible Copper Clad Laminate) as a substrate material. Especially double-sided FCCL uses what adhere | attached the copper foil layer on both surfaces on the surface of a polyimide film.

1 is a view for explaining a method of manufacturing a flexible printed circuit board according to the prior art.

First, referring to FIG. 1A, a base substrate 30 having a metal layer 20 stacked on both surfaces of the insulating layer 10 and the insulating layer 10 is prepared.

Subsequently, referring to FIG. 1B, the prepared base substrate 30 is processed to form a via hole 40. In this case, the via hole 40 may be formed using a CO 2 laser or a YAG laser drill.

Next, referring to FIG. 1C, a chemical copper plating layer 50 is formed on the inner wall of the formed via hole 40 and the metal layer 20 formed on the upper surface of the insulating layer 10. The chemical copper plating layer 50 is a plating seed layer for plating the electrocopper plating layer.

Subsequently, referring to FIG. 1D, an electrocopper plating layer 60 filling the via hole 40 is formed using the chemical copper plating layer 50 as a seed layer.

1E, the circuit pattern 70 is formed by patterning the metal layer 20, the chemical copper plating layer 50, and the electrocopper plating layer 60 formed on both surfaces of the insulating layer 10.

As described above, in the method of manufacturing a printed circuit board according to the related art, a via hole is formed using a laser drill, thereby electrically connecting the metal layers 20 formed on both surfaces of the insulating layer 10.

However, the method of manufacturing a printed circuit board according to the prior art as described above has a problem in that productivity is reduced by forming individual holes using the laser drill as described above in units of PNL.

In addition, the method of manufacturing a printed circuit board according to the related art as described above has a problem in that the production cost increases by performing a separate process (desmear or plasma) after hole formation using the laser drill.

In an embodiment, to provide a manufacturing method that can reduce the production cost while improving the productivity of the printed circuit board.

Further, the technical problems to be solved by this embodiment are not limited to the above-mentioned technical problems, and other technical problems which are not mentioned can be attained by those having ordinary knowledge in the technical field to which the embodiments proposed from the following description belong It will be understood clearly.

A method of manufacturing a printed circuit board according to an embodiment may include providing a base substrate having a metal layer laminated on at least one surface of an insulating layer; Etching the base substrate to form via holes in the base substrate; Forming a seed layer on an upper surface of the base substrate and an inner wall of the via hole; Forming a plating layer on the formed seed layer; And patterning the metal layer, the seed layer, and the plating layer to form a circuit pattern.

Moreover, the said insulating layer contains polyimide resin.

The processing of the via hole may include forming a photosensitive film on the metal layer, exposing and developing a portion of the formed photosensitive film to remove a region where the via hole is to be formed, and removing the portion. First etching the metal layer in the region where the via hole is to be formed using the photosensitive film, and second etching the insulating layer exposed by the first etching.

In addition, the secondary etching may include spraying a chemical capable of removing the material constituting the insulating layer.

In addition, the plating layer is selectively formed only on an inner wall of the via hole.

According to an embodiment of the present invention, by forming a via hole for electrically connecting the circuit pattern between layers by an etching process rather than a laser drill process, the productivity of the printed circuit board may be improved, and additional processes (such as a desmear process and Production cost by eliminating the plasma process) can be reduced.

1 is a view for explaining a method of manufacturing a flexible printed circuit board according to the prior art.
2 is a diagram illustrating a printed circuit board according to an exemplary embodiment.
3 to 12 are cross-sectional views for explaining a method of manufacturing a printed circuit board according to an embodiment of the present invention in order of process.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present invention. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.

Throughout the specification, when an element is referred to as "comprising ", it means that it can include other elements as well, without excluding other elements unless specifically stated otherwise.

In order to clearly illustrate the present invention in the drawings, thicknesses are enlarged in order to clearly illustrate various layers and regions, and parts not related to the description are omitted, and like parts are denoted by similar reference numerals throughout the specification .

Whenever a portion of a layer, film, region, plate, or the like is referred to as being "on" another portion, it includes not only the case where it is "directly on" another portion, but also the case where there is another portion in between. Conversely, when a part is "directly over" another part, it means that there is no other part in the middle.

In the present invention, a method for manufacturing a printed circuit board, by forming a hole through a polyimide etching process without using a laser drill, to provide a method for manufacturing a printed circuit board that can achieve improved productivity and reduced production cost.

2 is a diagram illustrating a printed circuit board according to an exemplary embodiment.

Referring to FIG. 2, the printed circuit board 100 includes a base substrate 110 formed of an insulating layer 112 and a metal layer 114, and circuit patterns 180 formed on upper and lower surfaces of the base substrate 110, respectively. And conductive vias (not shown) to electrically connect the circuit patterns 180 formed on the upper and lower surfaces, respectively.

In this case, the circuit pattern 180 substantially includes a metal layer included in the base substrate 110, a chemical copper plating layer formed on the metal layer, and an electrocopper plating layer formed on the chemical copper plating layer.

The base substrate 110 is formed of an insulating layer 112 and metal layers 114 formed on upper and lower surfaces of the insulating layer 112, respectively.

The insulating layer 112 may be a supporting substrate of a printed circuit board on which a single circuit pattern is formed, but may also mean an insulating layer region in which any circuit pattern of a printed circuit board having a plurality of stacked structures is formed. .

When the insulating layer 112 refers to any one of a plurality of stacked structures, a plurality of circuit patterns may be continuously formed on the upper and lower portions of the insulating layer.

The insulating layer 112 may include a polyimide resin.

Circuit patterns 180 are formed on and under the insulating layer 112, respectively.

The circuit pattern 180 may be formed by an additive process, a subtractive process, a modified semi additive process (MSAP), a semi additive process (SAP) process, and the like, which are conventional manufacturing processes of a printed circuit board. Possible details are omitted here.

The circuit pattern formed on the insulating layer 112 and the circuit pattern formed below are electrically connected to each other by conductive vias formed by plating a metal material in a via hole formed through the insulating layer 112.

Substantially, the circuit pattern 180 may be formed by electroplating a metal layer formed on the surface of the insulating layer 112, a chemical copper plating layer formed on the metal layer and used as a plating seed layer, and a fraud chemical copper plating layer as a seed layer. It consists of the electroplated copper layer formed.

Meanwhile, the via hole may be formed using a chemical that can open the insulating layer 112.

To this end, the via hole may be formed by spraying a polyimide-based etching chemical used as the insulating layer material on the insulating layer.

That is, conventionally, the via hole is formed by opening the insulating layer using a laser drill.

However, as described above, the method of forming a via hole using a laser drill has a problem of lowering productivity and increasing production cost. Accordingly, in the embodiment of the present invention, the via hole is formed by using the polyimide-based etching chemical.

According to the embodiment of the present invention as described above, by forming a via hole for electrically connecting the circuit pattern between the layers by an etching process rather than a laser drill process, it is possible to improve the productivity of the printed circuit board, the additional process (dis Production costs by eliminating the meander process and the plasma process) can be reduced.

3 to 12 are cross-sectional views for explaining a method of manufacturing a printed circuit board according to an embodiment of the present invention in order of process.

First, referring to FIG. 3, a base substrate 110, which is a basis for manufacturing a printed circuit board, is prepared.

In this case, the base substrate 110 includes an insulating layer 112 and metal layers 114 stacked on both surfaces of the insulating layer 112.

The insulating layer 112 is a flexible insulating layer, which may be a polyimide layer.

In addition, the metal layer 114 is made of an electrically conductive metal, which may include gold, silver, copper, and the like, and preferably, copper.

The base substrate 110 is coated with a varnish (Varnish) on a metal layer 114 made of an electrically conductive metal such as gold, silver and copper, and the heat treatment process after laminating the insulating layer 112 thereon It can be manufactured by going.

Next, referring to FIG. 4, the photosensitive film 120 is attached onto the metal layer 114 formed on the first surface of the insulating layer 112.

In this case, the photosensitive film 120 may be a dry film. In addition, the photosensitive film 120 may be both a roll to roll and a sheet.

In this case, the photosensitive film 120 may be a film of the UV exposure type or LDI exposure type.

In another embodiment, a photosensitive coating liquid may be applied onto the metal layer 114 instead of the photosensitive film 120.

Subsequently, referring to FIGS. 5 and 6, exposure is performed using an artwork film 130 exposing a portion where a hole is to be formed.

In this case, the exposure may be performed on the remaining area except for the portion where the hole is to be formed.

The exposure means irradiating light to the photosensitive film 120 by dividing the portion where the hole is to be formed and the portion where the hole is not to be formed. That is, exposure is a process of irradiating light to the remaining portions except for the portion where the holes are to be formed.

Thereafter, a region in which a hole is to be formed is exposed through a developing process for the photosensitive film 120.

The said development means the process of removing the part irradiated with the light by the said exposure.

Accordingly, the photosensitive film 120 for the portion where the hole is to be formed may be removed.

Next, referring to FIG. 7, a portion of the metal layer 114 formed on the first surface of the insulating layer 112 is firstly etched using the photosensitive film 120 having the region where the hole is to be formed exposed as a mask. do.

The first etching may be performed by exposing the exposed metal layer 112 as the photosensitive film 120 is not formed using a material that chemically reacts with the metal layer 114 positioned on the portion where the photosensitive film 120 is not formed. It means the process of removing by corrosion.

Next, referring to FIG. 8, the photosensitive film 120 formed on the metal layer 114 is removed.

Next, referring to FIG. 9, the via hole 150 is formed by removing the insulating layer 112 located at a portion where the metal layer 114 is not formed.

That is, the metal layer 114 located at the portion where the via hole 150 is to be formed is removed by the previous step.

Therefore, the surface of the insulating layer of the portion where the via hole 150 is to be formed is exposed to the outside. Accordingly, the via hole 150 is formed by spraying a chemical to remove the insulating layer on the exposed surface of the insulating layer.

In this case, the drug is preferably a polyimide drug corresponding to the insulating layer material.

In other words, the present invention uses a polyimide chemical that can remove the insulating layer 112, rather than forming the via hole as described above by processing the insulating layer 112 with a laser drill as in the prior art. By performing an etching process to form the bar holes.

Next, referring to FIG. 10, a chemical copper plating layer 160 is formed on a surface of the metal layer 114 formed on the insulating layer 112 and an inner wall of the formed via hole 150.

The chemical copper plating layer 160 functions as a plating seed layer for forming conductive vias and circuit patterns.

The chemical copper plating method may be performed by treating in a degreasing process, a soft corrosion process, a precatalyst process, a catalyst process, an activation process, an electroless plating process, and an anti-oxidation process.

In addition, the copper plating is divided into heavy copper plating (Heavy Copper, 2㎛ or more), medium copper plating (Medium Copper, 1 ~ 2㎛), light copper plating (Light Copper, 1㎛ or less) according to the thickness, here, medium copper plating Alternatively, after forming a plating seed layer satisfying 0.5 to 1.5 μm with light copper plating, a part of the plating seed layer may be removed to form the chemical copper plating layer 160.

Meanwhile, the seed layer may be replaced by a plating layer formed by a sputtering, thermal evaporation, or vacuum evaporation method of an e-beam method. It is not limited.

It is preferable that the thickness of the seed layer formed therefrom is 0.02-4 micrometers, Preferably it is 0.02-1 micrometer, More preferably, it is 0.02-0.5 micrometer. Particularly, the seed layer may be selectively thinner than the thickness of the seed layer (usually 2 to 3 μm) formed by the conventional wet electroless plating process through the vacuum deposition method as described above. In addition, by replacing the conventional electroless plating method, which is a seed layer forming process, by vacuum deposition, it is eco-friendly since waste liquid is not generated by converting the wet process into a dry process.

Next, referring to FIG. 11, an electrocopper plating layer 170 is formed on the chemical copper plating layer 160.

The electrocopper plating layer 170 may be formed by a general electroplating method using the chemical copper plating layer 160 and the metal layer 114 as a lead wire.

In this case, the electrical copper plating layer 170 is not formed to fill all the inside of the via hole 150, but is selectively formed only on the inner wall of the via hole 150.

Next, referring to FIG. 12, the metal layer 112, the chemical copper plating layer 160, and the electrical copper plating layer 170 are patterned to form circuit patterns 180 on the upper and lower portions of the insulating layer 112, respectively. .

To this end, first, an etching resist made of, for example, a photosensitive dry film is laminated and patterned on the electroplating layer 170, and the metal layer 112, the chemical copper plating layer 160, and the electroplating exposed by the etching resist are formed. The circuit pattern 180 may be formed by etching and patterning the copper plating layer 170.

According to an embodiment of the present invention, by forming a via hole for electrically connecting the circuit pattern between layers by an etching process rather than a laser drill process, the productivity of the printed circuit board may be improved, and additional processes (such as a desmear process and Production cost by eliminating the plasma process) can be reduced.

The foregoing description is merely illustrative of the technical idea of the present invention, and various changes and modifications may be made by those skilled in the art without departing from the essential characteristics of the present invention. Therefore, the embodiments disclosed in the present invention are intended to illustrate rather than limit the scope of the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments. The scope of protection of the present invention should be construed according to the following claims, and all technical ideas within the scope of equivalents should be construed as falling within the scope of the present invention.

112: insulating layer
114: metal layer
150: via hole
160: chemical copper plating layer
170: electric copper plating layer
180: circuit pattern

Claims (5)

Providing a base substrate having a metal layer laminated on at least one surface of the insulating layer;
Etching the base substrate to form via holes in the base substrate;
Forming a seed layer on an upper surface of the base substrate and an inner wall of the via hole;
Forming a plating layer on the formed seed layer; And
Patterning the metal layer, seed layer, and plating layer to form a circuit pattern;
A method of manufacturing a printed circuit board. The method according to claim 1,
Wherein the insulating layer
Containing polyimide resin
A method of manufacturing a printed circuit board. The method according to claim 1,
The step of processing the via hole,
Forming a photosensitive film on the metal layer;
Exposing and developing a portion of the formed photosensitive film to remove a region where the via hole is to be formed;
First etching the metal layer of the region where the via hole is to be formed using the photosensitive film from which the portion is removed;
Second etching the insulating layer exposed by the first etching;
A method of manufacturing a printed circuit board. The method of claim 3,
The secondary etching step,
Injecting a chemical that can remove the material constituting the insulating layer,
A method of manufacturing a printed circuit board. The method according to claim 1,
Wherein the plating layer comprises:
Selectively formed only on an inner wall of the via hole
A method of manufacturing a printed circuit board.

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