CN111326651A - OTS material, gating unit and preparation method thereof - Google Patents

OTS material, gating unit and preparation method thereof Download PDF

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CN111326651A
CN111326651A CN201811543070.6A CN201811543070A CN111326651A CN 111326651 A CN111326651 A CN 111326651A CN 201811543070 A CN201811543070 A CN 201811543070A CN 111326651 A CN111326651 A CN 111326651A
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ots material
electrode layer
ots
equal
layer
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宋志棠
宋三年
郭天琪
王昊
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Shanghai Institute of Microsystem and Information Technology of CAS
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Shanghai Institute of Microsystem and Information Technology of CAS
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
    • H10N70/8825—Selenides, e.g. GeSe
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • C23C14/35—Sputtering by application of a magnetic field, e.g. magnetron sputtering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/021—Formation of switching materials, e.g. deposition of layers
    • H10N70/026—Formation of switching materials, e.g. deposition of layers by physical vapor deposition, e.g. sputtering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
    • H10N70/8828—Tellurides, e.g. GeSbTe

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  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
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Abstract

The invention provides an OTS material, a gate unit and a preparation method thereof, wherein the OTS material is a compound containing Ge, As, Se, Te, Si and P, and the OTS material has a chemical general formula of GeaAsbSecTexSiyPzWherein a, b, c, x, y, z all refer to atomic percent of the elements, and 5<a<45、10<b<40、15<c<50、0<x<15、0<y<10、0<z<10 while satisfying a + b + c + x + y + z as 100. The OTS material provided by the invention can realize rapid transition from a cut-off state with high resistance to a conducting state with low resistance under the action of external electric excitation. Moreover, a rapid transition from an on, low resistance state to an off, high resistance state is enabled upon removal of the external electrical stimulus. A gate cell based on the OTS material,the method has the advantages of low threshold voltage, high starting speed, high on-off ratio and the like, and can provide reliable device basis for realizing three-dimensional high-density storage.

Description

OTS material, gating unit and preparation method thereof
Technical Field
The invention belongs to the technical field of microelectronics, and particularly relates to a Ge-As-Se-Te-Si-P OTS material, an OTS gate unit and a preparation method thereof.
Background
In the big data era with the development of the internet of things, cloud computing and artificial intelligence as the guide, the storage and the computation of information become key factors for restricting the development of the fields. The mainstream storage technology at present mainly adopts semiconductor devices and magnetic materials. Among them, the phase change memory, which is one of the new memory technologies, is considered as a strong candidate for the next-generation nonvolatile memory solution due to its advantages of fast operation speed, long lifetime, low power consumption, and high scalability. Three-dimensional stacking is an effective means, particularly to achieve high density capacity targets. However, it requires the integration of a gate with good switching performance to gate the memory cell. Currently, a gate tube capable of realizing three-dimensional integration mainly comprises an oxide diode, a mixed ion conductive gate tube, a threshold value change-over switch and the like. Among gating materials, the OTS gating device using chalcogenide thin films as a medium is considered as the gating device with the most application potential. The basic working principle of the OTS gate is as follows: external electrical stimuli are used to control the switching of the gating device. When electric excitation is applied to the gating device unit, the gating material is converted from a high-resistance state to a low-resistance state, and the device is in an open state; when the electric excitation is removed, the material is converted from the low-resistance state to the high-resistance state, and the device is in the off state, so that the aim of switching and gating the storage unit is fulfilled.
Currently, research on high performance gates is being widely conducted. The development direction of the three-dimensional high-density storage device is to achieve the characteristics of large driving current, high on-off ratio, low threshold voltage, long service life, high reliability and the like as the final design purpose, and a reliable device foundation is found for the realization of three-dimensional high-density storage mainly through the means of novel material research and development, doping modulation, device structure optimization and the like. Therefore, how to provide a gate with low threshold voltage, high switching ratio and long life is a problem to be solved urgently.
Disclosure of Invention
The invention aims to provide an OTS material, an OTS gate unit and a preparation method thereof, and aims to solve the problems that in the prior art, an OTS gate has high threshold voltage, short service life, reliability to be improved and the like.
In order to achieve the above objects and other related objects, the present invention provides an OTS material, which is a compound including six elements of Ge, As, Se, Te, Si and P, and has a chemical formula of GeaAsbSecTexSiyPzWherein a, b, c, x, y, z all refer to atomic percent of the elements, and 5<a<45、10<b<40、15<c<50、0<x<15、0<y<10、0<z<10 while satisfying a + b + c + x + y + z as 100.
Alternatively, the general chemical formula GeaAsbSecTexSiyPzIn the formula, 0-a-b-c is more than 100 and less than or equal to 20.
Alternatively, the general chemical formula GeaAsbSecTexSiyPzIn the formula, the content is more than 20 and less than or equal to 100-a-b-c and less than or equal to 30.
Alternatively, the general chemical formula GeaAsbSecTexSiyPzIn the formula (I), 30-a-b-c < 35 is satisfied.
Optionally, the OTS material achieves a transient transition from a high-resistance state to a low-resistance state under electrical excitation operation, and instantaneously and spontaneously returns to the high-resistance state upon removal of the electrical excitation.
The invention also provides a method for manufacturing the OTS material, which comprises any one of the sputtering method, the evaporation method, the physical vapor phase method, the chemical vapor phase method, the molecular beam epitaxy method, the atomic vapor deposition method or the atomic layer deposition method.
The invention also provides a gate unit prepared by adopting the OTS material, which sequentially comprises a lower electrode layer, an OTS material layer arranged on the lower electrode layer, an upper electrode layer arranged on the OTS material layer and an extraction electrode arranged on the upper electrode layer from bottom to top.
Optionally, the thickness of the OTS material layer is greater than or equal to 5nm and less than or equal to 30 nm.
Optionally, the material of the lower electrode layer includes, but is not limited to, one or more of W, Pt, Au, Ti, Al, Ag, Cu and Ni, or is one of the above metal simple substance nitrides, the diameter of the lower electrode layer is greater than or equal to 50nm and less than or equal to 200nm, and the thickness of the lower electrode layer is greater than or equal to 100nm and less than or equal to 500 nm.
Optionally, the material of the upper electrode layer includes, but is not limited to, one or more of W, Pt, Au, Ti, Al, Ag, Cu and Ni, or is one of the above metal simple substance nitrides, and the thickness of the upper electrode layer is greater than or equal to 10nm and less than or equal to 50 nm.
Optionally, the material of the extraction electrode includes but is not limited to one or more of W, Pt, Au, Ti, Al, Ag, Cu and Ni, or is one of the above elementary metal nitrides, and the thickness of the extraction electrode is greater than or equal to 100nm and less than or equal to 500 nm.
The invention also provides a manufacturing method of the gate unit based on the OTS material, which at least comprises the following steps:
forming the lower electrode layer;
forming the OTS material layer on the surface of the lower electrode layer, wherein the chemical general formula is GeaAsbSecTexSiyPzWherein a, b, c, x, y, z all refer to atomic percent of the elements, and 5<a<45、10<b<40、15<c<50、0<x<15、0<y<10、0<z<10 while satisfying a + b + c + x + y + z as 100;
forming an upper electrode layer on the surface of the OTS material layer;
and forming a lead-out electrode on the surface of the upper electrode layer.
Optionally, the OTS material is prepared using any one of methods including, but not limited to, sputtering, evaporation, physical vapor phase, chemical vapor phase, molecular beam epitaxy, atomic vapor deposition, or atomic layer deposition.
As described above, the OTS material provided by the present invention can realize a transient transition from a high resistance state to a low resistance state under the action of external electrical excitation, and can immediately transition from the low resistance state to the high resistance state when the external electrical excitation is removed. The gate unit using the OTS material not only has the advantages of low threshold voltage, large switching ratio and the like, but also is expected to improve the service life and reliability of the device.
Drawings
FIG. 1 is a schematic diagram illustrating the formation of a lower electrode layer.
Fig. 2 is a schematic diagram illustrating the formation of an OTS material layer on the surface of the lower electrode layer.
Fig. 3 is a schematic view showing the formation of an upper electrode layer on the surface of the OTS material layer.
FIG. 4 is a schematic view showing the formation of an extraction electrode on the surface of an upper electrode layer.
Fig. 5 shows a voltage-current (V-I) diagram of a gate unit based on the OTS material of the present invention measured under voltage excitation.
Description of the element reference numerals
11 lower electrode layer
12 OTS material layer
13 upper electrode layer
14 leading-out electrode
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Please refer to fig. 1 to 5. It should be noted that the drawings provided in the present embodiment are only schematic and illustrate the basic idea of the present invention, and although the drawings only show the components related to the present invention and are not drawn according to the number, shape and size of the components in actual implementation, the form, quantity and proportion of the components in actual implementation may be changed arbitrarily, and the layout of the components may be more complicated.
Example one
The embodiment provides an OTS material, a gate unit and a preparation method thereof, wherein the OTS material is a compound containing Ge, As, Se, Te, Si and P, and the chemical general formula of the OTS material is GeaAsbSecTexSiyPzWherein a, b, c, x, y, z all refer to atomic percent of the elements, and 5<a<45、10<b<40、15<c<50、0<x<15、0<y<10、0<z<10, a + b + c + x + y + z is 100, while satisfying 30 < 100-a-b-c < 35.
The technical solution of the present embodiment is further explained by the preparation process of the gate unit.
As in fig. 1, step 1) is performed to form the lower electrode layer 11.
Alternatively, the lower electrode layer 11 may be prepared by any one of, but not limited to, sputtering, evaporation, physical vapor phase, chemical vapor phase, molecular beam epitaxy, atomic vapor deposition, or atomic layer deposition. The material of the lower extraction layer 11 includes, but is not limited to, any one or more of W, Pt, Au, Ti, Al, Ag, Cu and Ni, or any one of the above-mentioned elemental metal nitrides.
As an example, in step 1), the lower electrode layer 11 is prepared by a physical vapor deposition method using a W material. The prepared W lower electrode layer 11 had an electrode diameter of 190nm and a height of 500 nm.
As shown in fig. 2, step 2) is performed to grow an OTS material layer 12 on the surface of the lower electrode layer 11.
Alternatively, the OTS material layer 12 may be formed by any one of, but not limited to, sputtering, evaporation, physical vapor phase, chemical vapor phase, molecular beam epitaxy, atomic vapor deposition, or atomic layer deposition.
As an example, in step 2), a sputtering method is adopted, and a GeAsSeTeSiP alloy target is selected for sputtering to prepare the Ge30As20Se18Te16Si8P8The OTS material layer has the following technological parameters: background vacuum pressure of 3 x 10-4Pa, sputtering pressure of 0.3Pa, sputtering power of the alloy target of 30W, substrate temperature of 25 ℃, sputtering time of 3min, and thickness of the obtained film of about 10 nm.
As in fig. 3), proceed to step 3), grow an upper electrode layer 13 on the surface of the OTS material layer 12.
Alternatively, the preparation method of the upper electrode layer 13 includes, but is not limited to, any one of a sputtering method, an evaporation method, a physical vapor phase method, a chemical vapor phase method, a molecular beam epitaxy method, an atomic vapor deposition method, or an atomic layer deposition method. The material of the upper electrode layer includes, but is not limited to, any one or more of W, Pt, Au, Ti, Al, Ag, Cu and Ni, or any one of the above-mentioned elemental metal nitrides, such as AlN, TiN.
As an example, in step 3), a sputtering method is adopted, and TiN is selected as the material of the upper electrode layer. The technological parameters are as follows: background air pressure of 3 x 10-4Pa, sputtering pressure 0.3Pa, Ar: n is a radical of2The gas flow ratio of (1): 1, the sputtering power is 90W, the substrate temperature is 25 ℃, and the sputtering time is 10 min. The electrode thickness of the resulting TiN upper electrode layer was about 15 nm.
As shown in fig. 4), step 4) is performed to grow the extraction electrode 14 on the surface of the upper electrode layer 13.
Alternatively, the extraction electrode 14 may be prepared by a method including, but not limited to, any one of sputtering, evaporation, physical vapor phase, chemical vapor phase, molecular beam epitaxy, atomic vapor deposition, or atomic layer deposition. The material of the extraction electrode includes, but is not limited to, any one or more of single metal materials of W, Pt, Au, Ti, Al, Ag, Cu and Ni, or any one of the above metal simple substance nitrides, such as AlN and TiN.
As an example, in step 4), using Al as an extraction electrode material, preparing an extraction electrode 14 on the surface of the upper electrode layer 13 by using a sputtering method, wherein the thickness of the extraction electrode is 300nm, and obtaining the gate unit based on the OTS material layer. And integrating the upper electrode layer, the lower electrode layer and the OTS material layer with other elements such as a storage unit, a driving circuit, a peripheral circuit and the like through extraction electrodes.
Next, the gate unit based on the OTS material layer in this embodiment is tested for electrical performance, and a voltage-current (V-I) curve of the gate unit under voltage excitation is shown in fig. 5. As is well known to those skilled in the art, as the voltage increases, the current value first continues to increase, and as a certain transition point, the current suddenly changes and then continues to increase, which is the threshold transition point of the gate cell, at which point the voltage is the threshold voltage. As can be seen from FIG. 5, the threshold voltage of the gate unit of this embodiment is about 1.7V, and the switching ratio is nearly 105And a reliable device foundation can be provided for realizing three-dimensional high-density storage through further optimization.
The OTS material and the gate unit prepared by the embodiment can smoothly realize the transient transition between the high-resistance state and the low-resistance state, have lower threshold voltage and are beneficial to improving the reliability and fatigue property of the gate.
Example two
The present embodiment adopts substantially the same technical means as the first embodiment, except that the OTS material has a chemical formula GeaAsbSecTexSiyPzIn (1), satisfy 5<a<45、10<b<40、15<c<50、0<x<15、0<y<10、0<z<10, a + b + c + x + y + z is 100, and the condition that 20 is more than 100-a-b-c is less than or equal to 30 is satisfied. In practical application, the chemical formula GeaAsbSecTexSiyPzIn the above formula, Ge, As and Se are the host materials, and the preferable range is 70 < a + b + c < 100. The embodiment adopts a sputtering method to prepare Ge30As25Se25Te12Si4P4OTS material. The rest steps are exactly the same as the first embodiment. The Ge-based material in this example was subjected to the same electrical property test30As25Se25Te12Si4P4Threshold voltage of a gate unit of the OTS material is reduced, leakage current is reduced, and reliable device foundation can be provided for realizing three-dimensional high-density storage through further optimization.
EXAMPLE III
The present embodiment adopts substantially the same technical means as the first embodiment, except that the OTS material has a chemical formula GeaAsbSecTexSiyPzIn (1), satisfy 5<a<45、10<b<40、15<c<50、0<x<15、0<y<10、0<z<10, a + b + c + x + y + z is 100, and the content is more than 0 and less than or equal to 20 from a to b. The difference is that the present embodiment adopts a magnetron sputtering method to prepare Ge30As18.5Se38Te5Si7P1.5OTS material. The rest steps are exactly the same as the first embodiment. The Ge-based material in this example was subjected to the same electrical property test30As18.5Se38Te5Si7P1.5The gate of the OTS material has lower threshold voltage and smaller off-state current, and can provide reliable device foundation for realizing three-dimensional high-density storage.
In summary, the OTS material provided by the invention can smoothly realize multiple instantaneous transitions between a high-resistance state and a low-resistance state, the high-resistance state represents a closed state, the low-resistance state represents an open state, the switching on and off of the device is controlled through the transitions between the high-resistance state and the low-resistance state, the OTS material can be used as a gating switch of various novel memories, and the switching speed is within hundreds of nanoseconds, so that the OTS material has the potential of high-performance gating. The gating unit based on the OTS material has lower threshold voltage, and is beneficial to improving the reliability and fatigue property of the gating unit, so that a reliable device foundation is provided for a novel high-density and long-life memory chip.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims (13)

1. An OTS material, whichIs characterized in that the OTS material is a compound containing Ge, As, Se, Te, Si and P, and the chemical general formula of the OTS material is GeaAsbSecTexSiyPzWherein a, b, c, x, y, z all refer to atomic percent of the elements, and 5<a<45、10<b<40、15<c<50、0<x<15、0<y<10、0<z<10 while satisfying a + b + c + x + y + z as 100.
2. The OTS material of claim 1, wherein the chemical formula GeaAsbSecTexSiyPzIn the formula, 0-a-b-c is more than 100 and less than or equal to 20.
3. The OTS material of claim 1, wherein the chemical formula GeaAsbSecTexSiyPzIn the formula, the content is more than 20 and less than or equal to 100-a-b-c and less than or equal to 30.
4. The OTS material of claim 1, wherein the chemical formula GeaAsbSecTexSiyPzIn the formula (I), 30-a-b-c < 35 is satisfied.
5. The OTS material of claim 1, wherein the OTS material achieves a transient transition from a high-resistance state to a low-resistance state under electrical excitation operation, and upon removal of the electrical excitation, instantaneously returns spontaneously to the high-resistance state.
6. A method of fabricating the OTS material of any one of claims 1-5, wherein the OTS material is fabricated by any one of the methods including, but not limited to, sputtering, evaporation, physical vapor phase, chemical vapor phase, molecular beam epitaxy, atomic vapor deposition, or atomic layer deposition.
7. A gate unit prepared by adopting the OTS material as claimed in any one of the claims 1 to 5, wherein the gate unit comprises a lower electrode layer, an OTS material layer arranged on the lower electrode layer, an upper electrode layer arranged on the OTS material layer and an extraction electrode arranged on the upper electrode layer from bottom to top in sequence.
8. The gate unit of claim 7, wherein said layer of OTS material has a thickness of 5nm or more and 30nm or less.
9. The gate unit of claim 7, wherein the material of the lower electrode layer includes but is not limited to one or more of W, Pt, Au, Ti, Al, Ag, Cu and Ni, or is one of the above elemental metal nitrides. The diameter of the lower electrode layer is greater than or equal to 50nm and less than or equal to 200nm, and the thickness of the lower electrode layer is greater than or equal to 100nm and less than or equal to 500 nm.
10. The gate unit of claim 7, wherein the material of the upper electrode layer includes but is not limited to one or more of W, Pt, Au, Ti, Al, Ag, Cu and Ni, or is one of the above elemental metal nitrides. The thickness of the upper electrode layer is greater than or equal to 10nm and less than or equal to 50 nm.
11. The gate unit of claim 7, wherein the extraction electrode is made of a material including but not limited to one or more of W, Pt, Au, Ti, Al, Ag, Cu and Ni, or one of the above metal nitrides, and has a thickness of 100nm or more and 500nm or less.
12. A method of manufacturing a gate unit according to any of claims 7 to 11, comprising at least the steps of:
forming the lower electrode layer;
forming an OTS material layer of claim 1-5 on the surface of the lower electrode layer, wherein the chemical formula is GeaAsbSecTexSiyPzWherein a, b, c, x, y, z all refer to atomic percent of the elements, and 5<a<45、10<b<40、15<c<50、0<x<15、0<y<10、0<z<10 while satisfying a + b + c + x + y + z as 100;
forming an upper electrode layer on the surface of the OTS material layer;
and forming a lead-out electrode on the surface of the upper electrode layer.
13. The method of fabricating a gate unit according to claim 12, wherein the OTS material is fabricated using any one of methods including, but not limited to, sputtering, evaporation, physical vapor phase, chemical vapor phase, molecular beam epitaxy, atomic vapor deposition or atomic layer deposition.
CN201811543070.6A 2018-12-17 2018-12-17 OTS material, gating unit and preparation method thereof Pending CN111326651A (en)

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KR20180105491A (en) * 2017-03-15 2018-09-28 포항공과대학교 산학협력단 Ovonic Threshold Switching Device and Method of the same

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CN112652711A (en) * 2020-12-09 2021-04-13 华中科技大学 Gating tube material, gating tube unit and preparation method thereof
CN112652711B (en) * 2020-12-09 2023-05-12 华中科技大学 Gate tube material, gate tube unit and preparation method of gate tube unit
CN113795924A (en) * 2021-07-28 2021-12-14 长江先进存储产业创新中心有限责任公司 Phase change memory device having a selector including a defect reducing material and method of forming the same

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Application publication date: 20200623