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Verilog UART

Verilog 391 122 Updated Mar 21, 2023

This repo awesome-AI4EDA contains the source for the webpage: https://ai4eda.github.io, which is a curated paper list of awesome AI for EDA.

TeX 104 20 Updated Jun 19, 2024
TL-Verilog 2 Updated Aug 29, 2023

Fearless hardware design

Verilog 134 7 Updated Jul 8, 2024

Verilog evaluation benchmark for large language model

Python 140 14 Updated Apr 30, 2024

Hey There! Welcome to my journey of dissecting and exploring the corners of Transaction Level Verilog HDL! 100 days of building and experimenting!

TL-Verilog 4 Updated Sep 27, 2023

Code generation tool for control and status registers

Ruby 301 44 Updated Jun 11, 2024

AutoGPT is the vision of accessible AI for everyone, to use and to build on. Our mission is to provide the tools, so that you can focus on what matters.

Python 164,532 43,662 Updated Jul 17, 2024

🦜🔗 Build context-aware reasoning applications

Python 89,297 14,074 Updated Jul 17, 2024

A Python based tool for generating hardware registers and their associated files

Python 7 Updated Nov 10, 2021

A ressource efficient, customizable, synthesizable 5G NR lower PHY written in Verilog

Jupyter Notebook 174 24 Updated Aug 29, 2023

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware

Verilog 650 227 Updated Dec 6, 2023

PICsimLab - Programmable IC Simulator Laboratory

C++ 442 85 Updated Jul 8, 2024
Yacc 116 20 Updated Jun 16, 2023

Virtual Breadboard / PCB simulation for Prototyping and Educational Purposes

C++ 6 2 Updated Jun 4, 2023

A damn-sexy, open source real-time dashboard builder for IOT and other web mashups. A free open-source alternative to Geckoboard.

JavaScript 6,434 1,192 Updated Sep 23, 2023

OpenHT FPGA design

Verilog 28 6 Updated Jun 24, 2024

Provision remote development environments via Terraform

Go 7,474 605 Updated Jul 17, 2024

Create fast and efficient standard cell based adders, multipliers and multiply-adders.

Python 104 9 Updated Sep 20, 2023

Generate Zynq configurations without using the vendor GUI

Python 29 Updated Jul 5, 2023

The digital design platform anybody can use.

2 Updated Dec 1, 2021

IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively supported.

Python 268 43 Updated Jul 16, 2024

This repository contain source code for new flow of FreeEDA now know as eSim

Python 81 72 Updated Apr 16, 2024
Verilog 2 Updated Aug 28, 2021

A library and command-line tool for querying a Verilog netlist.

C++ 24 3 Updated Jun 13, 2022

https://caravel-user-project.readthedocs.io

Verilog 175 326 Updated Jul 15, 2024

OpenSoC Fabric - A Network-On-Chip Generator

Scala 154 61 Updated Jun 18, 2020

Want a faster ML processor? Do it yourself! -- A framework for playing with custom opcodes to accelerate TensorFlow Lite for Microcontrollers (TFLM). . . . . . Online tutorial: https://google.githu…

Verilog 455 116 Updated Jul 16, 2024

web-based IDE for 8-bit programming and Verilog development

JavaScript 494 81 Updated Jun 30, 2024
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