Resources for RISC-V Summit Europe 2024 for poster: Accelerating software development for emerging ISA extensions with cloud-based FPGAs: RVV case study

WHATWG-compliant and fast URL parser written in modern C++

Fork of mcpp, a C/C++ preprocessor

This project records the process of optimizing SGEMM (single-precision floating point General Matrix Multiplication) on the riscv platform.

Advanced Fuzzing Library - Slot your Fuzzer together in Rust! Scales across cores and machines. For Windows, Android, MacOS, Linux, no_std, ...

A versatile, performance-oriented generic hash table library for C.

A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code

A translator from Intel SSE intrinsics to RISCV-V Extension implementation

RISC-V Vector Implementation of Keccak hash function

Tracking RISC-V Actions on Education, Training, Courses, Monitorships, etc.

Open-source high-performance RISC-V processor

This repo includes XiangShan's function units

A simple, single-cycle RISC-V (RV32IM) processor taken to the limits...

Learning FPGA, yosys, nextpnr, and RISC-V

Ocelot: The Berkeley Out-of-Order Machine With V-EXT support

The official repository for the gem5 computer-system architecture simulator.

Arrow: A RISC-V Vector Accelerator for Machine Learning Inference

A random fuzz generator for the RISC-V vector extension intrinsics

Box64 - Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices

Unit tests generator for RVV 1.0

Vector Acceleration IP core for RISC-V*

Fast integer to ascii / integer to string conversion

RISC-V Zve32x Vector Coprocessor

Stable Diffusion in pure C/C++

The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core