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[AIEX] Pass added to eliminate duplicate PHI in MBB
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//===-- AIEEliminateDuplicatePHI.cpp - Identify and remove duplicate PHI --===https:// | ||
// | ||
// This file is licensed under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
// (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates | ||
// | ||
//===----------------------------------------------------------------------===https:// | ||
// Identify and replace duplicate PHI nodes uses with the base PHI node. | ||
// The pass specifically targets PHI nodes with pointer type operands. | ||
//===----------------------------------------------------------------------===https:// | ||
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#include "AIEBaseSubtarget.h" | ||
#include "llvm/CodeGen/GlobalISel/CSEInfo.h" | ||
#include "llvm/CodeGen/GlobalISel/CSEMIRBuilder.h" | ||
#include "llvm/CodeGen/GlobalISel/GenericMachineInstrs.h" | ||
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h" | ||
#include "llvm/CodeGen/MachineFunction.h" | ||
#include "llvm/CodeGen/MachineFunctionPass.h" | ||
#include "llvm/CodeGen/MachineInstrBuilder.h" | ||
#include "llvm/CodeGen/MachineModuleInfo.h" | ||
#include "llvm/CodeGen/TargetPassConfig.h" | ||
#include "llvm/InitializePasses.h" | ||
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#define DEBUG_TYPE "aie-duplicate-PHI-elimination" | ||
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using namespace llvm; | ||
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static const char AIE_ELIMINATE_DUPLICATE_PHI[] = | ||
"AIE Eliminate Duplicate PHI Pass"; | ||
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namespace { | ||
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/// Eliminates duplicate PHI uses by replacing all uses of DuplicateReg with | ||
/// BaseReg. | ||
/// | ||
/// This function iterates over all instructions that use DuplicateReg and | ||
/// replaces any register operands that match DuplicateReg with BaseReg. | ||
/// | ||
/// \param MRI The MachineRegisterInfo object for the current function. | ||
/// \param Observer GISelObserverWrapper object to observe and track changes. | ||
/// \param BaseReg The register to replace DuplicateReg with. | ||
/// \param DuplicateReg The register to be replaced. | ||
static void eliminateDuplicatePHIUses(MachineRegisterInfo &MRI, | ||
GISelObserverWrapper &Observer, | ||
Register BaseReg, Register DuplicateReg) { | ||
const auto UseInstIter = MRI.use_instructions(DuplicateReg); | ||
std::vector<MachineInstr *> UseInstr; | ||
// We cannot directly iterate on \var UseInstIter and modify the | ||
// instruction. Creating a std::vector allows us to iterate without | ||
// corrupting the iterator allowing us to modify the instructions. | ||
for (auto &Use : UseInstIter) | ||
UseInstr.push_back(&Use); | ||
// Iterate on all the uses and modify the register operand. | ||
for (auto &Use : UseInstr) { | ||
for (auto &MO : Use->uses()) { | ||
LLVM_DEBUG(dbgs() << " Modifying Use: " << *Use); | ||
if (MO.isReg() && MO.getReg() == DuplicateReg) { | ||
Observer.changingInstr(*Use); | ||
MO.setReg(BaseReg); | ||
Observer.changedInstr(*Use); | ||
} | ||
} | ||
} | ||
} | ||
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/// Returns true if the instruction is a PHI node with a pointer type operand. | ||
/// \param MRI The MachineRegisterInfo object for the current function. | ||
/// \param MI The instruction to check. | ||
static bool isPointerTypePHI(MachineRegisterInfo &MRI, const MachineInstr &MI) { | ||
assert(MI.getOpcode() == TargetOpcode::G_PHI); | ||
const int DefaultAddrSpace = 0; | ||
const Register Reg = MI.getOperand(0).getReg(); | ||
const LLT RegType = MRI.getType(Reg); | ||
return RegType == LLT::pointer(DefaultAddrSpace, RegType.getSizeInBits()); | ||
} | ||
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class AIEEliminateDuplicatePHI : public MachineFunctionPass { | ||
public: | ||
static char ID; | ||
AIEEliminateDuplicatePHI() : MachineFunctionPass(ID) {} | ||
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bool runOnMachineFunction(MachineFunction &MF) override { | ||
MachineRegisterInfo &MRI = MF.getRegInfo(); | ||
TargetPassConfig &TPC = getAnalysis<TargetPassConfig>(); | ||
// Enable CSE to set up GISelObserverWrapper object | ||
GISelCSEAnalysisWrapper &Wrapper = | ||
getAnalysis<GISelCSEAnalysisWrapperPass>().getCSEWrapper(); | ||
auto *CSEInfo = &Wrapper.get(TPC.getCSEConfig()); | ||
std::unique_ptr<MachineIRBuilder> Builder = | ||
CSEInfo ? std::make_unique<CSEMIRBuilder>() | ||
: std::make_unique<MachineIRBuilder>(); | ||
Builder->setMF(MF); | ||
MachineIRBuilder &MIB = *Builder; | ||
// Set Observer to inform change of register type or change in op-code | ||
GISelObserverWrapper Observer; | ||
if (CSEInfo) { | ||
Observer.addObserver(CSEInfo); | ||
MIB.setChangeObserver(Observer); | ||
} | ||
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bool Changed = false; | ||
for (MachineBasicBlock &MBB : MF) { | ||
Changed |= processMBB(MBB, MRI, MIB, Observer); | ||
} | ||
return Changed; | ||
} | ||
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void getAnalysisUsage(AnalysisUsage &AU) const override { | ||
AU.addRequired<MachineModuleInfoWrapperPass>(); | ||
AU.addRequired<GISelCSEAnalysisWrapperPass>(); | ||
AU.addRequired<TargetPassConfig>(); | ||
AU.setPreservesAll(); | ||
} | ||
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StringRef getPassName() const override { return AIE_ELIMINATE_DUPLICATE_PHI; } | ||
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private: | ||
bool processMBB(MachineBasicBlock &MBB, MachineRegisterInfo &MRI, | ||
MachineIRBuilder &MIB, GISelObserverWrapper &Observer) { | ||
bool Changed = false; | ||
auto LastPHI = MBB.getFirstNonPHI(); | ||
for (auto &MI : make_early_inc_range(MBB.phis())) { | ||
if (!isPointerTypePHI(MRI, MI)) | ||
continue; | ||
for (auto &PHI : make_early_inc_range( | ||
make_range(std::next(MachineBasicBlock::instr_iterator(MI)), | ||
MachineBasicBlock::instr_iterator(*LastPHI)))) { | ||
if (!isPointerTypePHI(MRI, PHI)) | ||
continue; | ||
if (MI.isIdenticalTo(PHI, MachineInstr::IgnoreDefs)) { | ||
LLVM_DEBUG(dbgs() << "Identical PHI nodes found\n"); | ||
LLVM_DEBUG(dbgs() << " Base PHI: " << MI); | ||
LLVM_DEBUG(dbgs() << " Duplicate PHI: " << PHI); | ||
eliminateDuplicatePHIUses(MRI, Observer, MI.getOperand(0).getReg(), | ||
PHI.getOperand(0).getReg()); | ||
Changed = true; | ||
} | ||
} | ||
} | ||
return Changed; | ||
} | ||
}; | ||
} // namespace | ||
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char AIEEliminateDuplicatePHI::ID = 0; | ||
INITIALIZE_PASS_BEGIN(AIEEliminateDuplicatePHI, DEBUG_TYPE, | ||
AIE_ELIMINATE_DUPLICATE_PHI, false, false) | ||
INITIALIZE_PASS_DEPENDENCY(GISelCSEAnalysisWrapperPass) | ||
INITIALIZE_PASS_DEPENDENCY(MachineModuleInfoWrapperPass) | ||
INITIALIZE_PASS_DEPENDENCY(TargetPassConfig) | ||
INITIALIZE_PASS_END(AIEEliminateDuplicatePHI, DEBUG_TYPE, | ||
AIE_ELIMINATE_DUPLICATE_PHI, false, false) | ||
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namespace llvm { | ||
MachineFunctionPass *createAIEEliminateDuplicatePHI() { | ||
return new AIEEliminateDuplicatePHI(); | ||
} | ||
} // namespace llvm |
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176 changes: 176 additions & 0 deletions
176
llvm/test/CodeGen/AIE/GlobalISel/eliminate-duplicate-phi.mir
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4 | ||
# | ||
# This file is licensed under the Apache License v2.0 with LLVM Exceptions. | ||
# See https://llvm.org/LICENSE.txt for license information. | ||
# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
# | ||
# (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates | ||
# RUN: llc -mtriple aie2 -run-pass=aie-duplicate-PHI-elimination %s -verify-machineinstrs -o - | FileCheck %s | ||
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--- | ||
name: duplicate_PHI_1_duplicate_elimination | ||
legalized: false | ||
tracksRegLiveness: true | ||
body: | | ||
; CHECK-LABEL: name: duplicate_PHI_1_duplicate_elimination | ||
; CHECK: bb.0: | ||
; CHECK-NEXT: successors: %bb.1(0x80000000) | ||
; CHECK-NEXT: liveins: $p1 | ||
; CHECK-NEXT: {{ $}} | ||
; CHECK-NEXT: [[C:%[0-9]+]]:_(p0) = G_CONSTANT i20 10 | ||
; CHECK-NEXT: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i20 0 | ||
; CHECK-NEXT: [[C2:%[0-9]+]]:_(p0) = G_CONSTANT i20 20 | ||
; CHECK-NEXT: {{ $}} | ||
; CHECK-NEXT: bb.1: | ||
; CHECK-NEXT: successors: %bb.1(0x80000000) | ||
; CHECK-NEXT: {{ $}} | ||
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(p0) = G_PHI [[C]](p0), %bb.0, [[C1]](p0), %bb.1 | ||
; CHECK-NEXT: [[PHI1:%[0-9]+]]:_(p0) = G_PHI [[C]](p0), %bb.0, [[C1]](p0), %bb.1 | ||
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(<32 x s8>) = G_LOAD [[PHI]](p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(<32 x s8>) = G_LOAD [[PHI]](p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
; CHECK-NEXT: G_BR %bb.1 | ||
bb.1: | ||
successors: %bb.2(0x80000000); %bb.2(100.00%) | ||
liveins: $p1 | ||
%5:_(p0) = G_CONSTANT i20 10 | ||
%15:_(p0) = G_CONSTANT i20 0 | ||
%16:_(p0) = G_CONSTANT i20 20 | ||
bb.2: | ||
successors: %bb.2(0x80000000); %bb.2(100.00%) | ||
%12:_(p0) = G_PHI %5:_(p0), %bb.1, %15:_(p0), %bb.2 | ||
%14:_(p0) = G_PHI %5:_(p0), %bb.1, %15:_(p0), %bb.2 | ||
%0:_(<32 x s8>) = G_LOAD %12:_(p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
%1:_(<32 x s8>) = G_LOAD %14:_(p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
G_BR %bb.2 | ||
... | ||
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--- | ||
name: duplicate_PHI_2_duplicate_elimination | ||
legalized: false | ||
tracksRegLiveness: true | ||
body: | | ||
; CHECK-LABEL: name: duplicate_PHI_2_duplicate_elimination | ||
; CHECK: bb.0: | ||
; CHECK-NEXT: successors: %bb.1(0x80000000) | ||
; CHECK-NEXT: liveins: $p1 | ||
; CHECK-NEXT: {{ $}} | ||
; CHECK-NEXT: [[C:%[0-9]+]]:_(p0) = G_CONSTANT i20 10 | ||
; CHECK-NEXT: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i20 0 | ||
; CHECK-NEXT: {{ $}} | ||
; CHECK-NEXT: bb.1: | ||
; CHECK-NEXT: successors: %bb.1(0x80000000) | ||
; CHECK-NEXT: {{ $}} | ||
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(p0) = G_PHI [[C]](p0), %bb.0, [[C1]](p0), %bb.1 | ||
; CHECK-NEXT: [[PHI1:%[0-9]+]]:_(p0) = G_PHI [[C]](p0), %bb.0, [[C1]](p0), %bb.1 | ||
; CHECK-NEXT: [[PHI2:%[0-9]+]]:_(p0) = G_PHI [[C]](p0), %bb.0, [[C1]](p0), %bb.1 | ||
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(<32 x s8>) = G_LOAD [[PHI]](p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(<32 x s8>) = G_LOAD [[PHI]](p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(<32 x s8>) = G_LOAD [[PHI]](p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
; CHECK-NEXT: G_BR %bb.1 | ||
bb.1: | ||
successors: %bb.2(0x80000000); %bb.2(100.00%) | ||
liveins: $p1 | ||
%5:_(p0) = G_CONSTANT i20 10 | ||
%15:_(p0) = G_CONSTANT i20 0 | ||
bb.2: | ||
successors: %bb.2(0x80000000); %bb.2(100.00%) | ||
%12:_(p0) = G_PHI %5:_(p0), %bb.1, %15:_(p0), %bb.2 | ||
%14:_(p0) = G_PHI %5:_(p0), %bb.1, %15:_(p0), %bb.2 | ||
%34:_(p0) = G_PHI %5:_(p0), %bb.1, %15:_(p0), %bb.2 | ||
%0:_(<32 x s8>) = G_LOAD %12:_(p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
%1:_(<32 x s8>) = G_LOAD %14:_(p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
%2:_(<32 x s8>) = G_LOAD %34:_(p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
G_BR %bb.2 | ||
... | ||
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--- | ||
name: duplicate_PHI_2_duplicate_elimination_2_unique | ||
legalized: false | ||
tracksRegLiveness: true | ||
body: | | ||
; CHECK-LABEL: name: duplicate_PHI_2_duplicate_elimination_2_unique | ||
; CHECK: bb.0: | ||
; CHECK-NEXT: successors: %bb.1(0x80000000) | ||
; CHECK-NEXT: liveins: $p1 | ||
; CHECK-NEXT: {{ $}} | ||
; CHECK-NEXT: [[C:%[0-9]+]]:_(p0) = G_CONSTANT i20 10 | ||
; CHECK-NEXT: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i20 0 | ||
; CHECK-NEXT: [[C2:%[0-9]+]]:_(p0) = G_CONSTANT i20 1000 | ||
; CHECK-NEXT: {{ $}} | ||
; CHECK-NEXT: bb.1: | ||
; CHECK-NEXT: successors: %bb.1(0x80000000) | ||
; CHECK-NEXT: {{ $}} | ||
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(p0) = G_PHI [[C]](p0), %bb.0, [[C1]](p0), %bb.1 | ||
; CHECK-NEXT: [[PHI1:%[0-9]+]]:_(p0) = G_PHI [[C]](p0), %bb.0, [[C1]](p0), %bb.1 | ||
; CHECK-NEXT: [[PHI2:%[0-9]+]]:_(p0) = G_PHI [[C]](p0), %bb.0, [[C2]](p0), %bb.1 | ||
; CHECK-NEXT: [[PHI3:%[0-9]+]]:_(p0) = G_PHI [[C]](p0), %bb.0, [[C1]](p0), %bb.1 | ||
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(<32 x s8>) = G_LOAD [[PHI]](p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(<32 x s8>) = G_LOAD [[PHI]](p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(<32 x s8>) = G_LOAD [[PHI2]](p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(<32 x s8>) = G_LOAD [[PHI]](p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
; CHECK-NEXT: G_BR %bb.1 | ||
bb.1: | ||
successors: %bb.2(0x80000000); %bb.2(100.00%) | ||
liveins: $p1 | ||
%5:_(p0) = G_CONSTANT i20 10 | ||
%15:_(p0) = G_CONSTANT i20 0 | ||
%16:_(p0) = G_CONSTANT i20 1000 | ||
bb.2: | ||
successors: %bb.2(0x80000000); %bb.2(100.00%) | ||
%12:_(p0) = G_PHI %5:_(p0), %bb.1, %15:_(p0), %bb.2 | ||
%14:_(p0) = G_PHI %5:_(p0), %bb.1, %15:_(p0), %bb.2 | ||
%34:_(p0) = G_PHI %5:_(p0), %bb.1, %16:_(p0), %bb.2 | ||
%44:_(p0) = G_PHI %5:_(p0), %bb.1, %15:_(p0), %bb.2 | ||
%0:_(<32 x s8>) = G_LOAD %12:_(p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
%1:_(<32 x s8>) = G_LOAD %14:_(p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
%2:_(<32 x s8>) = G_LOAD %34:_(p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
%3:_(<32 x s8>) = G_LOAD %44:_(p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
G_BR %bb.2 | ||
... | ||
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--- | ||
name: duplicate_PHI_2_duplicate_elimination_multiple_use | ||
legalized: false | ||
tracksRegLiveness: true | ||
body: | | ||
; CHECK-LABEL: name: duplicate_PHI_2_duplicate_elimination_multiple_use | ||
; CHECK: bb.0: | ||
; CHECK-NEXT: successors: %bb.1(0x80000000) | ||
; CHECK-NEXT: liveins: $p1 | ||
; CHECK-NEXT: {{ $}} | ||
; CHECK-NEXT: [[C:%[0-9]+]]:_(p0) = G_CONSTANT i20 10 | ||
; CHECK-NEXT: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i20 0 | ||
; CHECK-NEXT: {{ $}} | ||
; CHECK-NEXT: bb.1: | ||
; CHECK-NEXT: successors: %bb.1(0x80000000) | ||
; CHECK-NEXT: {{ $}} | ||
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(p0) = G_PHI [[C]](p0), %bb.0, [[C1]](p0), %bb.1 | ||
; CHECK-NEXT: [[PHI1:%[0-9]+]]:_(p0) = G_PHI [[C]](p0), %bb.0, [[C1]](p0), %bb.1 | ||
; CHECK-NEXT: [[PHI2:%[0-9]+]]:_(p0) = G_PHI [[C]](p0), %bb.0, [[C1]](p0), %bb.1 | ||
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(<32 x s8>) = G_LOAD [[PHI]](p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(<32 x s8>) = G_LOAD [[PHI]](p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(<32 x s8>) = G_LOAD [[PHI]](p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(<32 x s8>) = G_LOAD [[PHI]](p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
; CHECK-NEXT: [[LOAD4:%[0-9]+]]:_(<32 x s8>) = G_LOAD [[PHI]](p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
; CHECK-NEXT: G_BR %bb.1 | ||
bb.1: | ||
successors: %bb.2(0x80000000); %bb.2(100.00%) | ||
liveins: $p1 | ||
%5:_(p0) = G_CONSTANT i20 10 | ||
%15:_(p0) = G_CONSTANT i20 0 | ||
bb.2: | ||
successors: %bb.2(0x80000000); %bb.2(100.00%) | ||
%12:_(p0) = G_PHI %5:_(p0), %bb.1, %15:_(p0), %bb.2 | ||
%14:_(p0) = G_PHI %5:_(p0), %bb.1, %15:_(p0), %bb.2 | ||
%34:_(p0) = G_PHI %5:_(p0), %bb.1, %15:_(p0), %bb.2 | ||
%0:_(<32 x s8>) = G_LOAD %12:_(p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
%1:_(<32 x s8>) = G_LOAD %14:_(p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
%2:_(<32 x s8>) = G_LOAD %34:_(p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
%3:_(<32 x s8>) = G_LOAD %14:_(p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
%4:_(<32 x s8>) = G_LOAD %34:_(p0) :: (load (<32 x s8>) from `ptr addrspace(5) null`, addrspace 5) | ||
G_BR %bb.2 | ||
... |
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