[AIEX] Enable InferAddressSpacesPass

llvm/lib/Target/AIE/AIETargetMachine.cpp

@@ -45,6 +45,8 @@
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/Transforms/IPO/GlobalDCE.h"
 #include "llvm/Transforms/IPO/Internalize.h"
+#include "llvm/Transforms/Scalar.h"
+
 using namespace llvm;
 
 static cl::opt<bool>
@@ -155,6 +157,8 @@ void AIEPassConfig::addIRPasses() {
           }));
     }
   }
+  if (TM->getOptLevel() > CodeGenOptLevel::None)
+    addPass(createInferAddressSpacesPass());
   TargetPassConfig::addIRPasses();
 }
 

llvm/test/CodeGen/AIE/aie1/llc-pipeline.ll

@@ -26,9 +26,9 @@
 
 ; AIE-O123-NEXT:AIE complex addressing modes based Alias Analysis
 ; AIE-O123-NEXT:External Alias Analysis
+; AIE-O123-NEXT:Assumption Cache Tracker
 ; AIE-O123-NEXT:Type-Based Alias Analysis
 ; AIE-O123-NEXT:Scoped NoAlias Alias Analysis
-; AIE-O123-NEXT:Assumption Cache Tracker
 ; AIE-O123-NEXT:Profile summary info
 
 ; AIE-O0123-NEXT:Create Garbage Collector Module Metadata
@@ -47,7 +47,7 @@
 ; AIE-O0123-NEXT:      Expand large div/rem
 ; AIE-O0123-NEXT:      Expand large fp convert
 ; AIE-O0123-NEXT:      Expand Atomic instructions
-
+; AIE-O123-NEXT:      Infer address spaces
 ; AIE-O123-NEXT:      Dominator Tree Construction
 ; AIE-O123-NEXT:      Basic Alias Analysis (stateless AA impl)
 ; AIE-O123-NEXT:      Natural Loop Information

llvm/test/CodeGen/AIE/aie2/GlobalISel/infer-address-space.ll

@@ -0,0 +1,59 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
+
+; RUN: llc -O0 -mtriple=aie2 -stop-after=irtranslator %s -o - 2>&1 | FileCheck -check-prefixes=AIE-O0 %s
+; RUN: llc -O1 -mtriple=aie2 -stop-after=irtranslator %s -o - 2>&1 | FileCheck -check-prefixes=AIE-O1 %s
+; RUN: llc -O2 -mtriple=aie2 -stop-after=irtranslator %s -o - 2>&1 | FileCheck -check-prefixes=AIE-O2 %s
+
+define <8 x i32> @test_infer_addrspace(ptr %input , <2 x i32> %b) {
+  ; AIE-O0-LABEL: name: test_infer_addrspace
+  ; AIE-O0: bb.1.entry:
+  ; AIE-O0-NEXT:   liveins: $l0, $p0
+  ; AIE-O0-NEXT: {{  $}}
+  ; AIE-O0-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $p0
+  ; AIE-O0-NEXT:   [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $l0
+  ; AIE-O0-NEXT:   [[ADDRSPACE_CAST:%[0-9]+]]:_(p5) = G_ADDRSPACE_CAST [[COPY]](p0)
+  ; AIE-O0-NEXT:   [[ADDRSPACE_CAST1:%[0-9]+]]:_(p0) = G_ADDRSPACE_CAST [[ADDRSPACE_CAST]](p5)
+  ; AIE-O0-NEXT:   [[C:%[0-9]+]]:_(s20) = G_CONSTANT i20 10
+  ; AIE-O0-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = nuw G_PTR_ADD [[ADDRSPACE_CAST1]], [[C]](s20)
+  ; AIE-O0-NEXT:   [[ADDRSPACE_CAST2:%[0-9]+]]:_(p5) = G_ADDRSPACE_CAST [[PTR_ADD]](p0)
+  ; AIE-O0-NEXT:   [[LOAD:%[0-9]+]]:_(<8 x s32>) = G_LOAD [[ADDRSPACE_CAST2]](p5) :: (load (<8 x s32>) from %ir.add.ptr.ascast.i, addrspace 5)
+  ; AIE-O0-NEXT:   $wl0 = COPY [[LOAD]](<8 x s32>)
+  ; AIE-O0-NEXT:   PseudoRET implicit $lr, implicit $wl0
+  ;
+  ; AIE-O1-LABEL: name: test_infer_addrspace
+  ; AIE-O1: bb.1.entry:
+  ; AIE-O1-NEXT:   liveins: $l0, $p0
+  ; AIE-O1-NEXT: {{  $}}
+  ; AIE-O1-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $p0
+  ; AIE-O1-NEXT:   [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $l0
+  ; AIE-O1-NEXT:   [[ADDRSPACE_CAST:%[0-9]+]]:_(p5) = G_ADDRSPACE_CAST [[COPY]](p0)
+  ; AIE-O1-NEXT:   [[ADDRSPACE_CAST1:%[0-9]+]]:_(p0) = G_ADDRSPACE_CAST [[ADDRSPACE_CAST]](p5)
+  ; AIE-O1-NEXT:   [[C:%[0-9]+]]:_(s20) = G_CONSTANT i20 10
+  ; AIE-O1-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = nuw G_PTR_ADD [[ADDRSPACE_CAST1]], [[C]](s20)
+  ; AIE-O1-NEXT:   [[ADDRSPACE_CAST2:%[0-9]+]]:_(p5) = G_ADDRSPACE_CAST [[PTR_ADD]](p0)
+  ; AIE-O1-NEXT:   [[LOAD:%[0-9]+]]:_(<8 x s32>) = G_LOAD [[ADDRSPACE_CAST2]](p5) :: (load (<8 x s32>) from %ir.add.ptr.ascast.i, addrspace 5)
+  ; AIE-O1-NEXT:   $wl0 = COPY [[LOAD]](<8 x s32>)
+  ; AIE-O1-NEXT:   PseudoRET implicit $lr, implicit $wl0
+  ;
+  ; AIE-O2-LABEL: name: test_infer_addrspace
+  ; AIE-O2: bb.1.entry:
+  ; AIE-O2-NEXT:   liveins: $l0, $p0
+  ; AIE-O2-NEXT: {{  $}}
+  ; AIE-O2-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $p0
+  ; AIE-O2-NEXT:   [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $l0
+  ; AIE-O2-NEXT:   [[ADDRSPACE_CAST:%[0-9]+]]:_(p5) = G_ADDRSPACE_CAST [[COPY]](p0)
+  ; AIE-O2-NEXT:   [[ADDRSPACE_CAST1:%[0-9]+]]:_(p0) = G_ADDRSPACE_CAST [[ADDRSPACE_CAST]](p5)
+  ; AIE-O2-NEXT:   [[C:%[0-9]+]]:_(s20) = G_CONSTANT i20 10
+  ; AIE-O2-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = nuw G_PTR_ADD [[ADDRSPACE_CAST1]], [[C]](s20)
+  ; AIE-O2-NEXT:   [[ADDRSPACE_CAST2:%[0-9]+]]:_(p5) = G_ADDRSPACE_CAST [[PTR_ADD]](p0)
+  ; AIE-O2-NEXT:   [[LOAD:%[0-9]+]]:_(<8 x s32>) = G_LOAD [[ADDRSPACE_CAST2]](p5) :: (load (<8 x s32>) from %ir.add.ptr.ascast.i, addrspace 5)
+  ; AIE-O2-NEXT:   $wl0 = COPY [[LOAD]](<8 x s32>)
+  ; AIE-O2-NEXT:   PseudoRET implicit $lr, implicit $wl0
+entry:
+  %p_mat_b.0890 = addrspacecast ptr %input to ptr addrspace(5)
+  %39 = addrspacecast ptr addrspace(5) %p_mat_b.0890 to ptr
+  %add.ptr.i537 = getelementptr inbounds i8, ptr %39, i20 10
+  %add.ptr.ascast.i = addrspacecast ptr %add.ptr.i537 to ptr addrspace(5)
+  %40 = load <8 x i32>, ptr addrspace(5) %add.ptr.ascast.i, align 32
+  ret <8 x i32> %40
+}

llvm/test/CodeGen/AIE/aie2/llc-pipeline-aie2.ll

@@ -26,9 +26,9 @@
 
 ; AIE-O123-NEXT:AIE complex addressing modes based Alias Analysis
 ; AIE-O123-NEXT:External Alias Analysis
+; AIE-O123-NEXT:Assumption Cache Tracker
 ; AIE-O123-NEXT:Type-Based Alias Analysis
 ; AIE-O123-NEXT:Scoped NoAlias Alias Analysis
-; AIE-O123-NEXT:Assumption Cache Tracker
 ; AIE-O123-NEXT:Profile summary info
 
 ; AIE-O0123-NEXT:Create Garbage Collector Module Metadata
@@ -46,7 +46,7 @@
 ; AIE-O0123-NEXT:      Expand large div/rem
 ; AIE-O0123-NEXT:      Expand large fp convert
 ; AIE-O0123-NEXT:      Expand Atomic instructions
-
+; AIE-O123-NEXT:      Infer address spaces
 ; AIE-O123-NEXT:      Dominator Tree Construction
 ; AIE-O123-NEXT:      Basic Alias Analysis (stateless AA impl)
 ; AIE-O123-NEXT:      Natural Loop Information