The Multiflow compiler uses the trace scheduling algorithm to find and exploit instruction-
level parallelism beyond basic blocks. The compiler generates code for VLIW computers that …

Very Long Instruction Word (VLIW) architectures were promised to deliver far more than the
factor of two or three that current architectures achieve from overlapped execution. Using a …

A VLIW (very long instruction word) architecture machine called the TRACE has been built
along with its companion Trace Scheduling compacting compiler. This machine has three …

Transport-triggered architectures are a new class of architectures that provide more
scheduling freedom and have unique compiler optimizations. This paper reports …

A Method for Scheduling Parallel L oops~ lw advantage of, capability of rallel machines,
application programs must contain sufficient parallelism, and this parallelism must be …

We describe a new algorithm for parallelization of sequential code that eliminates anti and
output dependence8 by renaming registers on an as-needed basis during scheduling. A …

The class of problems that can be effectively compiled by parallelizing compilers is
discussed. This is accomplished with the doconsider construct which would allow these …

Because a loop's body often executes many times, loops provide a rich opportunity for
exploiting parallelism. This article explains scheduling techniques and compares results on …

Traces are dynamic instruction sequences constructed and cached by hardware. A
microarchitecture organized around traces is presented as a means for efficiently executing …

Parallel execution of programs requires more resources and more complex resource
management than sequential execution. If concurrent tasks can be spawned dynamically …