WO2019188116A1 - Organic el display device and method for producing organic el display device - Google Patents
Organic el display device and method for producing organic el display device Download PDFInfo
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- WO2019188116A1 WO2019188116A1 PCT/JP2019/009309 JP2019009309W WO2019188116A1 WO 2019188116 A1 WO2019188116 A1 WO 2019188116A1 JP 2019009309 W JP2019009309 W JP 2019009309W WO 2019188116 A1 WO2019188116 A1 WO 2019188116A1
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Images
Classifications
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- G—PHYSICS
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- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B33/00—Electroluminescent light sources
- H05B33/02—Details
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B33/00—Electroluminescent light sources
- H05B33/02—Details
- H05B33/04—Sealing arrangements, e.g. against humidity
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B33/00—Electroluminescent light sources
- H05B33/10—Apparatus or processes specially adapted to the manufacture of electroluminescent light sources
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/87—Passivation; Containers; Encapsulations
- H10K59/873—Encapsulations
- H10K59/8731—Encapsulations multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers
Definitions
- the present invention relates to an organic EL display device and a method for manufacturing the organic EL display device.
- organic light emitting diode OLED: Organic Light Emitting Diode
- organic EL Electro-luminescent
- the organic EL display device uses a self-luminous body as compared with a liquid crystal display device, it is not only excellent in terms of visibility and response speed, but also does not require a lighting device such as a backlight. Therefore, it is possible to reduce the thickness.
- the organic EL display device includes a display panel in which a thin film transistor (TFT), an organic light emitting diode (OLED), and the like are formed on a base material.
- TFT thin film transistor
- OLED organic light emitting diode
- a method of sealing a display region including the light emitting element is employed in order to protect the light emitting element from moisture and the like.
- a sealing method for example, as disclosed in Patent Document 1 below, a method of combining an inorganic material film and a resin material layer is used.
- the inorganic material film is usually formed by a chemical vapor deposition (CVD) method or the like.
- CVD chemical vapor deposition
- an inorganic material film may be once formed over a wide area, and then the inorganic material film formed in a predetermined region may be removed by etching. However, the layer may disappear to the layer adjacent to the lower side of the inorganic material film by etching.
- an object of the present invention is to provide an organic EL display device in which defects due to etching are suppressed.
- a method for manufacturing a display device is provided.
- a display region having a plurality of pixels and a component mounting region on which a component is mounted are positioned, and a metal layer that is not energized with wiring arranged from the display region to the component mounting region
- the insulating material film is removed by dry etching to expose a part of the wiring, and at the time of exposing the wiring, at least a part of the metal layer is also exposed.
- a display device includes a base material having a display region having a plurality of pixels and a component mounting region on which a component is mounted, and a sealing member that covers the display region of the base material and is formed of an inorganic insulating material.
- a stop film, a wiring arranged from the display area of the base material to the component mounting area, a metal layer formed on the base material and not energized, and the wiring and the metal layer, A portion not covered with the sealing film is included.
- FIG. 2 is a schematic plan view illustrating an example of a display panel of the organic EL display device illustrated in FIG. 1.
- FIG. 3 is a diagram showing an example of a III-III cross section of FIG. 2. It is a figure for demonstrating the manufacturing method of the organic electroluminescent display apparatus in one embodiment of this invention. It is a figure which shows an example of the II cross section of FIG. 4A. It is a figure which shows an example of the II-II cross section of FIG. 4A. It is a figure following FIG. It is a figure which shows an example of the II cross section of FIG. 5A.
- FIG. 10 is a schematic plan view showing a modification of the display panel of the organic EL display device shown in FIG. 1.
- FIG. 8 is an enlarged plan view of an example of a region A surrounded by a broken line in FIG. 7.
- FIG. 8 is an enlarged plan view of another example of a region A surrounded by a broken line in FIG. 7.
- FIG. 1 is a schematic diagram showing a schematic configuration of a display device according to an embodiment of the present invention, using an organic EL display device as an example.
- the organic EL display device 2 includes a pixel array unit 4 that displays an image and a drive unit that drives the pixel array unit 4.
- the organic EL display device 2 is a flexible display using a resin film as a base material, and a laminated structure such as a thin film transistor (TFT) or an organic light emitting diode (OLED) is formed on the base material made of the resin film.
- TFT thin film transistor
- OLED organic light emitting diode
- OLEDs 6 and pixel circuits 8 are arranged in a matrix corresponding to the pixels.
- the pixel circuit 8 includes a plurality of TFTs 10 and 12 and a capacitor 14.
- the drive unit includes a scanning line drive circuit 20, a video line drive circuit 22, a drive power supply circuit 24, and a control device 26, and drives the pixel circuit 8 to control light emission of the OLED 6.
- the scanning line driving circuit 20 is connected to a scanning signal line 28 provided for each horizontal arrangement (pixel row) of pixels.
- the scanning line driving circuit 20 sequentially selects the scanning signal lines 28 according to the timing signal input from the control device 26, and applies a voltage for turning on the lighting TFT 10 to the selected scanning signal lines 28.
- the video line driving circuit 22 is connected to a video signal line 30 provided for each vertical arrangement (pixel column) of pixels.
- the video line driving circuit 22 receives a video signal from the control device 26, and in accordance with the selection of the scanning signal line 28 by the scanning line driving circuit 20, a voltage corresponding to the video signal of the selected pixel row is applied to each video signal line. Output to 30.
- the voltage is written into the capacitor 14 via the lighting TFT 10 in the selected pixel row.
- the driving TFT 12 supplies a current corresponding to the written voltage to the OLED 6, whereby the OLED 6 of the pixel corresponding to the selected scanning signal line 28 emits light.
- the drive power supply circuit 24 is connected to a drive power supply line 32 provided for each pixel column, and supplies current to the OLED 6 via the drive power supply line 32 and the drive TFT 12 of the selected pixel row.
- the lower electrode of the OLED 6 is connected to the driving TFT 12.
- the upper electrode of each OLED 6 is configured by an electrode common to the OLED 6 of all pixels.
- the lower electrode is configured as an anode (anode)
- the upper electrode is a cathode (cathode) and a low potential is input.
- the lower electrode is configured as a cathode (cathode)
- a low potential is input
- the upper electrode is an anode (anode) and a high potential is input.
- FIG. 2 is a schematic plan view showing an example of the display panel of the organic EL display device shown in FIG.
- the pixel array unit 4 shown in FIG. 1 is provided in the display area 42 of the display panel 40, and the OLEDs 6 are arranged in the pixel array unit 4 as described above.
- the upper electrode constituting the OLED 6 is formed in common for each pixel and covers the entire display region 42.
- a component mounting area 46 is provided on one side of the rectangular display panel 40, and wiring connected to the display area 42 is arranged.
- a driver IC 48 constituting a driving unit is mounted, or a flexible printed circuit board (FPC) 50 is connected.
- the FPC 50 is connected to the control device 26 and other circuits 20, 22, 24, etc., and an IC is mounted thereon.
- FIG. 3 is a view showing an example of a section taken along the line III-III in FIG. In FIG. 3, hatching of some layers is omitted in order to make the cross-sectional structure easy to see.
- the display panel 40 has a structure in which, for example, a circuit layer 74 in which TFTs 72 and the like are formed, an OLED 6 and a sealing layer 106 for sealing the OLED 6 are stacked on a flexible base material 70.
- the flexible base material 70 is made of, for example, a resin film containing a resin such as a polyimide resin.
- the thickness of the base material 70 is, for example, 10 ⁇ m to 20 ⁇ m.
- the pixel array unit 4 is a top emission type, and light generated by the OLED 6 is emitted to the side opposite to the base material 70 side (upward in FIG. 3).
- the colorization method in the organic EL display device 2 is a color filter method, for example, on the display panel 40 on the side opposite to the base material 70 side (upper side) of the sealing layer 106 or on the counter substrate side
- a color filter is arranged in For example, red (R), green (G), and blue (B) light is produced by passing white light generated by the OLED 6 through the color filter.
- the pixel circuit 8 In the circuit layer 74 of the display area 42, the pixel circuit 8, the scanning signal line 28, the video signal line 30, the drive power supply line 32, and the like are formed. At least a part of the drive unit can be formed as a circuit layer 74 on the substrate 70 in a region adjacent to the display region 42.
- the terminals of the driver IC 48 and the FPC 50 constituting the driving unit are electrically connected to the wiring 116 of the circuit layer 74 in the component mounting region 46.
- a base layer 80 made of an inorganic insulating material is disposed on the base material 70.
- the inorganic insulating material for example, silicon nitride (SiN y ), silicon oxide (SiO x ), and a composite thereof are used.
- a semiconductor region 82 serving as a channel portion and a source / drain portion of the top gate TFT 72 is formed on the base material 70 through the base layer 80.
- the semiconductor region 82 is made of, for example, polysilicon (p-Si).
- the semiconductor region 82 is formed by, for example, providing a semiconductor layer (p-Si film) on the base material 70, patterning the semiconductor layer, and selectively leaving a portion used in the circuit layer 74.
- a gate electrode 86 is disposed on the channel portion of the TFT 72 via a gate insulating film 84.
- the gate insulating film 84 is typically formed of TEOS.
- the gate electrode 86 is formed by patterning a metal film formed by sputtering or the like, for example.
- An interlayer insulating layer 88 is disposed on the gate electrode 86 so as to cover the gate electrode 86.
- the interlayer insulating layer 88 is formed of, for example, the above inorganic insulating material. Impurities are introduced into the semiconductor region 82 (p-Si) serving as the source / drain portion of the TFT 72 by ion implantation, and further, a source electrode 90a and a drain electrode 90b electrically connected thereto are formed. Is done.
- an interlayer insulating film 92 is disposed on the TFT 72.
- a wiring 94 is disposed on the surface of the interlayer insulating film 92.
- the wiring 94 is formed by patterning a metal film formed by sputtering or the like.
- the metal film forming the wiring 94 and the metal film used for forming the gate electrode 86, the source electrode 90a, and the drain electrode 90b include, for example, the wiring 116 and the scanning signal line 28, the video signal line 30, and the like shown in FIG.
- the drive power supply line 32 can be formed with a multilayer wiring structure.
- a planarizing film 96 and a passivation film 98 are formed thereon, and the OLED 6 is formed on the passivation film 98 in the display region 42.
- the planarizing film 96 is made of, for example, an organic insulating material such as a resin material.
- the passivation film 98 is formed of an inorganic insulating material such as SiN y , for example.
- the OLED 6 includes a lower electrode 100, an organic material layer 102, and an upper electrode 104.
- the organic material layer 102 includes a hole transport layer, a light emitting layer, an electron transport layer, and the like.
- the OLED 6 is typically formed by laminating the lower electrode 100, the organic material layer 102, and the upper electrode 104 in this order from the base material 70 side.
- the lower electrode 100 is the anode (anode) of the OLED 6 and the upper electrode 104 is the cathode (cathode).
- the lower electrode 100 is connected to the source electrode 90a of the TFT 72.
- a contact hole 110 for connecting the lower electrode 100 to the TFT 72 is formed.
- the lower electrode 100 connected to the TFT 72 is formed for each pixel.
- the lower electrode 100 is made of a transparent conductive material such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide), or a metal such as Ag or Al.
- ribs 112 for separating pixels are arranged.
- ribs 112 are formed at the pixel boundaries, and the organic material layer 102 and the upper electrode 104 are laminated in an effective area of the pixel surrounded by the ribs 112 (an area where the lower electrode 100 is exposed).
- the rib 112 is formed of an organic insulating material such as a resin material.
- the upper electrode 104 is made of, for example, a transparent conductive material such as ITO or IZO, or an extremely thin alloy of Mg and Ag.
- a sealing layer 106 is disposed on the upper electrode 104 so as to cover the entire display region 42.
- the sealing layer 106 has a laminated structure including the first sealing film 161, the sealing planarization film 160, and the second sealing film 162 in this order.
- the first sealing film 161 and the second sealing film 162 are formed of an inorganic material (for example, the inorganic insulating material). Specifically, it is formed by forming a SiN y film by chemical vapor deposition (CVD).
- the sealing planarization film 160 is formed of an organic material (for example, a resin material such as an acrylic resin). Specifically, it is formed by applying a resin composition by an inkjet method.
- the sealing planarization film 160 is not formed on the periphery of the sealing layer 106, and the first sealing film 161 and the second sealing film 162 are in contact with each other in the frame region 44 surrounding the display region 42. The upper surface and the end of the sealing planarization film 160 are covered with the second sealing film. On the other hand, since the component is connected to the component mounting region 46, the sealing layer 106 is not disposed.
- a protective layer 108 is disposed on the sealing layer 106 so as to cover the entire display region 42.
- the protective layer 108 is formed of, for example, an organic material (for example, a resin material such as an acrylic resin). Specifically, it is formed by pattern formation using a photosensitive resin composition and application of a resin composition by an ink jet method.
- the end portions of the sealing layer 106 are cut at the position of the outer edge of the protective layer 108.
- the end portion of the protective layer 108 and the end portions of the first sealing film 161 and the second sealing film 162 are aligned in plan view.
- the protective layer 108 is, for example, a predetermined region (a predetermined region on the wiring 116) of the inorganic insulating material film (the first sealing film 161 and the second sealing film 162) formed in the manufacturing process of the display panel 40. ) Is used as a mask when removed by etching. In this embodiment, the protective layer 108 remains on the product (display panel 40) without being removed, but the protective layer 108 may be removed after etching.
- a surface film is disposed on the protective layer 108 via an adhesive layer in order to ensure the mechanical strength of the surface of the display panel 40.
- a surface film is not usually disposed.
- the display panel 40 can be manufactured by keeping the base material 70 in a flat shape.
- the display panel 40 when the display panel 40 is stored in the housing of the organic EL display device 2, the display panel 40 is outside the display region 42.
- a bending area 120 is provided, and the component mounting area 46 is arranged behind the display area 42.
- the display panel 40 is curved between the component mounting area 46 and the display area 42 so that the component is folded back to the back side of the display area 42.
- the bending region 120 it is preferable to omit or reduce at least a part of a layer formed of an inorganic insulating material (for example, the base layer 80, the interlayer insulating layer 88, the interlayer insulating film 92, and the passivation film 98). This is because a layer formed of an inorganic insulating material tends to be damaged by bending.
- the wiring 116 is arranged on the base layer 80 in the bending region 120, and the wiring 116 is covered with the resin layer 76.
- FIG. 4 and 5 are diagrams for explaining a method of manufacturing an organic EL display device according to one embodiment of the present invention, and FIG. 5 is a diagram subsequent to FIG.
- FIG. 4A is a plan view showing a part of the state (display panel intermediate body) before being cut and before etching the sealing layer 106 (sealing films 161 and 162)
- FIG. 4B is a plan view of FIG. 4A
- FIG. 4C is a diagram illustrating an example of a cross section taken along line -I
- FIG. 4C is a diagram illustrating an example of a cross section taken along line II-II in FIG. 4A.
- the display panel intermediate 40a is cut (cut) along the broken line L shown in FIG. 4, and the components are mounted, whereby the display panel 40 shown in FIG. 2 is obtained. Specifically, it is divided into individual display panels 40 (individual pieces) by cutting (cutting).
- the entire surface of the display panel intermediate 40 a is covered with the sealing films 161 and 162, and the protective layer 108 is disposed on the sealing films 161 and 162.
- the protective layer 108 is disposed so as to cover the display region 42 and its peripheral region, and is used for removing a portion (peripheral portion 122) of the sealing films 161 and 162 that does not overlap with the protective layer 108.
- An extraction electrode region 124 is formed in the component mounting region 46. As shown in FIG. 4B, in the extraction electrode region 124, the wiring 116 disposed on the base layer 80 is directly covered with the sealing film 161 and is in contact with the sealing film 161. In the illustrated example, the periphery of the wiring 116 is covered from the upper surface to the side surface by the resin layer 76 to prevent the edges from being exposed from the sealing films 161 and 162.
- the wiring (extraction electrode) 116 may be a single layer body or a multilayer body including a plurality of layers, but in the example illustrated in FIG. 4B, the wiring (extraction electrode) 116 has a multilayer structure including a plurality of layers. Yes. Specifically, it includes an electrode layer 116b and surface protective layers 116a and 116c disposed on both sides (thickness direction) of the electrode layer 116b. The surface protective layers 116a and 116c serve to prevent corrosion of the electrode layer 116b, for example.
- the thickness of the electrode layer 116b is, for example, 200 nm to 800 nm.
- the thicknesses of the surface protective layers 116a and 116c are, for example, 10 nm to 100 nm.
- the electrode layer 116b is formed of a metal such as Al, for example.
- the surface protective layers 116a and 116c are formed of a metal such as Ti or Mo, for example.
- Specific examples of the wiring 116 include a Ti / Al / Ti laminate and a Mo / Al / Mo laminate.
- the display panel intermediate 40a is provided with a metal layer 118 (a dummy wiring that is not energized) in a region surrounded by the cut line L (for example, a region that is not left in the product).
- the metal layer 118 is disposed so as to surround the extraction electrode region 124. By disposing so as to surround, the disappearance of the wiring 116 described later can be effectively suppressed. From the same viewpoint, the metal layer 118 is preferably disposed in the vicinity of the extraction electrode region 124.
- the metal layer 118 is disposed on the base layer 80, and the surface thereof is directly covered with the sealing film 161 and is in contact with the sealing film 161. In the illustrated example, the peripheral edge of the metal layer 118 is covered from the upper surface to the side surface by the resin layer 76, thereby preventing the edges from being exposed from the sealing films 161 and 162.
- the metal layer 118 can include any suitable metal.
- the metal layer 118 may be a single layer or a stacked body including a plurality of layers.
- the metal layer 118 is a single-layer body containing a metal (for example, the same structure as the surface protective layer 116c of the wiring (extraction electrode) 116).
- the metal layer 118 has the same configuration as that of the wiring (extraction electrode) 116 shown in FIG. 4B from the viewpoint of manufacturing efficiency (since the metal-containing layer is often patterned at once). .
- FIG. 5A is a plan view showing a state after the peripheral portion 122 of the sealing films 161 and 162 is removed
- FIG. 5B is a diagram showing an example of the II cross section of FIG. 5A
- FIG. It is a figure which shows an example of the II-II cross section.
- the peripheral portion 122 is removed by etching (for example, dry etching) using the protective layer 108 as a mask, and the two sealing films 161 and 162 are positioned at the outer edge of the protective layer 108 as shown in FIG. It is cut at.
- the surface of the wiring 116 is exposed and the surface of the metal layer 118 is exposed in the extraction electrode region 124 by removing the peripheral portion 122 of the sealing films 161 and 162 (leading out terminals).
- the peripheral portion 122 of the sealing films 161 and 162 is formed without losing the adjacent wiring 116 as shown in FIG. 5B. It can be removed well.
- the lower wiring 116 when the removal of the peripheral portion 122 that is an inorganic insulating material film proceeds by etching, the lower wiring 116 also begins to be etched, but the presence of the metal layer 118 increases the area of the layer containing metal, It is possible to delay the disappearance of the wiring 116 formed of metal (lower the etching rate). As a result, the disappearance of the wiring 116 can be suppressed while the peripheral portion 122 is sufficiently removed. As illustrated, in the case where the wiring 116 includes the surface protective layer 116c that protects the surface of the electrode layer 116b, it is possible to prevent the thin surface protective layer 116c from completely disappearing.
- the area of the metal layer 118 / the surface area of the peripheral portion 122 (before etching) is preferably set to 1/50 or more. It should be noted that the etching rate can be lowered by increasing the existence region of the etching target object and decreasing the number of reactive species per unit area (ion, gas, radical, etc.) and delaying the removal of the product by etching. Conceivable.
- the metal included in the wiring 116 (the outermost surface layer 116c of the wiring 116) is included in the metal layer 118 (eg, the outermost surface layer of the metal layer 118).
- the configuration is the same as that of the surface protective layer 116c of the wiring (lead electrode) 116, and a dummy surface protective layer is formed.
- the progress of etching of the wiring 116 can be monitored. For example, it can be monitored by measuring the intensity change of the plasma emission spectrum of the gas during etching.
- FIG. 6A shows a change in plasma emission intensity (EPD waveform) when etching is performed without providing the metal layer 118.
- FIG. 7 is a schematic plan view showing a modification of the display panel of the organic EL display device shown in FIG. 1, and FIG. 8A is an enlarged plan view of an example of a region A surrounded by a broken line in FIG.
- FIG. 8B is an enlarged plan view of another example of a region A surrounded by a broken line in FIG.
- the metal layer 118 (the dummy wiring that is not energized) is not removed by cutting and remains in the product (display panel 40).
- the metal layer 118 has a bent shape in the bending region 120 in order to correspond to bending (deformation stress) when the display panel 40 is bent.
- the bent shape for example, a waveform shape as shown in FIG. 8A or a lattice / mesh type as shown in FIG. 8B is adopted.
- the wiring 116 may also have a bent shape.
- the present invention is not limited to the above embodiment, and various modifications are possible.
- it can be replaced with a configuration that is substantially the same as the configuration shown in the above embodiment, a configuration that exhibits the same operational effects, or a configuration that can achieve the same purpose.
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- Electroluminescent Light Sources (AREA)
Abstract
The present invention minimizes defects resulting from etching in a method for producing an organic EL display device. This method for producing an organic EL display device includes the following in this order: an inorganic insulating material film is formed so as to cover a substrate on which a display area provided with a plurality of pixels and a component mounting area on which components are mounted are positioned, said substrate being provided with a non-energized metal layer and wiring arranged from the display area to the component mounting area; a protective layer is formed on the inorganic insulating material film positioned on the display area; and the inorganic insulating material film in an area not covered by the protective layer is removed by dry etching and part of the wiring is exposed. When exposing the wiring, at least part of the metal layer is also exposed.
Description
本発明は、有機EL表示装置および有機EL表示装置の製造方法に関する。
The present invention relates to an organic EL display device and a method for manufacturing the organic EL display device.
近年、有機発光ダイオード(OLED:Organic Light Emitting Diode)と呼ばれる自発光体を用いた画像表示装置(以下、「有機EL(Electro-luminescent)表示装置」という。)が実用化されている。有機EL表示装置は、例えば、液晶表示装置と比較して、自発光体を用いているため、視認性、応答速度の点で優れているだけでなく、バックライトのような照明装置を要しないため、薄型化が可能となっている。
Recently, an image display device using a self-luminous body called an organic light emitting diode (OLED: Organic Light Emitting Diode) (hereinafter referred to as an “organic EL (Electro-luminescent) display device”) has been put into practical use. For example, since the organic EL display device uses a self-luminous body as compared with a liquid crystal display device, it is not only excellent in terms of visibility and response speed, but also does not require a lighting device such as a backlight. Therefore, it is possible to reduce the thickness.
有機EL表示装置は、基材上に薄膜トランジスタ(TFT)や有機発光ダイオード(OLED)などが形成された表示パネルを備える。このような有機EL表示装置において、発光素子を水分等から保護するため、発光素子含む表示領域を封止する方法が採用されている。封止方法としては、例えば、下記特許文献1に開示されるように、無機材料膜と樹脂材料層とを組み合わせる方法が用いられている。
The organic EL display device includes a display panel in which a thin film transistor (TFT), an organic light emitting diode (OLED), and the like are formed on a base material. In such an organic EL display device, a method of sealing a display region including the light emitting element is employed in order to protect the light emitting element from moisture and the like. As a sealing method, for example, as disclosed in Patent Document 1 below, a method of combining an inorganic material film and a resin material layer is used.
上記無機材料膜は、通常、化学気相成長(CVD)法等により成膜される。製造工程において、一旦、広範囲に無機材料膜を成膜してから、所定の領域に形成された無機材料膜をエッチングにより除去することがある。しかし、エッチングにより、無機材料膜の下側に隣接する層まで消失する場合がある。
The inorganic material film is usually formed by a chemical vapor deposition (CVD) method or the like. In the manufacturing process, an inorganic material film may be once formed over a wide area, and then the inorganic material film formed in a predetermined region may be removed by etching. However, the layer may disappear to the layer adjacent to the lower side of the inorganic material film by etching.
本発明は、上記に鑑み、エッチングによる不具合が抑制された有機EL表示装置の提供を目的とする。
In view of the above, an object of the present invention is to provide an organic EL display device in which defects due to etching are suppressed.
本発明の1つの局面によれば、表示装置の製造方法が提供される。本発明に係る表示装置の製造方法は、複数の画素を備える表示領域と部品が実装される部品実装領域とが位置し、前記表示領域から前記部品実装領域にわたって配置される配線と通電されない金属層とが設けられた基材を覆うように無機絶縁材料膜を形成すること、前記表示領域に位置する無機絶縁材料膜上に保護層を形成すること、前記保護層で覆われていない領域の無機絶縁材料膜をドライエッチングにより除去して前記配線の一部を露出させること、をこの順で含み、前記配線を露出させる際に、前記金属層の少なくとも一部も露出させる。
According to one aspect of the present invention, a method for manufacturing a display device is provided. In the method for manufacturing a display device according to the present invention, a display region having a plurality of pixels and a component mounting region on which a component is mounted are positioned, and a metal layer that is not energized with wiring arranged from the display region to the component mounting region Forming an inorganic insulating material film so as to cover the substrate provided with, forming a protective layer on the inorganic insulating material film located in the display region, and inorganic in a region not covered with the protective layer In this order, the insulating material film is removed by dry etching to expose a part of the wiring, and at the time of exposing the wiring, at least a part of the metal layer is also exposed.
本発明の別の局面によれば、表示装置が提供される。本発明に係る表示装置は、複数の画素を備える表示領域と、部品が実装される部品実装領域とを有する基材と、前記基材の前記表示領域を覆い、無機絶縁材料で形成された封止膜と、前記基材の前記表示領域から前記部品実装領域にわたって配置される配線と、前記基材に形成され、通電されない金属層と、を有し、前記配線および前記金属層は、それぞれ、前記封止膜に覆われていない部分を有している。
According to another aspect of the present invention, a display device is provided. A display device according to the present invention includes a base material having a display region having a plurality of pixels and a component mounting region on which a component is mounted, and a sealing member that covers the display region of the base material and is formed of an inorganic insulating material. A stop film, a wiring arranged from the display area of the base material to the component mounting area, a metal layer formed on the base material and not energized, and the wiring and the metal layer, A portion not covered with the sealing film is included.
以下、本発明の実施形態について、図面を参照しつつ説明する。なお、開示はあくまで一例に過ぎず、当業者において、発明の主旨を保っての適宜変更について容易に想到し得るものについては、当然に本発明の範囲に含有されるものである。また、図面は、説明をより明確にするため、実際の態様に比べ、各部の幅、厚さ、形状等について模式的に評される場合があるが、あくまで一例であって、本発明の解釈を限定するものではない。また、本明細書と各図において、既出の図に関して前述したものと同様の要素には、同一の符号を付して詳細な説明を適宜省略することがある。
Hereinafter, embodiments of the present invention will be described with reference to the drawings. It should be noted that the disclosure is merely an example, and those skilled in the art can easily conceive of appropriate changes while maintaining the gist of the invention are naturally included in the scope of the present invention. In addition, the drawings may be schematically evaluated with respect to the width, thickness, shape, and the like of each part as compared with actual embodiments for clarity of explanation, but are merely examples, and are interpreted as the interpretation of the present invention. It is not intended to limit. In addition, in the present specification and each drawing, elements similar to those described above with reference to the previous drawings may be denoted by the same reference numerals and detailed description thereof may be omitted as appropriate.
さらに、本発明の詳細な説明において、ある構成物と他の構成物の位置関係を規定する際、「上に」「下に」とは、ある構成物の直上あるいは直下に位置する場合のみでなく、特に断りの無い限りは、間にさらに他の構成物を介在する場合を含むものとする。
Further, in the detailed description of the present invention, when the positional relationship between a certain component and another component is defined, “up” and “down” are used only when the component is positioned directly above or directly below a certain component. Unless otherwise specified, the case where another component is further interposed is included.
図1は、本発明の1つの実施形態に係る表示装置の概略の構成を、有機EL表示装置を例にして示す模式図である。有機EL表示装置2は、画像を表示する画素アレイ部4と、画素アレイ部4を駆動する駆動部とを備える。有機EL表示装置2は、基材として樹脂フィルムを用いたフレキシブルディスプレイであり、この樹脂フィルムで構成された基材の上に薄膜トランジスタ(TFT)や有機発光ダイオード(OLED)などの積層構造が形成される。なお、図1に示した概略図は一例であって、本実施形態はこれに限定されるものではない。
FIG. 1 is a schematic diagram showing a schematic configuration of a display device according to an embodiment of the present invention, using an organic EL display device as an example. The organic EL display device 2 includes a pixel array unit 4 that displays an image and a drive unit that drives the pixel array unit 4. The organic EL display device 2 is a flexible display using a resin film as a base material, and a laminated structure such as a thin film transistor (TFT) or an organic light emitting diode (OLED) is formed on the base material made of the resin film. The The schematic diagram shown in FIG. 1 is an example, and the present embodiment is not limited to this.
画素アレイ部4には、画素に対応してOLED6および画素回路8がマトリクス状に配置される。画素回路8は複数のTFT10,12やキャパシタ14で構成される。
In the pixel array unit 4, OLEDs 6 and pixel circuits 8 are arranged in a matrix corresponding to the pixels. The pixel circuit 8 includes a plurality of TFTs 10 and 12 and a capacitor 14.
上記駆動部は、走査線駆動回路20、映像線駆動回路22、駆動電源回路24および制御装置26を含み、画素回路8を駆動しOLED6の発光を制御する。
The drive unit includes a scanning line drive circuit 20, a video line drive circuit 22, a drive power supply circuit 24, and a control device 26, and drives the pixel circuit 8 to control light emission of the OLED 6.
走査線駆動回路20は、画素の水平方向の並び(画素行)ごとに設けられた走査信号線28に接続されている。走査線駆動回路20は、制御装置26から入力されるタイミング信号に応じて走査信号線28を順番に選択し、選択した走査信号線28に、点灯TFT10をオンする電圧を印加する。
The scanning line driving circuit 20 is connected to a scanning signal line 28 provided for each horizontal arrangement (pixel row) of pixels. The scanning line driving circuit 20 sequentially selects the scanning signal lines 28 according to the timing signal input from the control device 26, and applies a voltage for turning on the lighting TFT 10 to the selected scanning signal lines 28.
映像線駆動回路22は、画素の垂直方向の並び(画素列)ごとに設けられた映像信号線30に接続されている。映像線駆動回路22は、制御装置26から映像信号を入力され、走査線駆動回路20による走査信号線28の選択に合わせて、選択された画素行の映像信号に応じた電圧を各映像信号線30に出力する。当該電圧は、選択された画素行にて点灯TFT10を介してキャパシタ14に書き込まれる。駆動TFT12は、書き込まれた電圧に応じた電流をOLED6に供給し、これにより、選択された走査信号線28に対応する画素のOLED6が発光する。
The video line driving circuit 22 is connected to a video signal line 30 provided for each vertical arrangement (pixel column) of pixels. The video line driving circuit 22 receives a video signal from the control device 26, and in accordance with the selection of the scanning signal line 28 by the scanning line driving circuit 20, a voltage corresponding to the video signal of the selected pixel row is applied to each video signal line. Output to 30. The voltage is written into the capacitor 14 via the lighting TFT 10 in the selected pixel row. The driving TFT 12 supplies a current corresponding to the written voltage to the OLED 6, whereby the OLED 6 of the pixel corresponding to the selected scanning signal line 28 emits light.
駆動電源回路24は、画素列ごとに設けられた駆動電源線32に接続され、駆動電源線32および選択された画素行の駆動TFT12を介してOLED6に電流を供給する。
The drive power supply circuit 24 is connected to a drive power supply line 32 provided for each pixel column, and supplies current to the OLED 6 via the drive power supply line 32 and the drive TFT 12 of the selected pixel row.
ここで、OLED6の下部電極は、駆動TFT12に接続される。一方、各OLED6の上部電極は、全画素のOLED6に共通の電極で構成される。下部電極を陽極(アノード)として構成する場合は、高電位が入力され、上部電極は陰極(カソード)となって低電位が入力される。下部電極を陰極(カソード)として構成する場合は、低電位が入力され、上部電極は陽極(アノード)となって高電位が入力される。
Here, the lower electrode of the OLED 6 is connected to the driving TFT 12. On the other hand, the upper electrode of each OLED 6 is configured by an electrode common to the OLED 6 of all pixels. When the lower electrode is configured as an anode (anode), a high potential is input, and the upper electrode is a cathode (cathode) and a low potential is input. When the lower electrode is configured as a cathode (cathode), a low potential is input, and the upper electrode is an anode (anode) and a high potential is input.
図2は、図1に示す有機EL表示装置の表示パネルの一例を示す模式的な平面図である。表示パネル40の表示領域42に、図1に示した画素アレイ部4が設けられ、上述したように画素アレイ部4にはOLED6が配列される。上述したようにOLED6を構成する上部電極は、各画素に共通に形成され、表示領域42全体を覆う。
FIG. 2 is a schematic plan view showing an example of the display panel of the organic EL display device shown in FIG. The pixel array unit 4 shown in FIG. 1 is provided in the display area 42 of the display panel 40, and the OLEDs 6 are arranged in the pixel array unit 4 as described above. As described above, the upper electrode constituting the OLED 6 is formed in common for each pixel and covers the entire display region 42.
矩形である表示パネル40の一辺には、部品実装領域46が設けられ、表示領域42につながる配線が配置される。部品実装領域46には、駆動部を構成するドライバIC48が搭載されたり、フレキシブルプリント基板(FPC)50が接続されたりする。FPC50は、制御装置26やその他の回路20,22,24等に接続されたり、その上にICを搭載されたりする。
A component mounting area 46 is provided on one side of the rectangular display panel 40, and wiring connected to the display area 42 is arranged. In the component mounting area 46, a driver IC 48 constituting a driving unit is mounted, or a flexible printed circuit board (FPC) 50 is connected. The FPC 50 is connected to the control device 26 and other circuits 20, 22, 24, etc., and an IC is mounted thereon.
図3は、図2のIII-III断面の一例を示す図である。図3では、断面構造を見易くするため、一部の層のハッチングを省略している。
FIG. 3 is a view showing an example of a section taken along the line III-III in FIG. In FIG. 3, hatching of some layers is omitted in order to make the cross-sectional structure easy to see.
表示パネル40は、例えば、可撓性を有する基材70の上に、TFT72などが形成された回路層74、OLED6およびOLED6を封止する封止層106などが積層された構造を有する。可撓性を有する基材70は、例えば、ポリイミド系樹脂などの樹脂を含む樹脂膜で構成される。基材70の厚みは、例えば、10μm~20μmである。本実施形態においては、画素アレイ部4はトップエミッション型であり、OLED6で生じた光は、基材70側とは反対側(図3において上向き)に出射される。なお、有機EL表示装置2におけるカラー化方式をカラーフィルタ方式とする場合には、例えば、表示パネル40において封止層106の基材70側とは反対側(上側)に、または、対向基板側にカラーフィルタが配置される。このカラーフィルタに、OLED6にて生成した白色光を通すことで、例えば、赤(R)、緑(G)、青(B)の光を作る。
The display panel 40 has a structure in which, for example, a circuit layer 74 in which TFTs 72 and the like are formed, an OLED 6 and a sealing layer 106 for sealing the OLED 6 are stacked on a flexible base material 70. The flexible base material 70 is made of, for example, a resin film containing a resin such as a polyimide resin. The thickness of the base material 70 is, for example, 10 μm to 20 μm. In the present embodiment, the pixel array unit 4 is a top emission type, and light generated by the OLED 6 is emitted to the side opposite to the base material 70 side (upward in FIG. 3). When the colorization method in the organic EL display device 2 is a color filter method, for example, on the display panel 40 on the side opposite to the base material 70 side (upper side) of the sealing layer 106 or on the counter substrate side A color filter is arranged in For example, red (R), green (G), and blue (B) light is produced by passing white light generated by the OLED 6 through the color filter.
表示領域42の回路層74には、上述した画素回路8、走査信号線28、映像信号線30、駆動電源線32などが形成される。駆動部の少なくとも一部分は、基材70上に回路層74として表示領域42に隣接する領域に形成することができる。駆動部を構成するドライバIC48やFPC50の端子は、部品実装領域46にて、回路層74の配線116に、電気的に接続される。
In the circuit layer 74 of the display area 42, the pixel circuit 8, the scanning signal line 28, the video signal line 30, the drive power supply line 32, and the like are formed. At least a part of the drive unit can be formed as a circuit layer 74 on the substrate 70 in a region adjacent to the display region 42. The terminals of the driver IC 48 and the FPC 50 constituting the driving unit are electrically connected to the wiring 116 of the circuit layer 74 in the component mounting region 46.
図3に示すように、基材70上には、無機絶縁材料で形成された下地層80が配置されている。無機絶縁材料としては、例えば、窒化シリコン(SiNy)、酸化シリコン(SiOx)およびこれらの複合体が用いられる。
As shown in FIG. 3, a base layer 80 made of an inorganic insulating material is disposed on the base material 70. As the inorganic insulating material, for example, silicon nitride (SiN y ), silicon oxide (SiO x ), and a composite thereof are used.
表示領域42においては、下地層80を介して、基材70上には、トップゲート型のTFT72のチャネル部およびソース・ドレイン部となる半導体領域82が形成されている。半導体領域82は、例えば、ポリシリコン(p-Si)で形成される。半導体領域82は、例えば、基材70上に半導体層(p-Si膜)を設け、この半導体層をパターニングし、回路層74で用いる箇所を選択的に残すことにより形成される。
In the display region 42, a semiconductor region 82 serving as a channel portion and a source / drain portion of the top gate TFT 72 is formed on the base material 70 through the base layer 80. The semiconductor region 82 is made of, for example, polysilicon (p-Si). The semiconductor region 82 is formed by, for example, providing a semiconductor layer (p-Si film) on the base material 70, patterning the semiconductor layer, and selectively leaving a portion used in the circuit layer 74.
TFT72のチャネル部の上には、ゲート絶縁膜84を介してゲート電極86が配置されている。ゲート絶縁膜84は、代表的には、TEOSで形成される。ゲート電極86は、例えば、スパッタリング等で形成した金属膜をパターニングして形成される。ゲート電極86上には、ゲート電極86を覆うように層間絶縁層88が配置されている。層間絶縁層88は、例えば、上記無機絶縁材料で形成される。TFT72のソース・ドレイン部となる半導体領域82(p-Si)には、イオン注入により不純物が導入され、さらにそれらに電気的に接続されたソース電極90aおよびドレイン電極90bが形成され、TFT72が構成される。
A gate electrode 86 is disposed on the channel portion of the TFT 72 via a gate insulating film 84. The gate insulating film 84 is typically formed of TEOS. The gate electrode 86 is formed by patterning a metal film formed by sputtering or the like, for example. An interlayer insulating layer 88 is disposed on the gate electrode 86 so as to cover the gate electrode 86. The interlayer insulating layer 88 is formed of, for example, the above inorganic insulating material. Impurities are introduced into the semiconductor region 82 (p-Si) serving as the source / drain portion of the TFT 72 by ion implantation, and further, a source electrode 90a and a drain electrode 90b electrically connected thereto are formed. Is done.
TFT72上には、層間絶縁膜92が配置されている。層間絶縁膜92の表面には、配線94が配置される。配線94は、例えば、スパッタリング等で形成した金属膜をパターニングすることにより形成される。配線94を形成する金属膜と、ゲート電極86、ソース電極90aおよびドレイン電極90bの形成に用いた金属膜とで、例えば、配線116および図1に示した走査信号線28、映像信号線30、駆動電源線32を多層配線構造で形成することができる。この上に、平坦化膜96およびパッシベーション膜98が形成され、表示領域42において、パッシベーション膜98上にOLED6が形成されている。平坦化膜96は、例えば、樹脂材料等の有機絶縁材料で形成される。パッシベーション膜98は、例えば、SiNy等の無機絶縁材料で形成される。
On the TFT 72, an interlayer insulating film 92 is disposed. A wiring 94 is disposed on the surface of the interlayer insulating film 92. For example, the wiring 94 is formed by patterning a metal film formed by sputtering or the like. The metal film forming the wiring 94 and the metal film used for forming the gate electrode 86, the source electrode 90a, and the drain electrode 90b include, for example, the wiring 116 and the scanning signal line 28, the video signal line 30, and the like shown in FIG. The drive power supply line 32 can be formed with a multilayer wiring structure. A planarizing film 96 and a passivation film 98 are formed thereon, and the OLED 6 is formed on the passivation film 98 in the display region 42. The planarizing film 96 is made of, for example, an organic insulating material such as a resin material. The passivation film 98 is formed of an inorganic insulating material such as SiN y , for example.
OLED6は、下部電極100、有機材料層102および上部電極104を含む。有機材料層102は、具体的には、正孔輸送層、発光層、電子輸送層等を含む。OLED6は、代表的には、下部電極100、有機材料層102および上部電極104を基材70側からこの順に積層して形成される。本実施形態では、下部電極100がOLED6の陽極(アノード)であり、上部電極104が陰極(カソード)である。
The OLED 6 includes a lower electrode 100, an organic material layer 102, and an upper electrode 104. Specifically, the organic material layer 102 includes a hole transport layer, a light emitting layer, an electron transport layer, and the like. The OLED 6 is typically formed by laminating the lower electrode 100, the organic material layer 102, and the upper electrode 104 in this order from the base material 70 side. In the present embodiment, the lower electrode 100 is the anode (anode) of the OLED 6 and the upper electrode 104 is the cathode (cathode).
図3に示すTFT72が、nチャネルを有した駆動TFT12であるとすると、下部電極100は、TFT72のソース電極90aに接続される。具体的には、上述した平坦化膜96の形成後、下部電極100をTFT72に接続するためのコンタクトホール110が形成され、例えば、平坦化膜96表面およびコンタクトホール110内に形成した導電体部をパターニングすることにより、TFT72に接続された下部電極100が画素ごとに形成される。下部電極100は、例えば、ITO(Indium Tin Oxide)、IZO(Indium Zinc Oxide)等の透過性導電材料、Ag、Al等の金属で形成される。
3 is a driving TFT 12 having an n channel, the lower electrode 100 is connected to the source electrode 90a of the TFT 72. Specifically, after the above-described planarization film 96 is formed, a contact hole 110 for connecting the lower electrode 100 to the TFT 72 is formed. For example, the surface of the planarization film 96 and the conductor portion formed in the contact hole 110. By patterning, the lower electrode 100 connected to the TFT 72 is formed for each pixel. The lower electrode 100 is made of a transparent conductive material such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide), or a metal such as Ag or Al.
上記構造上には、画素を分離するリブ112が配置されている。例えば、下部電極100の形成後、画素境界にリブ112を形成し、リブ112で囲まれた画素の有効領域(下部電極100の露出する領域)に、有機材料層102および上部電極104が積層される。リブ112は、樹脂材料等の有機絶縁材料で形成される。上部電極104は、例えば、ITO、IZO等の透過性導電材料やMgとAgの極薄合金で構成される。
On the above structure, ribs 112 for separating pixels are arranged. For example, after the formation of the lower electrode 100, ribs 112 are formed at the pixel boundaries, and the organic material layer 102 and the upper electrode 104 are laminated in an effective area of the pixel surrounded by the ribs 112 (an area where the lower electrode 100 is exposed). The The rib 112 is formed of an organic insulating material such as a resin material. The upper electrode 104 is made of, for example, a transparent conductive material such as ITO or IZO, or an extremely thin alloy of Mg and Ag.
上部電極104上には、表示領域42全体を覆うように封止層106が配置されている。封止層106は、第1封止膜161、封止平坦化膜160および第2封止膜162をこの順で含む積層構造を有している。第1封止膜161および第2封止膜162は、無機材料(例えば、上記無機絶縁材料)で形成される。具体的には、化学気相成長(CVD)法によりSiNy膜を成膜することにより形成される。封止平坦化膜160は、有機材料(例えば、アクリル系樹脂等の樹脂材料)で形成される。具体的には、インクジェット方式による樹脂組成物の塗布により形成される。封止層106の周縁には封止平坦化膜160は形成されておらず、表示領域42を囲む額縁領域44において、第1封止膜161と第2封止膜162とが接している。封止平坦化膜160はその上面および端部が第2封止膜で覆われている。一方、部品実装領域46には、部品が接続されるため、封止層106は配置されていない。
A sealing layer 106 is disposed on the upper electrode 104 so as to cover the entire display region 42. The sealing layer 106 has a laminated structure including the first sealing film 161, the sealing planarization film 160, and the second sealing film 162 in this order. The first sealing film 161 and the second sealing film 162 are formed of an inorganic material (for example, the inorganic insulating material). Specifically, it is formed by forming a SiN y film by chemical vapor deposition (CVD). The sealing planarization film 160 is formed of an organic material (for example, a resin material such as an acrylic resin). Specifically, it is formed by applying a resin composition by an inkjet method. The sealing planarization film 160 is not formed on the periphery of the sealing layer 106, and the first sealing film 161 and the second sealing film 162 are in contact with each other in the frame region 44 surrounding the display region 42. The upper surface and the end of the sealing planarization film 160 are covered with the second sealing film. On the other hand, since the component is connected to the component mounting region 46, the sealing layer 106 is not disposed.
封止層106上には、表示領域42全体を覆うように保護層108が配置されている。保護層108は、例えば、有機材料(例えば、アクリル系樹脂等の樹脂材料)で形成される。具体的には、感光性樹脂組成物を用いたパターン形成、インクジェット方式による樹脂組成物の塗布により形成する。表示領域42を囲む額縁領域44において、封止層106の端部(第1封止膜161および第2封止膜162の端部)は、保護層108の外縁の位置で切断されている。具体的には、平面視で、保護層108の端部と第1封止膜161および第2封止膜162の端部とが揃っている。保護層108は、例えば、表示パネル40の製造工程において、成膜された無機絶縁材料膜(第1封止膜161および第2封止膜162)の所定の領域(配線116上の所定の領域)をエッチングにより除去する際のマスクとして用いられる。本実施形態では、保護層108は、除去せずにそのまま製品(表示パネル40)に残っているが、エッチング後に、保護層108を除去してもよい。
A protective layer 108 is disposed on the sealing layer 106 so as to cover the entire display region 42. The protective layer 108 is formed of, for example, an organic material (for example, a resin material such as an acrylic resin). Specifically, it is formed by pattern formation using a photosensitive resin composition and application of a resin composition by an ink jet method. In the frame region 44 surrounding the display region 42, the end portions of the sealing layer 106 (end portions of the first sealing film 161 and the second sealing film 162) are cut at the position of the outer edge of the protective layer 108. Specifically, the end portion of the protective layer 108 and the end portions of the first sealing film 161 and the second sealing film 162 are aligned in plan view. The protective layer 108 is, for example, a predetermined region (a predetermined region on the wiring 116) of the inorganic insulating material film (the first sealing film 161 and the second sealing film 162) formed in the manufacturing process of the display panel 40. ) Is used as a mask when removed by etching. In this embodiment, the protective layer 108 remains on the product (display panel 40) without being removed, but the protective layer 108 may be removed after etching.
図示しないが、例えば、表示パネル40の表面の機械的な強度を確保するため、保護層108上には接着層を介して表面フィルムが配置される。一方、部品実装領域46には、部品が接続されるため、通常、表面フィルムは配置されない。なお、表面フィルムを上記エッチングの際のマスクとして用いてもよい。
Although not shown, for example, a surface film is disposed on the protective layer 108 via an adhesive layer in order to ensure the mechanical strength of the surface of the display panel 40. On the other hand, since components are connected to the component mounting region 46, a surface film is not usually disposed. In addition, you may use a surface film as a mask in the case of the said etching.
表示パネル40は、図3に示すように、基材70を平面状に保って製造され得るが、例えば、有機EL表示装置2の筐体に格納される際には、表示領域42の外側に曲げ領域120を設けて、部品実装領域46を表示領域42の裏側に配置させる。具体的には、部品実装領域46と表示領域42との間で表示パネル40を湾曲させて、部品を表示領域42の裏側に折り返した状態とする。
As shown in FIG. 3, the display panel 40 can be manufactured by keeping the base material 70 in a flat shape. For example, when the display panel 40 is stored in the housing of the organic EL display device 2, the display panel 40 is outside the display region 42. A bending area 120 is provided, and the component mounting area 46 is arranged behind the display area 42. Specifically, the display panel 40 is curved between the component mounting area 46 and the display area 42 so that the component is folded back to the back side of the display area 42.
曲げ領域120においては、無機絶縁材料で形成される層(例えば、下地層80、層間絶縁層88、層間絶縁膜92、パッシベーション膜98)の少なくとも一部を、省略または薄膜化することが好ましい。無機絶縁材料で形成される層は、曲げにより破損しやすい傾向にあるからである。図示例では、曲げ領域120において、下地層80上に配線116が配置され、配線116は樹脂層76で覆われている。
In the bending region 120, it is preferable to omit or reduce at least a part of a layer formed of an inorganic insulating material (for example, the base layer 80, the interlayer insulating layer 88, the interlayer insulating film 92, and the passivation film 98). This is because a layer formed of an inorganic insulating material tends to be damaged by bending. In the illustrated example, the wiring 116 is arranged on the base layer 80 in the bending region 120, and the wiring 116 is covered with the resin layer 76.
図4および図5は、本発明の1つの実施形態における有機EL表示装置の製造方法について説明するための図であり、図5は図4に続く図である。
4 and 5 are diagrams for explaining a method of manufacturing an organic EL display device according to one embodiment of the present invention, and FIG. 5 is a diagram subsequent to FIG.
図4Aは封止層106(封止膜161,162)をエッチングする前で、切断される前の状態(表示パネル中間体)の一部を示す平面図であり、図4Bは図4AのI-I断面の一例を示す図であり、図4Cは図4AのII-II断面の一例を示す図である。具体的には、図4に示す破線Lに沿って表示パネル中間体40aはカット(切断)され、部品が実装され、図2に示す表示パネル40が得られる。具体的には、カット(切断)により、個々の表示パネル40(個片)に分割される。
4A is a plan view showing a part of the state (display panel intermediate body) before being cut and before etching the sealing layer 106 (sealing films 161 and 162), and FIG. 4B is a plan view of FIG. 4A. FIG. 4C is a diagram illustrating an example of a cross section taken along line -I, and FIG. 4C is a diagram illustrating an example of a cross section taken along line II-II in FIG. 4A. Specifically, the display panel intermediate 40a is cut (cut) along the broken line L shown in FIG. 4, and the components are mounted, whereby the display panel 40 shown in FIG. 2 is obtained. Specifically, it is divided into individual display panels 40 (individual pieces) by cutting (cutting).
表示パネル中間体40aの表面全体は封止膜161,162で覆われ、封止膜161,162上に保護層108が配置されている。保護層108は、表示領域42およびその周辺領域を覆うように配置され、封止膜161,162の保護層108と重ならない部分(周辺部122)の除去に利用される。部品実装領域46には引出電極領域124が形成されている。図4Bに示すように、引出電極領域124では、下地層80上に配置された配線116が、封止膜161に直接覆われて封止膜161と接している。図示例では、樹脂層76で、配線116の周縁が上面からから側面にかけて覆われており、封止膜161,162からエッジが露出するのを防止している。
The entire surface of the display panel intermediate 40 a is covered with the sealing films 161 and 162, and the protective layer 108 is disposed on the sealing films 161 and 162. The protective layer 108 is disposed so as to cover the display region 42 and its peripheral region, and is used for removing a portion (peripheral portion 122) of the sealing films 161 and 162 that does not overlap with the protective layer 108. An extraction electrode region 124 is formed in the component mounting region 46. As shown in FIG. 4B, in the extraction electrode region 124, the wiring 116 disposed on the base layer 80 is directly covered with the sealing film 161 and is in contact with the sealing film 161. In the illustrated example, the periphery of the wiring 116 is covered from the upper surface to the side surface by the resin layer 76 to prevent the edges from being exposed from the sealing films 161 and 162.
配線(引出電極)116は、単層体であってもよいし、複数の層を含む積層体であってもよいが、図4Bに示す例では、複数の層を含む積層構造を有している。具体的には、電極層116bと、電極層116bの両側(厚み方向)に配置された表面保護層116a,116cとを有している。表面保護層116a,116cは、例えば、電極層116bの腐食を防止する役割を担う。電極層116bの厚みは、例えば、200nm~800nmである。表面保護層116a,116cの厚みは、例えば、10nm~100nmである。電極層116bは、例えば、Al等の金属で形成される。表面保護層116a,116cは、例えば、Ti、Mo等の金属で形成される。配線116の具体例としては、Ti/Al/Tiの積層体、Mo/Al/Moの積層体が挙げられる。
The wiring (extraction electrode) 116 may be a single layer body or a multilayer body including a plurality of layers, but in the example illustrated in FIG. 4B, the wiring (extraction electrode) 116 has a multilayer structure including a plurality of layers. Yes. Specifically, it includes an electrode layer 116b and surface protective layers 116a and 116c disposed on both sides (thickness direction) of the electrode layer 116b. The surface protective layers 116a and 116c serve to prevent corrosion of the electrode layer 116b, for example. The thickness of the electrode layer 116b is, for example, 200 nm to 800 nm. The thicknesses of the surface protective layers 116a and 116c are, for example, 10 nm to 100 nm. The electrode layer 116b is formed of a metal such as Al, for example. The surface protective layers 116a and 116c are formed of a metal such as Ti or Mo, for example. Specific examples of the wiring 116 include a Ti / Al / Ti laminate and a Mo / Al / Mo laminate.
表示パネル中間体40aには、カットラインLに囲まれる領域(例えば、製品には残らず廃棄される領域)に、金属層118(通電されないダミー配線)が設けられている。金属層118は、引出電極領域124を囲むように配置されている。囲むように配置することにより、後述の配線116の消失を効果的に抑制し得る。同様の観点から、金属層118は、引出電極領域124近傍に配置されることが好ましい。金属層118は、下地層80上に配置され、その表面は封止膜161に直接覆われて封止膜161と接している。図示例では、樹脂層76で、金属層118の周縁が上面からから側面にかけて覆われており、封止膜161,162からエッジが露出するのを防止している。
The display panel intermediate 40a is provided with a metal layer 118 (a dummy wiring that is not energized) in a region surrounded by the cut line L (for example, a region that is not left in the product). The metal layer 118 is disposed so as to surround the extraction electrode region 124. By disposing so as to surround, the disappearance of the wiring 116 described later can be effectively suppressed. From the same viewpoint, the metal layer 118 is preferably disposed in the vicinity of the extraction electrode region 124. The metal layer 118 is disposed on the base layer 80, and the surface thereof is directly covered with the sealing film 161 and is in contact with the sealing film 161. In the illustrated example, the peripheral edge of the metal layer 118 is covered from the upper surface to the side surface by the resin layer 76, thereby preventing the edges from being exposed from the sealing films 161 and 162.
金属層118は、任意の適切な金属を含み得る。また、金属層118は、単層体であってもよいし、複数の層を含む積層体であってもよい。図4Cに示す例では、金属層118は、金属を含む単層体(例えば、配線(引出電極)116の表面保護層116cと同様の構成)とされている。別の実施形態では、製造効率の観点から(金属含有層を一括してパターン形成する場合が多いので)、金属層118は、図4Bに示す配線(引出電極)116と同様の構成とされる。
The metal layer 118 can include any suitable metal. In addition, the metal layer 118 may be a single layer or a stacked body including a plurality of layers. In the example shown in FIG. 4C, the metal layer 118 is a single-layer body containing a metal (for example, the same structure as the surface protective layer 116c of the wiring (extraction electrode) 116). In another embodiment, the metal layer 118 has the same configuration as that of the wiring (extraction electrode) 116 shown in FIG. 4B from the viewpoint of manufacturing efficiency (since the metal-containing layer is often patterned at once). .
図5Aは、封止膜161,162の周辺部122を除去した後の状態を示す平面図であり、図5Bは図5AのI-I断面の一例を示す図であり、図5Cは図5AのII-II断面の一例を示す図である。周辺部122の除去は、保護層108をマスクとして、エッチング(例えば、ドライエッチング)により行われ、2層の封止膜161,162は、図3に示すように、保護層108の外縁の位置で切断される。
FIG. 5A is a plan view showing a state after the peripheral portion 122 of the sealing films 161 and 162 is removed, FIG. 5B is a diagram showing an example of the II cross section of FIG. 5A, and FIG. It is a figure which shows an example of the II-II cross section. The peripheral portion 122 is removed by etching (for example, dry etching) using the protective layer 108 as a mask, and the two sealing films 161 and 162 are positioned at the outer edge of the protective layer 108 as shown in FIG. It is cut at.
封止膜161,162の周辺部122の除去(端子出し)により、引出電極領域124において、配線116表面は露出し、金属層118表面も露出している。封止膜161,162の周辺部122に覆われた金属層118を設けることにより、図5Bに示すように、隣接する配線116を消失させることなく、封止膜161,162の周辺部122を良好に除去し得る。具体的には、エッチングにより無機絶縁材料膜である周辺部122の除去が進むと下層の配線116もエッチングされ始めるが、金属層118を存在させることにより、金属を含む層の面積が増えて、金属で形成される配線116の消失を遅らせる(エッチングレートを低くする)ことがでる。その結果、周辺部122の除去を十分に行いながら、配線116の消失を抑制し得る。図示するように、配線116が電極層116bの表面を保護する表面保護層116cを有する場合は、厚みの薄い表面保護層116cが完全に消失することを防止することができる。エッチングの条件にもよるが、例えば、金属層118の面積/周辺部122の表面積(エッチング前)が1/50以上に設定することが好ましい。なお、エッチングレートは、エッチング対象物の存在領域が大きくなる程、単位面積当たりの反応種(イオン、ガス、ラジカル等)が少なくなって、エッチングによる生成物の除去が滞ることにより、下がり得ると考えられる。
The surface of the wiring 116 is exposed and the surface of the metal layer 118 is exposed in the extraction electrode region 124 by removing the peripheral portion 122 of the sealing films 161 and 162 (leading out terminals). By providing the metal layer 118 covered with the peripheral portion 122 of the sealing films 161 and 162, the peripheral portion 122 of the sealing films 161 and 162 is formed without losing the adjacent wiring 116 as shown in FIG. 5B. It can be removed well. Specifically, when the removal of the peripheral portion 122 that is an inorganic insulating material film proceeds by etching, the lower wiring 116 also begins to be etched, but the presence of the metal layer 118 increases the area of the layer containing metal, It is possible to delay the disappearance of the wiring 116 formed of metal (lower the etching rate). As a result, the disappearance of the wiring 116 can be suppressed while the peripheral portion 122 is sufficiently removed. As illustrated, in the case where the wiring 116 includes the surface protective layer 116c that protects the surface of the electrode layer 116b, it is possible to prevent the thin surface protective layer 116c from completely disappearing. Depending on the etching conditions, for example, the area of the metal layer 118 / the surface area of the peripheral portion 122 (before etching) is preferably set to 1/50 or more. It should be noted that the etching rate can be lowered by increasing the existence region of the etching target object and decreasing the number of reactive species per unit area (ion, gas, radical, etc.) and delaying the removal of the product by etching. Conceivable.
1つの実施形態においては、金属層118(例えば、金属層118の最表面層)に、配線116(配線116の最表面層116c)に含まれる金属が含まれる。具体例としては、配線(引出電極)116の表面保護層116cと同様の構成とされ、ダミー表面保護層とされる。このような構成によれば、配線116のエッチングの進行状況をモニターすることができる。例えば、エッチング時のガスのプラズマ発光スペクトルの強度変化を測定することによりモニターすることができる。図6Aに、金属層118を設けないでエッチングした場合のプラズマ発光強度の変化(EPD波形)を示すが、周辺部122(SiNy膜)に起因するプラズマ発光しか検知されず、配線116(Tiを含有する表面保護層)に起因するプラズマ発光は検知できない。これは、周辺部122に対して配線116(引出電極)の面積が小さ過ぎることが要因であると考えられる。一方、図4Aおよび図4Cに示すように、金属層(Ti含有層)118を設けてエッチングした場合のプラズマ発光強度の変化(EPD波形)は、図6Bに示すとおり、配線116および金属層118に起因すると考えられるプラズマ発光が検知される。例えば、図6BのタイミングTにおいてエッチングを終了させれば、周辺部122の除去を十分に行いながら、配線116の消失を十分に抑制し得る。なお、周辺部122の除去(エッチング)は、パネル面内のバラツキを考慮して、過剰に行うことが望まれる。
In one embodiment, the metal included in the wiring 116 (the outermost surface layer 116c of the wiring 116) is included in the metal layer 118 (eg, the outermost surface layer of the metal layer 118). As a specific example, the configuration is the same as that of the surface protective layer 116c of the wiring (lead electrode) 116, and a dummy surface protective layer is formed. According to such a configuration, the progress of etching of the wiring 116 can be monitored. For example, it can be monitored by measuring the intensity change of the plasma emission spectrum of the gas during etching. FIG. 6A shows a change in plasma emission intensity (EPD waveform) when etching is performed without providing the metal layer 118. Only plasma emission due to the peripheral portion 122 (SiN y film) is detected, and the wiring 116 (TiN The plasma emission due to the surface protective layer containing) cannot be detected. It is considered that this is because the area of the wiring 116 (extraction electrode) is too small with respect to the peripheral portion 122. On the other hand, as shown in FIG. 4A and FIG. 4C, the change in plasma emission intensity (EPD waveform) when the metal layer (Ti-containing layer) 118 is provided and etched is shown in FIG. Plasma emission considered to be caused by is detected. For example, if the etching is terminated at the timing T in FIG. 6B, the disappearance of the wiring 116 can be sufficiently suppressed while the peripheral portion 122 is sufficiently removed. The removal (etching) of the peripheral portion 122 is desirably performed excessively in consideration of variations in the panel surface.
図7は、図1に示す有機EL表示装置の表示パネルの変形例を示す模式的な平面図であり、図8Aは、図7の破線で囲んだ領域Aの一例の拡大平面図であり、図8Bは、図7の破線で囲んだ領域Aの別の例の拡大平面図である。本変形例では、金属層118(通電されないダミー配線)が切断により除去されずに、製品(表示パネル40)に残っている点が、上記実施形態と異なる。本変形例では、表示パネル40を曲げた際の曲げ(変形応力)に対応させ得るため、曲げ領域120において、金属層118は、屈曲形状を有している。屈曲形状は、例えば、図8Aに示すような波形形状や、図8Bに示すような格子・メッシュ型などが採用される。なお、曲げ領域120において、配線116も屈曲形状を有し得る。
7 is a schematic plan view showing a modification of the display panel of the organic EL display device shown in FIG. 1, and FIG. 8A is an enlarged plan view of an example of a region A surrounded by a broken line in FIG. FIG. 8B is an enlarged plan view of another example of a region A surrounded by a broken line in FIG. This modification is different from the above embodiment in that the metal layer 118 (the dummy wiring that is not energized) is not removed by cutting and remains in the product (display panel 40). In the present modification, the metal layer 118 has a bent shape in the bending region 120 in order to correspond to bending (deformation stress) when the display panel 40 is bent. As the bent shape, for example, a waveform shape as shown in FIG. 8A or a lattice / mesh type as shown in FIG. 8B is adopted. Note that in the bending region 120, the wiring 116 may also have a bent shape.
本発明は、上記実施形態に限定されるものではなく、種々の変形が可能である。例えば、上記実施形態で示した構成と実質的に同一の構成、同一の作用効果を奏する構成または同一の目的を達成することができる構成で置き換えることができる。
The present invention is not limited to the above embodiment, and various modifications are possible. For example, it can be replaced with a configuration that is substantially the same as the configuration shown in the above embodiment, a configuration that exhibits the same operational effects, or a configuration that can achieve the same purpose.
本発明の思想の範疇において、当業者であれば、各種の変更例および修正例に想到し得るものであり、それら変更例および修正例についても本発明の範囲に属するものと了解される。例えば、前述の各実施形態に対して、当業者が適宜、構成要素の追加、削除もしくは設計変更を行ったもの、または、工程の追加、省略もしくは条件変更を行ったものも、本発明の要旨を備えている限り、本発明の範囲に含まれる。
In the scope of the idea of the present invention, those skilled in the art can conceive various changes and modifications, and it is understood that these changes and modifications also belong to the scope of the present invention. For example, those in which the person skilled in the art has appropriately added, deleted, or changed the design of the above-described embodiments, or those in which processes have been added, omitted, or changed conditions are also included in the gist of the present invention. As long as it is provided, it is included in the scope of the present invention.
In the scope of the idea of the present invention, those skilled in the art can conceive various changes and modifications, and it is understood that these changes and modifications also belong to the scope of the present invention. For example, those in which the person skilled in the art has appropriately added, deleted, or changed the design of the above-described embodiments, or those in which processes have been added, omitted, or changed conditions are also included in the gist of the present invention. As long as it is provided, it is included in the scope of the present invention.
Claims (12)
- 複数の画素を備える表示領域と部品が実装される部品実装領域とが位置し、前記表示領域から前記部品実装領域にわたって配置される配線と通電されない金属層とが設けられた基材を覆うように無機絶縁材料膜を形成すること、
前記表示領域に位置する無機絶縁材料膜上に保護層を形成すること、
前記保護層で覆われていない領域の無機絶縁材料膜をドライエッチングにより除去して前記配線の一部を露出させること、をこの順で含み、
前記配線を露出させる際に、前記金属層の少なくとも一部も露出させる、
有機EL表示装置の製造方法。 A display region having a plurality of pixels and a component mounting region on which a component is mounted are positioned so as to cover a substrate provided with wiring arranged from the display region to the component mounting region and a non-energized metal layer Forming an inorganic insulating material film;
Forming a protective layer on the inorganic insulating material film located in the display region;
Removing the inorganic insulating material film in the region not covered with the protective layer by dry etching to expose a part of the wiring in this order,
When exposing the wiring, exposing at least a portion of the metal layer;
A method for manufacturing an organic EL display device. - 前記エッチングによる前記無機絶縁材料膜の除去後、前記基材の前記金属層が設けられている領域を切断により除去すること、をさらに含む、請求項1に記載の製造方法。 The method according to claim 1, further comprising, after removing the inorganic insulating material film by the etching, removing a region of the base material where the metal layer is provided by cutting.
- 前記金属層は前記配線に含まれる金属を含む、請求項1に記載の製造方法。 The manufacturing method according to claim 1, wherein the metal layer includes a metal contained in the wiring.
- 前記配線は、電極層と前記電極層を保護する表面保護層とを有し、
前記金属層は前記表面保護層に含まれる金属を含む、請求項3に記載の製造方法。 The wiring has an electrode layer and a surface protective layer protecting the electrode layer,
The said metal layer is a manufacturing method of Claim 3 containing the metal contained in the said surface protective layer. - 前記表面保護層の厚みが10nm~100nmである、請求項4に記載の製造方法。 The manufacturing method according to claim 4, wherein the thickness of the surface protective layer is 10 nm to 100 nm.
- 前記配線のエッチングの進行状況をモニターする、請求項3に記載の製造方法。 The manufacturing method according to claim 3, wherein the progress of etching of the wiring is monitored.
- 前記金属層は、前記配線を露出させる領域を囲むように設けられている、請求項1に記載の製造方法。 The manufacturing method according to claim 1, wherein the metal layer is provided so as to surround a region where the wiring is exposed.
- 複数の画素を備える表示領域と、部品が実装される部品実装領域とを有する基材と、
前記基材の前記表示領域を覆い、無機絶縁材料で形成された封止膜と、
前記基材の前記表示領域から前記部品実装領域にわたって配置された配線と、
前記基材に形成され、通電されない金属層と、を有し、
前記配線および前記金属層は、それぞれ、前記封止膜に覆われていない部分を有している、
有機EL表示装置。 A base material having a display area including a plurality of pixels and a component mounting area on which a component is mounted;
A sealing film that covers the display area of the substrate and is formed of an inorganic insulating material;
Wiring arranged from the display area of the base material to the component mounting area;
A metal layer formed on the substrate and not energized,
The wiring and the metal layer each have a portion that is not covered with the sealing film.
Organic EL display device. - 前記基材は可撓性を有し、前記表示領域と前記表示領域との間に曲げ領域を含み、
前記曲げ領域に位置する前記金属層は屈曲形状を有する、請求項8に記載の有機EL表示装置。 The base material has flexibility, and includes a bending region between the display region and the display region,
The organic EL display device according to claim 8, wherein the metal layer located in the bending region has a bent shape. - 前記金属層は前記配線に含まれる金属を含む、請求項8に記載の有機EL表示装置。 The organic EL display device according to claim 8, wherein the metal layer includes a metal contained in the wiring.
- 前記配線は、電極層と前記電極層を保護する表面保護層とを有し、
前記金属層は前記表面保護層に含まれる金属を含む、請求項10に記載の有機EL表示装置。 The wiring has an electrode layer and a surface protective layer protecting the electrode layer,
The organic EL display device according to claim 10, wherein the metal layer includes a metal contained in the surface protective layer. - 前記表面保護層の厚みが10nm~100nmである、請求項11に記載の有機EL表示装置。
The organic EL display device according to claim 11, wherein the thickness of the surface protective layer is 10 nm to 100 nm.
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