WO2017130654A1

WO2017130654A1 - Photovoltaic element

Info

Publication number: WO2017130654A1
Application number: PCT/JP2017/000224
Authority: WO
Inventors: 公一橋本
Original assignee: 長州産業株式会社
Priority date: 2016-01-25
Filing date: 2017-01-06
Publication date: 2017-08-03
Also published as: TW201801339A

Abstract

Provided is a photovoltaic element of which the output characteristics are less temperature dependent and which is capable of maintaining fine characteristics even at a high temperature. A photovoltaic element (10) according to the present invention is provided with: an n-type crystal semiconductor substrate (11); an n-type amorphous semiconductor layer (13) stacked on the light incident surface side of the n-type crystal semiconductor substrate; and a p-type amorphous semiconductor layer (16) stacked on the surface side opposite to the light incident surface side of the n-type crystal semiconductor substrate, and is characterized in that a semiconductor material forming the n-type amorphous semiconductor layer (13) is an n-type amorphous silicon oxide. The amorphous silicon oxide is preferably represented by Si_1-xO_x (0.01≤x≤0.12). A semiconductor material forming the p-type amorphous semiconductor layer (16) is preferably a p-type amorphous silicon oxide.

Description

Photovoltaic element

The present invention relates to a photovoltaic device.

In recent years, solar cells have attracted particular attention as clean power generation means that does not generate CO ₂ or other greenhouse gases, or as power generation means with high operational safety that can replace nuclear power generation. One type of solar cell is a heterojunction solar cell with high power generation efficiency.

In a heterojunction solar cell (photovoltaic element), for example, a first intrinsic amorphous semiconductor layer and a p-type amorphous semiconductor layer are stacked in this order on one surface side of an n-type crystal semiconductor substrate, A second intrinsic amorphous semiconductor layer and an n-type amorphous semiconductor layer are stacked in this order on the other surface side of the n-type crystal semiconductor substrate. In such a heterojunction type photovoltaic device, in order to further improve output characteristics, a photovoltaic device having an n-type amorphous semiconductor layer side as a light incident surface has been proposed (Japanese Patent Application Laid-Open No. 2014-216334). And Japanese Unexamined Patent Application Publication No. 2014-216335).

On the other hand, considering the productivity of solar power generation, it is desirable to construct mega-solar power generation facilities in areas with a lot of sunlight. Therefore, in the future, it is expected that mega solar construction will proceed in desert areas with a lot of sunlight and in the vicinity of the equator. However, the conversion efficiency of the photovoltaic device has temperature dependence, and the power generation efficiency decreases at high temperatures. Therefore, in consideration of construction in a desert area, etc., development of a photovoltaic device that is less dependent on temperature and is unlikely to decrease power generation efficiency even at high temperatures is expected.

JP 2014-216334 A JP 2014-216335 A

The present invention has been made based on the above circumstances, and an object of the present invention is to provide a photovoltaic device that has low temperature dependence of output characteristics and can maintain good characteristics even at high temperatures. is there.

The present invention, which has been made to solve the above problems, includes an n-type crystal semiconductor substrate, an n-type amorphous semiconductor layer stacked on the light incident surface side of the n-type crystal semiconductor substrate, and the n-type crystal semiconductor substrate. A photovoltaic device comprising a p-type amorphous semiconductor layer laminated on the side opposite to the light incident surface side, wherein the semiconductor material forming the n-type amorphous semiconductor layer is an n-type It is characterized by being amorphous silicon oxide.

According to the photovoltaic device, the temperature dependence of the output characteristics can be reduced because the n-type amorphous semiconductor layer is formed of amorphous silicon oxide.

The amorphous silicon oxide is preferably represented by Si _1-x O _x (0.01 ≦ x ≦ 0.12). Since the n-type amorphous semiconductor layer is formed of amorphous silicon oxide having such an oxygen content, output characteristics such as conversion efficiency can be improved.

The semiconductor material forming the p-type amorphous semiconductor layer is preferably p-type amorphous silicon oxide. In addition to the n-type amorphous semiconductor layer, the p-type amorphous semiconductor layer on the back side is also formed of amorphous silicon oxide, thereby making the temperature dependence of the output characteristics of the photovoltaic device more It can be reduced.

A first intermediate layer interposed between the n-type crystal semiconductor substrate and the n-type amorphous semiconductor layer, wherein the first intermediate layer is an intrinsic amorphous semiconductor or an n-type amorphous semiconductor layer; It is preferably formed from a semiconductor. Furthermore, it is preferable that the first intermediate layer is an n-type amorphous semiconductor layer having a smaller doping amount than the n-type amorphous semiconductor layer. By providing such a first intermediate layer, recombination of carriers is suppressed and output characteristics can be further improved.

Preferably, a second intermediate layer interposed between the n-type crystal semiconductor substrate and the p-type amorphous semiconductor layer is further provided, and the second intermediate layer is formed of an intrinsic amorphous semiconductor. . Providing such a second intermediate layer also suppresses carrier recombination and can further enhance output characteristics.

Here, “amorphous” in an amorphous semiconductor means not only a completely amorphous body but also one having microcrystals in the amorphous body. However, in this specification, an amorphous semiconductor including a microcrystal may be simply referred to as “amorphous semiconductor” or the like. “Intrinsic” in an intrinsic amorphous semiconductor layer means that impurities are not intentionally doped, and includes impurities that are originally contained in raw materials or impurities that are unintentionally mixed in the manufacturing process. Meaning. “Amorphous silicon oxide” as a semiconductor material refers to an amorphous compound having semiconductor characteristics formed by oxygen atoms and silicon atoms, and the ratio of oxygen atoms to silicon atoms is specified. It is not meant to be limited to those of the ratio.

According to the photovoltaic device of the present invention, it is possible to provide a photovoltaic device that has low temperature dependence of output characteristics and can maintain good characteristics even at high temperatures.

FIG. 1 is a schematic cross-sectional view of a photovoltaic device according to an embodiment of the present invention. It is a graph which shows the conversion efficiency of the photovoltaic device in an Example. It is a graph which shows the external quantum efficiency, internal quantum efficiency, and reflectance of the power generation element which shines in an Example.

Hereinafter, a photovoltaic device according to an embodiment of the present invention will be described in detail with reference to the drawings as appropriate.

The photovoltaic element 10 in FIG. 1 includes an n-type crystal semiconductor substrate 11, a first intermediate layer 12 stacked in the following order on one surface side (upper side in FIG. 1) of the n-type crystal semiconductor substrate 11, and an n-type crystal. A second intermediate layer 15 laminated on the amorphous semiconductor layer 13 and the first transparent conductive film 14 on the other surface side (lower side in FIG. 1) of the n-type crystal semiconductor substrate 11 in the following order, p-type An amorphous semiconductor layer 16 and a second transparent conductive film 17 are provided. Furthermore, the photovoltaic device 10 includes a plurality of linear collector electrodes 18 disposed on the outer surface of the first transparent conductive film 14 and the outer surface of the second transparent conductive film 17. The “outer surface” refers to the surface opposite to the n-type crystal semiconductor substrate 11 with the n-type crystal semiconductor substrate 11 as the center. The “inner surface” refers to a surface on the n-type crystal semiconductor substrate 11 side.

In the photovoltaic element 10, the upper side in FIG. 1, that is, the first transparent conductive film 14 side is the light incident surface. Note that the photovoltaic element 10 has at least the first transparent conductive film 14 side as a light incident surface, and may be designed so that light can be incident also from the second transparent conductive film 17 side. That is, the photovoltaic device 10 can be configured such that light is incident from both sides.

The n-type crystal semiconductor substrate 11 is formed from an n-type crystal semiconductor. By using the n-type substrate, it is possible to avoid the light deterioration phenomenon peculiar to the p-type substrate. An n-type crystal semiconductor is usually a crystal formed by adding a trace amount of a pentavalent element to a semiconductor such as silicon. Examples of the crystal semiconductor constituting the n-type crystal semiconductor substrate 11 include SiC and SiGe in addition to silicon (Si), but silicon is preferable from the viewpoint of productivity. The n-type crystal semiconductor substrate 11 may be a single crystal or a polycrystal.

On both surfaces of the n-type crystal semiconductor substrate 11, a pyramidal fine concavo-convex structure is formed. With such a structure, the light confinement function can be enhanced. The height and size of the uneven structure (texture structure) may be uneven, and adjacent uneven parts may overlap. Moreover, a vertex and a trough part may be roundish. The height of the unevenness is about several μm to several tens of μm. Such a concavo-convex structure can be obtained, for example, by immersing the substrate material in an etching solution containing about 1 to 5% by mass of sodium hydroxide and anisotropically etching the (100) plane of the substrate material.

The average thickness of the n-type crystal semiconductor substrate 11 is not particularly limited. The upper limit of the average thickness is, for example, 300 μm, and preferably 200 μm. Moreover, as this minimum, it can be set as 50 micrometers, for example. By reducing the thickness of the n-type crystal semiconductor substrate 11 in this way, the photovoltaic device 10 itself can be reduced in size and cost.

The first intermediate layer 12 is a layer interposed between the n-type crystal semiconductor substrate 11 and the n-type amorphous semiconductor layer 13 and functions as a passivation layer that suppresses carrier recombination. The first intermediate layer 12 is formed from an intrinsic amorphous semiconductor or an n-type amorphous semiconductor. The first intermediate layer 12 is preferably a lightly doped n-type amorphous semiconductor layer having a smaller doping amount than the n-type amorphous semiconductor layer 13. By providing such a low-doped n-type amorphous semiconductor layer as the first intermediate layer 12, the output characteristics of the photovoltaic element 10 can be further improved.

When the first intermediate layer 12 is formed of an intrinsic amorphous semiconductor, silicon is usually preferable as the intrinsic amorphous semiconductor. When the first intermediate layer 12 is formed of an n-type amorphous semiconductor, the first intermediate layer 12 is preferably an amorphous layer obtained by adding a trace amount of a pentavalent element to silicon. The first intermediate layer 12 (low-doped n-type amorphous semiconductor layer) formed of a low-doped n-type amorphous semiconductor layer is added with a pentavalent element from the n-type amorphous semiconductor layer 13. The amount (dope amount) is small. That the first intermediate layer 12 is a lightly doped n-type amorphous semiconductor layer can be confirmed by the density and concentration of the dopant (pentavalent element), the electrical resistance value, and the like. The electron density and the like of the dopant can be measured by a known method. Further, as will be described in detail later, the doping amount depends on the flow rate of the doping gas. Therefore, a lightly doped n-type amorphous semiconductor can be formed by relatively reducing the flow rate of the doping gas. . With such a first intermediate layer 12 (intrinsic amorphous semiconductor layer or n-type amorphous semiconductor layer), carrier recombination can be suppressed and output characteristics can be improved. In addition, as average thickness of the 1st intermediate | middle layer 12, it can be set as 1 nm or more and 10 nm or less, for example.

The n-type amorphous semiconductor layer 13 is disposed on the light incident surface side of the n-type crystal semiconductor substrate 11 via the first intermediate layer 12. The semiconductor material forming the n-type amorphous semiconductor layer 13 is n-type amorphous silicon oxide. In other words, the amorphous silicon oxide as a semiconductor material for forming the n-type amorphous semiconductor layer 13 is amorphous silicon doped with oxygen atoms. The n-type amorphous semiconductor layer 13 is an amorphous layer obtained by adding a trace amount of a pentavalent element to such amorphous silicon oxide. That is, the n-type amorphous semiconductor layer 13 is formed of silicon doped with oxygen atoms and pentavalent elements. According to the photovoltaic device 10, the n-type amorphous semiconductor layer 13 disposed on the light incident surface side is formed of n-type amorphous silicon oxide, and thus has excellent output characteristics. However, the temperature dependence can be reduced.

The amorphous silicon oxide forming the n-type amorphous semiconductor layer 13 is preferably represented by Si _1-x O _x (0.01 ≦ x ≦ 0.12). By forming the n-type amorphous semiconductor layer 13 with amorphous silicon oxide having such an oxygen content, the band gap of the amorphous silicon oxide becomes an appropriate value and the transparency becomes high. Thereby, output characteristics, such as the conversion efficiency of the said photovoltaic device 10, and a maximum output, can be improved more. In order to further enhance the above characteristics, the lower limit of the oxygen content (x) is more preferably 0.02, further preferably 0.03, still more preferably 0.04, and particularly preferably 0.05. On the other hand, the upper limit of the oxygen content (x) is more preferably 0.1 and even more preferably 0.08. In addition, this oxygen content rate (x) can be adjusted with the composition ratio of the raw material gas at the time of forming into a film by plasma CVD method so that it may mention later.

The average thickness of the n-type amorphous semiconductor layer 13 is not particularly limited, but can be, for example, 1 nm or more and 20 nm or less.

The second intermediate layer 15 is a layer interposed between the n-type crystal semiconductor substrate 11 and the p-type amorphous semiconductor layer 16 and functions as a passivation layer that suppresses carrier recombination. The second intermediate layer 15 is formed from an intrinsic amorphous semiconductor such as silicon. Such a second intermediate layer 15 (intrinsic amorphous semiconductor layer) can suppress carrier recombination and improve output characteristics. In addition, as average thickness of the 2nd intermediate | middle layer 15, it is 1 nm or more and 10 nm or less, for example.

The p-type amorphous semiconductor layer 16 is disposed on the side opposite to the light incident surface side of the n-type crystal semiconductor substrate 11 via the second intermediate layer 15. The p-type amorphous semiconductor layer 16 is an amorphous layer formed by adding a trace amount of a trivalent element to a semiconductor. The semiconductor material for forming the p-type amorphous semiconductor layer 16 may be p-type amorphous silicon, but is preferably p-type amorphous silicon oxide. In other words, the amorphous silicon oxide as a semiconductor material for forming the p-type amorphous semiconductor layer 16 is amorphous silicon doped with oxygen atoms. The preferable p-type amorphous semiconductor layer 16 is an amorphous layer obtained by adding a trace amount of a trivalent element to such amorphous silicon oxide. That is, the p-type amorphous semiconductor layer 16 can be formed of silicon doped with oxygen atoms and trivalent elements. In addition to the n-type amorphous semiconductor layer 13, the p-type amorphous semiconductor layer 16 on the back side is also formed of amorphous silicon oxide, so that the output characteristics of the photovoltaic device 10 depend on temperature. The property can be further reduced.

The amorphous silicon oxide forming the p-type amorphous semiconductor layer 16 is preferably represented by Si _1-y O _y (0.01 ≦ y ≦ 0.12). By forming the p-type amorphous semiconductor layer 16 with amorphous silicon oxide having such an oxygen content, deterioration in characteristics at high temperatures can be further reduced. In order to further enhance the above characteristics, the lower limit of the oxygen content (y) is more preferably 0.02, more preferably 0.03, still more preferably 0.04, and particularly preferably 0.05. On the other hand, the upper limit of the oxygen content (y) is more preferably 0.1 and even more preferably 0.08. In addition, this oxygen content rate (y) can be adjusted with the composition ratio of the raw material gas at the time of forming into a film by plasma CVD method, for example.

The lower limit of the content of the trivalent element in the p-type amorphous semiconductor layer 16 is preferably 1 × 10 ²⁰ atm / cm ^{3 and} more preferably 2.5 × 10 ²⁰ atm / cm ³ . On the other hand, the upper limit of this content is preferably ^{^{10 × 10 20 atm / cm 3}} , more preferably ^{^{5 × 10 20 atm / cm 3}} . Further, as the trivalent element doped into the p-type amorphous semiconductor layer 16, boron is preferable.

The average thickness of the p-type amorphous semiconductor layer 16 can be, for example, 1 nm or more and 20 nm or less.

The first transparent conductive film 14 is laminated on the outer surface side of the n-type amorphous semiconductor layer 13. The second transparent conductive film 17 is laminated on the outer surface side of the p-type amorphous semiconductor layer 16. Examples of the transparent conductive material constituting the first transparent conductive film 14 and the second transparent conductive film 17 include indium tin oxide (ITO), indium tungsten oxide (IWO), and indium cerium oxide (ICO). be able to. Although it does not restrict | limit especially as an average film thickness of the 1st transparent conductive film 14 and the 2nd transparent conductive film 17, For example, it is 40 nm or more and 200 nm or less, respectively.

Each collector electrode 18 has a plurality of bus bar electrodes formed in parallel to each other, and a plurality of finger electrodes formed orthogonal to these bus bar electrodes and in parallel with each other.

The bus bar electrode and the finger electrode are each linear or strip-like, and are made of a conductive material. As the conductive material, a conductive adhesive such as a silver paste or a metal wire such as a copper wire can be used. These collector electrodes 18 may have a layer structure. The width of each bus bar electrode is, for example, about 0.5 mm to 2 mm. Further, the width of each finger electrode is, for example, about 10 μm or more and 300 μm or less. The interval between the finger electrodes is, for example, about 0.5 mm to 4 mm.

The photovoltaic elements 10 are usually used by connecting a plurality of them in series. By using a plurality of photovoltaic elements 10 connected in series, the generated voltage can be increased.

The method for manufacturing the photovoltaic device 10 is not particularly limited. For example, the step of laminating the first intermediate layer 12 on one surface side of the n-type crystal semiconductor substrate 11 and the n-type amorphous semiconductor layer 13 are further laminated. A step, a step of further laminating the first transparent conductive film 14, a step of laminating the second intermediate layer 15 on the other surface side of the n-type crystal semiconductor substrate 11, and a step of laminating the p-type amorphous semiconductor layer 16 And a step of further laminating the second transparent conductive film 17 and a step of laminating the collector electrode 18 on each outer surface of the first transparent conductive film and the second transparent conductive film. In addition, the order of each process will not be specifically limited as long as it is the order which can obtain the layer structure of the photovoltaic device 10. FIG.

The lamination of each amorphous semiconductor layer can be performed by a known method such as chemical vapor deposition. Examples of chemical vapor deposition include plasma CVD and catalytic CVD (also called hot wire CVD).

In the case of the plasma CVD method, in the lamination of the first intermediate layer 12 and the second intermediate layer 15 as intrinsic amorphous semiconductor layers, a mixed gas of, for example, SiH ₄ and H ₂ can be used as a source gas. . Further, when the first intermediate layer 12 is formed of an n-type amorphous semiconductor, for example, a mixed gas of SiH ₄ , H _2, and PH ₃ can be used as the source gas. The first intermediate layer 12 formed of an n-type amorphous semiconductor with a small amount of doping is formed by reducing the flow rate (flow rate ratio) of the dopant gas as compared with the n-type amorphous semiconductor layer 13. be able to. For example, in the case of forming by a plasma CVD method using a mixed gas containing SiH ₄ and PH ₃ , the first intermediate layer is formed by forming PH ₃ as a dopant based on SiH ₄ at 1000 ppm or less. Layer 12 can be obtained. Further, the amount (concentration) of PH ₃ introduced when forming the first intermediate layer 12 is 1 / of the amount introduced (concentration) when forming the n-type amorphous semiconductor layer 13 described later. It can be set to 100 or more and 1/5 or less.

In the lamination of the n-type amorphous semiconductor layer 13 (n-type amorphous silicon oxide layer), for example, a mixed gas of SiH ₄ , H ₂ , PH ₃ and CO ₂ can be used as a source gas. In this case, the n-type amorphous semiconductor layer 13 formed from amorphous silicon oxide having a high oxygen content can be obtained by increasing the mixing ratio of CO ₂ . During formation of the n-type amorphous-based silicon oxide layer, the lower limit of the ratio of the flow rate of CO ₂ of SiH ₄ to the flow rate _{(sccm) (sccm) (CO} 2 / SiH 4), preferably 0.1, 0.4 is more preferable. On the other hand, the upper limit of this ratio is preferably 2, and more preferably 1. Further, N ₂ O or the like can be used instead of CO ₂ for doping oxygen atoms.

In the lamination of the p-type amorphous semiconductor layer 16 (p-type amorphous silicon oxide layer), for example, a mixed gas of SiH ₄ , H ₂ , B ₂ H ₆ and CO ₂ is used as the source gas. it can. In this case the p-type amorphous-based silicon oxide layer formation, the lower limit of the ratio of the flow rate of CO ₂ to the flow rate of _{SiH 4 (sccm) (sccm)} (CO 2 / SiH 4), preferably 0.1, 0.4 is more preferable. On the other hand, the upper limit of this ratio is preferably 2, and more preferably 1. Further, N ₂ O or the like can be used instead of CO ₂ for doping oxygen atoms. When the p-type amorphous semiconductor layer 16 is a p-type amorphous silicon layer, for example, a mixed gas of SiH ₄ , H ₂ and B ₂ H ₆ can be used as the source gas.

Examples of the method of laminating the first transparent conductive film 14 and the second transparent conductive film 17 include a sputtering method, a vacuum vapor deposition method, an ion plating method (reactive plasma vapor deposition method), and the like. It is preferable to use an ion plating method. The sputtering method is excellent in film thickness controllability and the like, and can be performed at a lower cost than the ion plating method. On the other hand, according to the ion plating method, film formation in which generation of defects is suppressed can be performed.

The arrangement of the collecting electrode 18 can be performed by a known method. When a conductive adhesive is used as the material of the collector electrode 18, it can be formed by a printing method such as screen printing or gravure offset printing. Further, when a metal lead is used for the collector electrode 18, it can be fixed on the first transparent conductive film 14 or the second transparent conductive film 17 with a conductive adhesive or a low melting point metal (solder or the like).

The present invention is not limited to the above-described embodiment, and the configuration can be changed without changing the gist of the present invention. For example, the collector electrode on the back side of the collector electrodes on both sides may be formed of a metal or the like laminated on the entire surface. Further, the first intermediate layer and the second intermediate layer may not be provided. Furthermore, a transparent conductive film may be formed at least on the incident surface side, and the transparent conductive film may not be formed on the back surface side, and may be a metal film, for example. However, by stacking a transparent conductive film on the outer surface of the p-type amorphous semiconductor layer on the back side, generation of defect levels can be suppressed and conversion efficiency can be increased.

Hereinafter, the contents of the present invention will be described more specifically with reference to examples and comparative examples. In addition, this invention is not limited to a following example.

<Example 1>
Layer structure comprising first transparent conductive film / n-type amorphous semiconductor layer / first intermediate layer / n-type crystal semiconductor substrate / second intermediate layer / p-type amorphous semiconductor layer / second transparent conductive film Was made. As the n-type crystal semiconductor substrate, a single crystal silicon substrate having a fine concavo-convex structure (texture structure) having innumerable pyramid shapes on both surfaces was used. This concavo-convex structure was formed by immersing the substrate material in an etching solution containing about 3% by mass of sodium hydroxide and anisotropically etching the (100) plane of the substrate material.

The nuclear amorphous semiconductor layer and the intermediate layer were laminated by a plasma CVD method using the following source gas.
n-type amorphous semiconductor layer: SiH ₄ , H ₂ , PH ₃ , and CO ₂
First intermediate layer (low-doped n-type amorphous semiconductor layer): SiH ₄ , H ₂ , and PH ₃
Second intermediate layer (intrinsic amorphous semiconductor layer): SiH ₄ and H ₂
p-type amorphous semiconductor layer: SiH ₄ , H ₂ , B ₂ H ₆ , and CO ₂

In the formation of the n-type amorphous semiconductor layer, the flow rate of SiH ₄ was 5 sccm, and the flow rate of CO ₂ was 0.9 sccm. In the formation of the p-type amorphous semiconductor layer, the flow rate of SiH ₄ was 5 sccm, and the flow rate of CO ₂ was 4.1 sccm. In the obtained p-type amorphous semiconductor layer, the atomic density of boron was 3.5 × 10 ²⁰ atm / cm ³ . Further, the first intermediate layer was formed as a low-doped n-type amorphous semiconductor layer by forming the PH ₃ flow rate as 1/10 of the n-type amorphous semiconductor layer based on SiH ₄ . Each transparent conductive film was laminated by sputtering using indium oxide containing 3% by mass of tin oxide.

Next, a plurality of parallel bus bar electrodes and a plurality of finger electrodes respectively orthogonal to the bus bar electrodes were formed as collector electrodes on the outer surface of each transparent conductive film. This collector electrode was formed by screen printing using a silver paste. This obtained the photovoltaic device of Example 1.

<Examples 2 to 4, Comparative Example 1>
In the formation of the n-type amorphous semiconductor layer, the photovoltaic elements of Examples 2 to 4 and Comparative Example 1 were prepared in the same manner as in Example 1 except that the flow rate of CO ₂ was as shown in Table 1. Obtained.

<Example 5>
Example 3 except that a mixed gas of SiH ₄ , H ₂ and B ₂ H ₆ was used as the source gas for the p-type amorphous semiconductor layer, and the p-type amorphous semiconductor layer was formed of p-type silicon. In the same manner as described above, the photovoltaic device of Example 5 was obtained. In the obtained p-type amorphous semiconductor layer, the atomic density of boron was 3.5 × 10 ²⁰ atm / cm ³ .

[Temperature dependence of output characteristics (curve factor)]
The temperature dependence of the output characteristics of the photovoltaic elements of Comparative Example 1, Example 3 and Example 5 obtained was evaluated. The fill factor (FF) was measured at 25 ° C, 45 ° C and 70 ° C. In addition, it measured by making the said 1st transparent conductive film side into a light-incidence surface. The results are shown in Table 2. In addition, each measured value is shown as a relative value based on an actual measured value of each photovoltaic device at 25 ° C. (100%).

As shown in Table 2 above, it can be seen that in Examples 3 and 5 in which the n-type amorphous semiconductor layer was formed of amorphous silicon oxide, the decrease in output characteristics was small even at a high temperature of 45 ° C. In particular, in Example 3 in which both the n-type amorphous semiconductor layer and the p-type amorphous semiconductor layer are formed of amorphous silicon oxide, the output characteristics are very low even under an environment of 70 ° C. Thus, according to the photovoltaic device of this invention, it turns out that the fall of an output characteristic can be suppressed also under high temperature.

[Output characteristics (conversion efficiency)]
The conversion efficiency (Efficiency) of each of the photovoltaic devices of Examples 1 to 4 and Comparative Example 1 obtained was measured. In addition, it measured by making the said 1st transparent conductive film side into a light-incidence surface. The results are shown in FIG. The horizontal axis in FIG. 2 represents the oxygen content in the amorphous silicon oxide forming the n-type amorphous semiconductor layer of each photovoltaic device. This oxygen content was measured by XPS measurement using “Quantera SXM” manufactured by PHI. The oxygen content is also shown in Table 1 above. Each measured value on the vertical axis is shown as a relative value based on Comparative Example 1.

As shown in FIG. 2, it can be seen that the conversion efficiency and the like can be increased by forming the n-type amorphous semiconductor layer with amorphous silicon oxide having a predetermined range of oxygen content.

FIG. 3 shows the external quantum efficiency (EQE), the internal quantum efficiency (IQE), and the reflectance (Reflectance) of the photovoltaic devices of Comparative Example 1, Example 2, and Example 3 obtained. As shown in FIG. 3, Examples 2 and 3 in which the n-type amorphous semiconductor layer is formed of amorphous silicon oxide are different from Comparative Example 1 in which the n-type amorphous semiconductor layer is formed of silicon. In comparison, the external quantum efficiency and the internal quantum efficiency at 300 to 600 nm are high. This shows that n-type amorphous silicon oxide has higher transparency than n-type amorphous silicon.

The photovoltaic device of the present invention has good output characteristics, has low temperature dependency, can maintain good characteristics even at high temperatures, and can be suitably used for photovoltaic power generation.

DESCRIPTION OF SYMBOLS 10 Photovoltaic element 11 N-type crystal semiconductor substrate 12 1st intermediate | middle layer 13 n-type amorphous semiconductor layer 14 1st transparent conductive film 15 2nd intermediate film 16 p-type amorphous semiconductor layer 17 2nd transparent conductive film 18 Current collector

Claims

An n-type crystal semiconductor substrate, an n-type amorphous semiconductor layer stacked on the light incident surface side of the n-type crystal semiconductor substrate, and a surface opposite to the light incident surface side of the n-type crystal semiconductor substrate are stacked. A photovoltaic device comprising a p-type amorphous semiconductor layer,
A photovoltaic element, wherein the semiconductor material forming the n-type amorphous semiconductor layer is n-type amorphous silicon oxide.
The photovoltaic device according to claim 1, wherein the amorphous silicon oxide is represented by Si 1-x O x (0.01 ≦ x ≦ 0.12).
3. The photovoltaic device according to claim 1, wherein the semiconductor material forming the p-type amorphous semiconductor layer is p-type amorphous silicon oxide.
A first intermediate layer interposed between the n-type crystal semiconductor substrate and the n-type amorphous semiconductor layer;
The photovoltaic device according to claim 1, wherein the first intermediate layer is formed of an intrinsic amorphous semiconductor or an n-type amorphous semiconductor.
The photovoltaic element according to claim 4, wherein the first intermediate layer is an n-type amorphous semiconductor layer having a smaller doping amount than the n-type amorphous semiconductor layer.
A second intermediate layer interposed between the n-type crystal semiconductor substrate and the p-type amorphous semiconductor layer;
The photovoltaic device according to any one of claims 1 to 5, wherein the second intermediate layer is formed of an intrinsic amorphous semiconductor.