WO2013159520A1 - Thin-film transistor array substrate, manufacturing method therefor and liquid crystal display - Google Patents

Thin-film transistor array substrate, manufacturing method therefor and liquid crystal display Download PDF

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Publication number
WO2013159520A1
WO2013159520A1 PCT/CN2012/085487 CN2012085487W WO2013159520A1 WO 2013159520 A1 WO2013159520 A1 WO 2013159520A1 CN 2012085487 W CN2012085487 W CN 2012085487W WO 2013159520 A1 WO2013159520 A1 WO 2013159520A1
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Prior art keywords
layer
primary color
color filter
array substrate
pixel electrode
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PCT/CN2012/085487
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French (fr)
Chinese (zh)
Inventor
孔祥春
曹占峰
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京东方科技集团股份有限公司
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Publication of WO2013159520A1 publication Critical patent/WO2013159520A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136222—Colour filters incorporated in the active matrix substrate

Definitions

  • Thin film transistor array substrate manufacturing method thereof and liquid crystal display
  • Embodiments of the present invention relate to a thin film transistor (TFT) array substrate, a method of fabricating the same, and a liquid crystal display. Background technique
  • TFT-LCD Thin Film Transistor Liquid Crystal Display
  • the structure of the TFT-LCD is composed of an array substrate, a color filter substrate, and a liquid crystal layer filled between the two substrates.
  • the array substrate and the color filter substrate are formed on different glass substrates, respectively.
  • the array substrate includes gate lines, data lines, thin film transistors, and pixel electrodes, and the fabrication of the array substrate is generally performed using a four-time patterning process.
  • the color film substrate comprises a black matrix, a color photoresist, a protective layer and a transparent conductive layer, and four patterning processes are also required to complete the fabrication of the color filter substrate.
  • the patterning process generally includes the processes of coating, masking, exposing, developing, and stripping of the photoresist, and each masking process requires the use of a mask, which is expensive. Therefore, the fabrication of the structure of the TFT-LCD requires a total of at least eight patterning processes, more manufacturing steps, and higher production costs. Summary of the invention
  • a TFT array substrate including: a substrate; a gate, a gate line, and a light-shielding strip formed on the substrate; a gate insulating layer sequentially formed on the gate, a semiconductor active layer, a phase-separated source and drain, and a channel structure, the gate insulating layer is in contact with the semiconductor active layer; a passivation layer formed over the source and the drain; a pixel electrode formed over the gate insulating layer, the pixel electrode being electrically connected to the drain; and at least one primary color filter layer positioned above the pixel electrode.
  • a liquid crystal display comprising the above-described TFT array substrate is provided.
  • a method of fabricating a TFT array substrate for Manufacturing the above TFT array substrate, the method comprising: depositing a metal layer on the substrate, forming a gate, a gate line, and a light shielding strip by performing a first patterning process; at the gate, the gate line, and the light shielding strip Depositing a gate insulating layer, a semiconductor active layer, and a source/drain metal layer in sequence, forming a data line, a phase separated source and drain, and a channel structure by performing a second patterning process; depositing passivation on the substrate a layer, exposing the drain by performing a third patterning process; depositing a transparent conductive film layer on the passivation layer, forming a pixel electrode by performing a patterning process, and at least one primary color filter on the pixel electrode a layer, wherein the pixel electrode is electrically connected to the drain.
  • FIG. 1 is a schematic structural view of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a first patterning process
  • FIG. 2 is a schematic structural view of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a second patterning process
  • FIG. 3 is a schematic structural view of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a third patterning process;
  • FIG. 4 is a schematic structural view of a method for fabricating a TFT array substrate according to an embodiment of the present invention after performing a third patterning process;
  • FIG. 5 is a schematic structural view of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a fourth patterning process
  • FIG. 6 is a schematic structural diagram of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a sixth patterning process. detailed description
  • Embodiments of the present invention provide a TFT array substrate and a method of fabricating the same, which are capable of reducing manufacturing steps of a TFT liquid crystal display and reducing production costs. Embodiments of the present invention also provide a liquid crystal display including the above TFT array substrate.
  • the manufacturing method of the TFT array substrate provided by the embodiment of the present invention includes the following steps S101 to S104, for example.
  • FIG. 1 is a schematic structural view of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a first patterning process.
  • a metal layer having a thickness of 500 ⁇ to 5000 ⁇ is deposited on the substrate 201 by, for example, magnetron sputtering or thermal evaporation.
  • the material of the metal layer may be formed using a metal or an alloy such as tungsten, titanium, molybdenum, aluminum, tantalum, aluminum-nickel alloy, molybdenum-tungsten alloy, chromium or copper, or several materials mentioned above may be used.
  • a metal or an alloy such as tungsten, titanium, molybdenum, aluminum, tantalum, aluminum-nickel alloy, molybdenum-tungsten alloy, chromium or copper, or several materials mentioned above may be used.
  • the combination is formed; the substrate 201 can be formed of glass, quartz or other non-metallic light guiding material.
  • a gate electrode 202, a gate line (not shown in FIG. 1), a common electrode 203, and a light-shielding strip (not shown in FIG. 1) are formed on the substrate 201 by a first patterning process, and a data signal line is also formed (not shown in FIG. Mark).
  • the light-shielding strip is disposed in the peripheral region of the pixel electrode and is disposed in the same layer as the gate electrode 202 to block the edge of the pixel electrode to prevent light leakage. Further, in some embodiments of the present invention, when the light shielding strip is connected to the common electrode, the light shielding strip can also function as a bottom electrode of the storage capacitor.
  • FIG. 2 is a schematic structural view of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a second patterning process.
  • a film having a thickness of 1000 A to 7000 A is deposited as a gate insulating layer 204 on a substrate 201 by a method such as plasma enhanced chemical vapor deposition (PECVD), and the gate insulating layer 204 covers the gate electrode 202 and the gate line. , the common electrode 203 and the light shielding strip.
  • PECVD plasma enhanced chemical vapor deposition
  • the gate insulating layer 204 may be formed using an oxide, a nitride or an oxynitride.
  • a semiconductor active layer 205 having a thickness of 1000 A to 7000 A and an ohmic contact layer 208 having a thickness of 500 A to 6000 A may be sequentially deposited on the substrate 201 on which the gate insulating layer 204 is formed by a chemical deposition method.
  • the film thickness of the ohmic contact layer 208 may be appropriately increased in the case where the TFT structure to be formed allows.
  • a source-drain metal layer having a thickness of 500 A to 5000 A is deposited on the substrate 201 by, for example, magnetron sputtering or thermal evaporation, and the source/drain metal layer may be made of chromium, tungsten, titanium, tantalum, molybdenum, aluminum.
  • a metal such as copper or an alloy thereof.
  • the gate insulating layer 204 can be oxide, nitride or oxynitride is formed, corresponding to the reaction gas may be Si3 ⁇ 4, N3 ⁇ 4, N 2 or a mixed gas of SiH 2 Cl 2, N3 ⁇ 4, N 2
  • the semiconductor active layer 205 may be an amorphous silicon film, and the corresponding reaction gas may be a mixed gas of Si 3 ⁇ 4, N 2 or a mixed gas of Si 3 ⁇ 4, Cl 2 , N 2 , but embodiments of the present invention are not limited thereto. .
  • a photoresist layer is coated on the substrate 201 on which the gate insulating layer 204, the semiconductor active layer 205, the ohmic contact layer 208, and the source/drain metal layer are deposited, and the photolithography is performed by using a halftone or gray mask with slits.
  • the glue layer is exposed to form a fully exposed area, a partially exposed area, and a non-exposed area, and the fully exposed area corresponds to a region other than the TFT area in the pixel area, and the partially exposed area corresponds to the channel area (not shown in FIG. 2)
  • the non-exposed areas correspond to other areas, that is, areas corresponding to the data lines (not shown in FIG. 2), the source 206, and the drain 207.
  • the source/drain metal layer, the ohmic contact layer 208, and the semiconductor active layer 205 of the fully exposed region are etched away by an etching process to form a data line (not shown in FIG. 2); and then, through an ashing process, The photoresist in the partially exposed region is removed to expose the source/drain metal layer of the channel region; and the source/drain metal layer, the ohmic contact layer 208 and the portion of the semiconductor active layer 205 of the partially exposed region are etched away by an etching process.
  • the photoresist is stripped to form the structure shown in FIG.
  • the purpose of performing the third patterning process is to expose the drain such that the pixel electrode formed later is electrically connected to the drain.
  • the drain can be exposed, for example, pixels can be The partial passivation layers of the regions other than the TFT region in the region are all etched away, and via holes may also be formed in the passivation layer, and embodiments of the present invention are not limited thereto.
  • FIG. 3 is a schematic structural diagram of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a third patterning process.
  • a film having a thickness of 1000 A to 7000 A is deposited as a gate passivation layer 209 on the substrate 201 subjected to the above treatment by, for example, plasma enhanced chemical vapor deposition (PECVD);
  • PECVD plasma enhanced chemical vapor deposition
  • the photoresist layer is coated and exposed by a common mask, and then a part of the passivation layer 209 in the pixel region except the TFT region is completely etched after the development and etching process.
  • the portion of the drain 207 is exposed and exposed; finally, the photoresist is stripped to complete the third patterning process.
  • the passivation layer 209 can be oxide, nitride or oxynitride is formed, corresponding to the reaction gas may be N3 ⁇ 4, N mixed Si3 ⁇ 4, N3 ⁇ 4, N 2 or a mixed gas Si3 ⁇ 4Cl 2, 2 of gas.
  • the film thickness of the gate insulating layer 204 can be appropriately adjusted to ensure a reasonable height difference between the device region and the pixel region, thereby reducing the influence of the common electrode line on the height.
  • FIG. 4 is a schematic structural view of a method for fabricating a TFT array substrate according to an embodiment of the present invention, after performing a third patterning process, the steps before development and etching shown in FIG. 4 and the third composition shown in FIG. The corresponding steps in the process are the same, but during development and etching, a portion of the passivation layer 209 over the drain 207 may be etched away to form vias in the passivation layer 209 through which vias may be implemented. The electrical connection between the pixel electrode and the drain 207 is then formed.
  • a pixel electrode is formed while forming at least one primary color filter layer on the pixel electrode, and the mask is reduced in the manufacturing process of the TFT-LCD compared to the prior art.
  • the number of stencils thus reduces the manufacturing steps of the TFT-LCD and reduces the production cost.
  • step S104 may further include the following steps:
  • a primary color photoresist layer depositing a primary color photoresist layer on the transparent conductive film layer, the primary color may be red, green or blue, or may be other colors required by the designer; 51042, exposing the photoresist layer through a halftone or gray tone mask to form a non-exposed area, a partial exposure area, and a full exposure area, wherein the non-exposure area corresponds to a primary color filter layer on the transparent conductive film layer a preset position, the partial exposure area corresponds to a preset position on the transparent conductive film layer having a non-primary color filter layer, and the full exposure area corresponds to a region other than the partially exposed area and the non-exposed area, that is, the TFT area;
  • the photoresist located in the partially exposed region is subjected to ashing treatment to retain the primary color photoresist located in the non-exposed region.
  • FIG. 5 is a schematic structural diagram of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a fourth patterning process.
  • a transparent conductive film layer having a thickness of 100A to 1000A is deposited on the substrate 201 by, for example, magnetron sputtering or thermal evaporation, and the transparent conductive film layer can be
  • indium tin oxide, indium oxide or aluminum oxide can also be used with other metals or metal oxides.
  • a red photoresist film is coated on the transparent conductive film layer, and the red color is applied in the fourth patterning process when a part of the passivation layer 209 in the other region except the TFT region is etched away in the third patterning process.
  • the thickness of the photoresist is greater in the pixel region than the portion of the TFT region (having the passivation layer 209).
  • the exposure is performed by using a halftone or gray tone mask having slits to form a non-exposed area, a partially exposed area, and a fully exposed area, wherein the non-exposed area corresponds to a red filter layer on the transparent conductive film layer.
  • the preset position, the partial exposure area corresponds to a preset position on the transparent conductive film layer having a non-red filter layer
  • the full exposure area corresponds to a region other than the partially exposed area and the non-exposed area, that is, the TFT area.
  • the photoresist located in the partially exposed region is subjected to ashing treatment, and the photoresist in the non-exposed region is also subjected to ashing treatment.
  • the photoresist in the partially exposed region is completely removed, and the thickness of the photoresist in the non-exposed region is reduced, and the red photoresist remaining on the pixel electrode 210 is not peeled off to form a red filter.
  • Layer 211 is
  • the photoresist above the pixel electrode does not need to be stripped.
  • the processing shortens the production cycle.
  • the photoresist is dyed beforehand, and can be used as a part of the color film for color grading, which increases the utilization rate of the material and reduces the cost.
  • the filter layer can be continuously formed on the TFT array substrate with the primary color photoresist.
  • the green and blue photoresists are exemplified, but the embodiment of the present invention is not limited thereto.
  • a green photoresist layer is deposited on the substrate, and a green filter layer is formed by performing exposure, development, and baking processes of a fifth patterning process; then, blue light is deposited on the substrate.
  • the glue layer is formed, and a blue filter layer is formed by performing exposure, development, and baking treatment of the sixth patterning process.
  • the fifth and sixth patterning processes of the green photoresist layer and the blue photoresist layer are substantially the same as or similar to those of the prior art color film process, and thus will not be described herein.
  • a red filter layer 211, a green filter layer 212, and a blue filter layer 213 are formed on the pixel electrode 210, and the three can be used as color film members.
  • the coloring of light its effect is substantially the same as or similar to that of the filter layer on the color filter substrate.
  • step S104 may further include the following steps:
  • first primary color filter layer is located on the transparent conductive film layer and has a first primary color filter layer Preset position
  • red, green, and blue primary color photoresists will be described as an example.
  • a red photoresist layer is deposited on the transparent conductive film layer, and a red filter layer is formed by exposure, development, and baking treatment.
  • a red photoresist layer is deposited, and the red photoresist layer is exposed by a common mask.
  • the red photoresist layer is formed into a fully exposed area and a non-exposed area, and the non-exposed area corresponds to a preset position having a red filter layer on the transparent conductive film layer, completely exposed
  • the light region corresponds to a region other than the non-exposed region; then, development processing is performed, so that the red photoresist in the completely exposed region is completely removed, and the red photoresist in the non-exposed region is completely retained, and is formed after the baking treatment Red filter layer.
  • the above-mentioned patterning process is substantially the same as or similar to the process of forming the color film in the color filter substrate in the prior art, and thus will not be described in detail herein.
  • a green photoresist layer is deposited on the substrate, and a green filter layer is formed by exposure, development, and baking treatment.
  • the step of forming the green filter layer is the same as the patterning process of the red filter layer except that the photoresist is green, and therefore will not be described herein.
  • a blue photoresist layer is deposited on the substrate, and a blue filter layer is formed by exposure, development, and baking treatment.
  • the step of forming the blue filter layer is the same as the patterning process of the red filter layer described above except that the photoresist is blue, and therefore will not be described herein.
  • the transparent conductive film layer exposed between the primary color filter layers is etched to form a pixel electrode.
  • a primary color filter layer is formed after performing steps S1045 to S1048, and the primary color filter layer may include a red filter layer 211, a green filter layer 212, and a blue filter layer 213.
  • the red filter layer 211, the green filter layer 212, and the blue filter layer 213 formed on the pixel electrode 210 can be used as a color filter member for color grading.
  • the effect is substantially the same as or similar to the effect of the filter layer on the color filter substrate.
  • a plurality of primary color filter layers may be formed on the pixel electrode of the TFT array substrate by using the method provided by the embodiment of the present invention, and the primary colors may be determined according to specific conditions. It can be red, green, blue, yellow or other colors that the designer needs.
  • the method for fabricating the TFT array substrate may further include: depositing a light-shielding material on the primary color filter layer, and forming a black matrix by performing a seventh patterning process.
  • the array substrate and the color film substrate are not displaced due to external force, and light leakage can be avoided.
  • the number of patterning processes in the manufacturing method of the TFT-LCD having the three primary colors can be reduced from 8 times to 7 times, thereby reducing the number of manufacturing steps.
  • the manufacturing method of the TFT array substrate provided by the embodiment of the present invention forms a pixel electrode while forming at least one primary color filter layer on the pixel electrode by a patterning process, and the TFT-LCD is reduced compared with the prior art.
  • the number of times the mask is used in the manufacturing process thus reducing
  • the manufacturing steps of the TFT-LCD reduce the production cost.
  • the color type of the primary color filter layer can be adjusted.
  • when a black matrix is formed on the TFT array substrate light leakage can be avoided, and the quality of the displayed image is ensured.
  • the TFT array substrate provided by the embodiment of the present invention includes: a substrate 201; a gate electrode 202 formed on the substrate 201, a gate line (not shown), and a light shielding strip (not shown); a gate insulating layer 204, a semiconductor active layer 205, a phase separated source 206 and a drain 207, and a channel structure (not shown) formed on the electrode 202, and the gate insulating layer 204 is in contact with the semiconductor active layer 205; a passivation layer 209 formed over the source 206 and the drain 207; a pixel electrode 210 formed over the gate insulating layer 204, the pixel electrode 210 is electrically connected to the drain 207; and at least one primary color filter located above the pixel electrode Floor.
  • an ohmic contact layer 208 may also be disposed on the TFT array substrate, and the semiconductor active layer 205 may be in contact with the ohmic contact layer 208; further, the ohmic contact layer 208 and the source 206 and the drain, respectively. 207 is in contact with the channel structure.
  • a common electrode 203 may be disposed on the TFT array substrate, and the pixel electrode 210 is disposed above the common electrode 203 with a gate insulating layer 204 disposed therebetween.
  • the primary color filter layer comprises a primary color photoresist.
  • the primary color filter layer may include a red filter layer 211, a green filter layer 212, a blue filter layer 213, and the like.
  • a black matrix may be formed over the primary color filter layer.
  • the electrical connection structure of the pixel electrode 210 and the drain electrode 207 can be realized by completely etching away part of the passivation layer 209 except for other regions of the TFT region, or by forming a via hole in the passivation layer 209. And realized.
  • the primary color filter layer is formed on the pixel electrode, which reduces the manufacturing steps of the TFT-LCD and reduces the production cost.
  • the type of the primary color filter layer can be adjusted.
  • light leakage can be avoided, and the quality of the displayed image is ensured.
  • An embodiment of the present invention further provides a liquid crystal display, which includes any of the embodiments provided by the embodiments of the present invention.
  • a TFT array substrate is provided.

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Abstract

A thin-film transistor (TFT) array substrate, a manufacturing method therefor and a liquid crystal display. The TFT array substrate (201) comprises a substrate (201); a gate electrode (202), a gate line and a shutter bar being formed on the substrate (201); a gate insulating layer (204), a semiconductor active layer (205), a source electrode (206) and a drain electrode (207) which are separated, and a trench structure being formed on the gate electrode (202) in sequence, and the gate insulating layer (204) coming into contact with the semiconductor active layer (205); a passivation layer (209) which is formed above the source electrode (206) and the drain electrode (207); a pixel electrode (210) which is formed above the gate insulating layer (204), the pixel electrode (210) being electrically connected to the drain electrode (207); and at least one primary colour filter layer (211, 212, 213) located above the pixel electrode (210).

Description

薄膜晶体管阵列基板及其制造方法和液晶显示器 技术领域  Thin film transistor array substrate, manufacturing method thereof and liquid crystal display
本发明的实施例涉及薄膜晶体管 （TFT ) 阵列基板及其制造方法和液晶 显示器。 背景技术  Embodiments of the present invention relate to a thin film transistor (TFT) array substrate, a method of fabricating the same, and a liquid crystal display. Background technique
薄膜晶体管液晶显示器 ( Thin Film Transistor Liquid Crystal Display, TFT-LCD ) 因其具有体积小、 功耗低、 辐射少等特点， 在当前的平板显示器 市场中占据主导地位。  Thin Film Transistor Liquid Crystal Display (TFT-LCD) is dominant in the current flat panel display market due to its small size, low power consumption, and low radiation.
现有技术中， TFT-LCD的结构由阵列基板、彩膜基板以及填充在两基板 之间的液晶层组成。 阵列基板和彩膜基板分别形成在不同的玻璃基板上。 阵 列基板包括栅线、 数据线、 薄膜晶体管和像素电极， 一般釆用四次构图工艺 来完成阵列基板的制造。 彩膜基板包括黑矩阵、 彩色光刻胶、 保护层和透明 导电层， 也需要四次构图工艺来完成彩膜基板的制造。 构图工艺一般包括光 刻胶的涂敷、 掩模、 曝光、 显影、 剥离等过程， 每次构图工艺都需要使用掩 模板， 而掩模板价格昂贵。 因此， 完成 TFT-LCD的结构的制造共需要至少 八次构图工艺， 制造步骤较多， 生产成本较高。 发明内容  In the prior art, the structure of the TFT-LCD is composed of an array substrate, a color filter substrate, and a liquid crystal layer filled between the two substrates. The array substrate and the color filter substrate are formed on different glass substrates, respectively. The array substrate includes gate lines, data lines, thin film transistors, and pixel electrodes, and the fabrication of the array substrate is generally performed using a four-time patterning process. The color film substrate comprises a black matrix, a color photoresist, a protective layer and a transparent conductive layer, and four patterning processes are also required to complete the fabrication of the color filter substrate. The patterning process generally includes the processes of coating, masking, exposing, developing, and stripping of the photoresist, and each masking process requires the use of a mask, which is expensive. Therefore, the fabrication of the structure of the TFT-LCD requires a total of at least eight patterning processes, more manufacturing steps, and higher production costs. Summary of the invention
在本发明的一个实施例中， 提供一种 TFT阵列基板， 其包括： 基板； 在 所述基板上形成的栅极、栅线和遮光条；在所述栅极上依次形成的栅绝缘层、 半导体有源层、 相分离的源极和漏极以及沟道结构， 所述栅绝缘层与所述半 导体有源层相接触； 在所述源极和所述漏极上方形成的钝化层； 在所述栅绝 缘层上方形成的像素电极， 所述像素电极与所述漏极电连接； 以及位于所述 像素电极上方的至少一种原色滤光层。  In an embodiment of the present invention, a TFT array substrate is provided, including: a substrate; a gate, a gate line, and a light-shielding strip formed on the substrate; a gate insulating layer sequentially formed on the gate, a semiconductor active layer, a phase-separated source and drain, and a channel structure, the gate insulating layer is in contact with the semiconductor active layer; a passivation layer formed over the source and the drain; a pixel electrode formed over the gate insulating layer, the pixel electrode being electrically connected to the drain; and at least one primary color filter layer positioned above the pixel electrode.
在本发明的另一个实施例中， 提供一种液晶显示器， 其包括上述 TFT阵 列基板。  In another embodiment of the present invention, a liquid crystal display comprising the above-described TFT array substrate is provided.
在本发明的另一个实施例中， 提供一种 TFT阵列基板的制造方法， 用于 制造上述 TFT阵列基板， 所述方法包括： 在基板上沉积金属层， 通过执行第 一构图工艺而形成栅极、 栅线和遮光条； 在所述栅极、 所述栅线和所述遮光 条上依次沉积栅绝缘层、 半导体有源层和源漏极金属层， 通过执行第二构图 工艺而形成数据线、 相分离的源极和漏极以及沟道结构； 在所述基板上沉积 钝化层， 通过执行第三构图工艺而露出所述漏极； 在所述钝化层上沉积透明 导电薄膜层 , 通过执行构图工艺而形成像素电极以及位于所述像素电极上的 至少一种原色滤光层， 其中所述像素电极与所述漏极电连接。 附图说明 In another embodiment of the present invention, a method of fabricating a TFT array substrate is provided for Manufacturing the above TFT array substrate, the method comprising: depositing a metal layer on the substrate, forming a gate, a gate line, and a light shielding strip by performing a first patterning process; at the gate, the gate line, and the light shielding strip Depositing a gate insulating layer, a semiconductor active layer, and a source/drain metal layer in sequence, forming a data line, a phase separated source and drain, and a channel structure by performing a second patterning process; depositing passivation on the substrate a layer, exposing the drain by performing a third patterning process; depositing a transparent conductive film layer on the passivation layer, forming a pixel electrode by performing a patterning process, and at least one primary color filter on the pixel electrode a layer, wherein the pixel electrode is electrically connected to the drain. DRAWINGS
为了更清楚地说明本发明实施例的技术方案， 下面将对实施例的附图作 简单地介绍，显而易见地，下面描述中的附图仅仅涉及本发明的一些实施例， 而非对本发明的限制。  In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings of the embodiments will be briefly described below. It is obvious that the drawings in the following description relate only to some embodiments of the present invention, and are not intended to limit the present invention. .
图 1为本发明实施例提供的 TFT阵列基板的制造方法中执行第一构图工 艺之后的结构示意图；  1 is a schematic structural view of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a first patterning process;
图 2为本发明实施例提供的 TFT阵列基板的制造方法中执行第二构图工 艺之后的结构示意图；  2 is a schematic structural view of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a second patterning process;
图 3为本发明实施例提供的 TFT阵列基板的制造方法中执行第三构图工 艺之后的结构示意图；  3 is a schematic structural view of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a third patterning process;
图 4为本发明实施例提供的另一种 TFT阵列基板的制造方法中执行第三 构图工艺之后的结构示意图；  4 is a schematic structural view of a method for fabricating a TFT array substrate according to an embodiment of the present invention after performing a third patterning process;
图 5为本发明实施例提供的 TFT阵列基板的制造方法中执行第四构图工 艺之后的结构示意图；  5 is a schematic structural view of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a fourth patterning process;
图 6为本发明实施例提供的 TFT阵列基板的制造方法中执行第六构图工 艺之后的结构示意图。 具体实施方式  FIG. 6 is a schematic structural diagram of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a sixth patterning process. detailed description
为使本发明实施例的目的、 技术方案和优点更加清楚， 下面将结合本发 明实施例的附图，对本发明实施例的技术方案进行清楚、 完整地描述。显然， 所描述的实施例是本发明的一部分实施例， 而不是全部的实施例。 基于所描 述的本发明的实施例， 本领域普通技术人员在无需创造性劳动的前提下所获 得的所有其他实施例， 都属于本发明保护的范围。 The technical solutions of the embodiments of the present invention will be clearly and completely described in the following with reference to the accompanying drawings. It is apparent that the described embodiments are part of the embodiments of the invention, rather than all of the embodiments. Based on the described embodiments of the present invention, those of ordinary skill in the art can obtain without the need for creative labor. All other embodiments obtained are within the scope of the invention.
本发明的实施例提供一种 TFT阵列基板及其制造方法，其能够减少 TFT 液晶显示器的制造步骤， 降低生产成本。 本发明的实施例还提供一种包括上 述 TFT阵列基板的液晶显示器。  Embodiments of the present invention provide a TFT array substrate and a method of fabricating the same, which are capable of reducing manufacturing steps of a TFT liquid crystal display and reducing production costs. Embodiments of the present invention also provide a liquid crystal display including the above TFT array substrate.
实施例一  Embodiment 1
下面，参照图 1至图 6详细说明本发明的实施例提供的 TFT阵列基板的 制造方法。本发明的实施例提供的 TFT阵列基板的制造方法例如包括以下步 骤 S101至 S104。  Hereinafter, a method of manufacturing a TFT array substrate according to an embodiment of the present invention will be described in detail with reference to FIGS. 1 to 6. The manufacturing method of the TFT array substrate provided by the embodiment of the present invention includes the following steps S101 to S104, for example.
5101、 在基板上沉积金属层， 通过执行第一构图工艺而形成栅极、 栅线 和遮光条。  5101. Deposit a metal layer on the substrate, and form a gate, a gate line, and a light-shielding strip by performing a first patterning process.
图 1为本发明实施例提供的 TFT阵列基板的制造方法中执行第一构图工 艺之后的结构示意图。 如图 1所示， 首先， 釆用例如磁控溅射或者热蒸发的 方法， 在基板 201上沉积厚度为 500 A至 5000 A的金属层。  FIG. 1 is a schematic structural view of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a first patterning process. As shown in Fig. 1, first, a metal layer having a thickness of 500 Å to 5000 Å is deposited on the substrate 201 by, for example, magnetron sputtering or thermal evaporation.
在本发明的实施例中， 例如， 金属层的材料可以使用钨、 钛、 钼、 铝、 钕、 铝镍合金、 钼钨合金、 铬或铜等金属或合金形成， 也可使用上述几种材 料的组合形成；基板 201可釆用玻璃、石英或者其它非金属的导光材料形成。  In the embodiment of the present invention, for example, the material of the metal layer may be formed using a metal or an alloy such as tungsten, titanium, molybdenum, aluminum, tantalum, aluminum-nickel alloy, molybdenum-tungsten alloy, chromium or copper, or several materials mentioned above may be used. The combination is formed; the substrate 201 can be formed of glass, quartz or other non-metallic light guiding material.
通过第一构图工艺，在基板 201上形成栅极 202、栅线（图 1中未标示）、 公共电极 203和遮光条（图 1中未标示） ， 同时还形成数据信号线（图 1中 未标示 ) 。  A gate electrode 202, a gate line (not shown in FIG. 1), a common electrode 203, and a light-shielding strip (not shown in FIG. 1) are formed on the substrate 201 by a first patterning process, and a data signal line is also formed (not shown in FIG. Mark).
在本发明的实施例中， 上述遮光条设置在像素电极的周边区域中， 与栅 极 202位于同一层， 对像素电极的边缘进行遮挡， 防止漏光现象的产生。 此 夕卜， 在本发明的一些实施例中， 当上述遮光条与公共电极进行连接时， 此遮 光条也可以实现存储电容的底电极的功能。  In the embodiment of the present invention, the light-shielding strip is disposed in the peripheral region of the pixel electrode and is disposed in the same layer as the gate electrode 202 to block the edge of the pixel electrode to prevent light leakage. Further, in some embodiments of the present invention, when the light shielding strip is connected to the common electrode, the light shielding strip can also function as a bottom electrode of the storage capacitor.
5102、 在栅极、 栅线、 公共电极和遮光条上依次沉积栅绝缘层、 半导体 有源层及源漏极金属层， 通过执行第二构图工艺而形成数据线、 相分离的源 极和漏极以及沟道结构。  5102. sequentially depositing a gate insulating layer, a semiconductor active layer, and a source/drain metal layer on the gate, the gate line, the common electrode, and the light-shielding strip, and forming a data line, a phase-separated source and a drain by performing a second patterning process Pole and channel structure.
图 2为本发明实施例提供的 TFT阵列基板的制造方法中执行第二构图工 艺之后的结构示意图。 如图 2所示， 首先， 使用例如等离子体增强化学气相 沉积（PECVD ) 的方法在基板 201上沉积厚度为 1000A至 7000A的薄膜作 为栅绝缘层 204 ,栅绝缘层 204覆盖栅极 202、栅线、公共电极 203和遮光条。 栅绝缘层 204可以釆用氧化物、 氮化物或氮氧化物形成。 在形成有栅绝缘层 204的基板 201上可以使用化学沉积的方法依次沉积厚度为 1000A至 7000A 的半导体有源层 205和厚度为 500A至 6000A的欧姆接触层 208。 在本发明 的一些实施例中， 为了减小 TFT 区域的寄生电容， 可以在即将形成的 TFT 结构允许的情况下适当增加欧姆接触层 208的膜厚。 然后， 再使用例如磁控 溅射或者热蒸发的方法在基板 201上沉积厚度为 500 A至 5000 A的源漏金属 层， 该源漏金属层可以使用铬、 钨、 钛、 铊、 钼、 铝、 铜等金属或其合金形 成。 2 is a schematic structural view of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a second patterning process. As shown in FIG. 2, first, a film having a thickness of 1000 A to 7000 A is deposited as a gate insulating layer 204 on a substrate 201 by a method such as plasma enhanced chemical vapor deposition (PECVD), and the gate insulating layer 204 covers the gate electrode 202 and the gate line. , the common electrode 203 and the light shielding strip. The gate insulating layer 204 may be formed using an oxide, a nitride or an oxynitride. A semiconductor active layer 205 having a thickness of 1000 A to 7000 A and an ohmic contact layer 208 having a thickness of 500 A to 6000 A may be sequentially deposited on the substrate 201 on which the gate insulating layer 204 is formed by a chemical deposition method. In some embodiments of the present invention, in order to reduce the parasitic capacitance of the TFT region, the film thickness of the ohmic contact layer 208 may be appropriately increased in the case where the TFT structure to be formed allows. Then, a source-drain metal layer having a thickness of 500 A to 5000 A is deposited on the substrate 201 by, for example, magnetron sputtering or thermal evaporation, and the source/drain metal layer may be made of chromium, tungsten, titanium, tantalum, molybdenum, aluminum. A metal such as copper or an alloy thereof.
在本发明的实施例中， 栅绝缘层 204可以选用氧化物、 氮化物或氧氮化 物形成，对应的反应气体可以为 Si¾、 N¾、 N2的混合气体或 SiH2Cl2、 N¾、 N2的混合气体； 半导体有源层 205可以为非晶硅薄膜， 对应的反应气体可以 是 Si¾、 N2的混合气体或 Si¾、 Cl2、 N2的混合气体， 然而本发明的实施例 不限于此。 In an embodiment of the present invention, the gate insulating layer 204 can be oxide, nitride or oxynitride is formed, corresponding to the reaction gas may be Si¾, N¾, N 2 or a mixed gas of SiH 2 Cl 2, N¾, N 2 The semiconductor active layer 205 may be an amorphous silicon film, and the corresponding reaction gas may be a mixed gas of Si 3⁄4, N 2 or a mixed gas of Si 3⁄4, Cl 2 , N 2 , but embodiments of the present invention are not limited thereto. .
在沉积有栅绝缘层 204、半导体有源层 205、欧姆接触层 208和源漏金属 层的基板 201上涂敷光刻胶层， 釆用带有狭缝的半色调或灰色掩模板对光刻 胶层进行曝光， 以形成完全曝光区、 部分曝光区以及非曝光区， 完全曝光区 对应于像素区域中除了 TFT区域以外的其它区域，部分曝光区域对应于沟道 区域（图 2中未标示） ， 非曝光区域对应于其它区域， 即对应于数据线（图 2中未标示） 、 源极 206和漏极 207的区域。 在显影过程完成之后， 完全曝 光区的光刻胶被完全去除， 非曝光区的光刻胶被完全保留， 部分曝光区的光 刻胶被部分地保留。  A photoresist layer is coated on the substrate 201 on which the gate insulating layer 204, the semiconductor active layer 205, the ohmic contact layer 208, and the source/drain metal layer are deposited, and the photolithography is performed by using a halftone or gray mask with slits. The glue layer is exposed to form a fully exposed area, a partially exposed area, and a non-exposed area, and the fully exposed area corresponds to a region other than the TFT area in the pixel area, and the partially exposed area corresponds to the channel area (not shown in FIG. 2) The non-exposed areas correspond to other areas, that is, areas corresponding to the data lines (not shown in FIG. 2), the source 206, and the drain 207. After the development process is completed, the photoresist in the fully exposed region is completely removed, the photoresist in the non-exposed region is completely retained, and the photoresist in the partially exposed region is partially retained.
接下来， 通过刻蚀工艺， 刻蚀掉完全曝光区的源漏金属层、 欧姆接触层 208以及半导体有源层 205, 以形成数据线（图 2中未标示）； 然后， 通过灰 化工艺， 去除掉部分曝光区的光刻胶， 以露出沟道区域的源漏金属层； 再通 过刻蚀工艺， 刻蚀掉部分曝光区的源漏金属层、 欧姆接触层 208及部分半导 体有源层 205 , 以形成源极 206、 漏极 207以及沟道结构； 最后， 对光刻胶进 行剥离， 形成图 2所示的结构。  Next, the source/drain metal layer, the ohmic contact layer 208, and the semiconductor active layer 205 of the fully exposed region are etched away by an etching process to form a data line (not shown in FIG. 2); and then, through an ashing process, The photoresist in the partially exposed region is removed to expose the source/drain metal layer of the channel region; and the source/drain metal layer, the ohmic contact layer 208 and the portion of the semiconductor active layer 205 of the partially exposed region are etched away by an etching process. To form the source 206, the drain 207, and the channel structure; finally, the photoresist is stripped to form the structure shown in FIG.
S103、 在基板上沉积钝化层， 通过执行第三构图工艺而露出漏极。  S103. Depositing a passivation layer on the substrate, and exposing the drain by performing a third patterning process.
需要说明的是， 执行第三构图工艺的目的就是露出漏极， 这样使得之后 形成的像素电极与漏极电连接。 露出漏极的方法有多种， 例如， 可以将像素 区域内的除了 TFT区域之外的其它区域的部分钝化层全部刻蚀掉，也可以在 钝化层中形成过孔， 本发明的实施例不限于此。 It should be noted that the purpose of performing the third patterning process is to expose the drain such that the pixel electrode formed later is electrically connected to the drain. There are various ways to expose the drain, for example, pixels can be The partial passivation layers of the regions other than the TFT region in the region are all etched away, and via holes may also be formed in the passivation layer, and embodiments of the present invention are not limited thereto.
图 3为本发明实施例提供的 TFT阵列基板的制造方法中执行第三构图工 艺之后的结构示意图。 如图 3所示， 首先， 釆用例如等离子体增强化学气相 沉积（PECVD ) 的方法， 在经过上述处理的基板 201 上沉积厚度为 1000A 至 7000A的薄膜作为栅极的钝化层 209; 然后， 涂敷光刻胶层并且釆用普通 的掩膜板对其进行曝光， 再经过显影和刻蚀的过程之后将像素区域内的除了 TFT区域之外的其它区域的部分钝化层 209全部刻蚀掉， 并且露出漏极 207 的部分区域； 最后， 再对光刻胶进行剥离， 从而完成第三构图工艺。  FIG. 3 is a schematic structural diagram of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a third patterning process. As shown in FIG. 3, first, a film having a thickness of 1000 A to 7000 A is deposited as a gate passivation layer 209 on the substrate 201 subjected to the above treatment by, for example, plasma enhanced chemical vapor deposition (PECVD); The photoresist layer is coated and exposed by a common mask, and then a part of the passivation layer 209 in the pixel region except the TFT region is completely etched after the development and etching process. The portion of the drain 207 is exposed and exposed; finally, the photoresist is stripped to complete the third patterning process.
在本发明的实施例中， 钝化层 209可以选用氧化物、 氮化物或氮氧化物 形成， 对应的反应气体可以为 Si¾、 N¾、 N2的混合气体或 Si¾Cl2、 N¾、 N2的混合气体。 In an embodiment of the present invention, the passivation layer 209 can be oxide, nitride or oxynitride is formed, corresponding to the reaction gas may be N¾, N mixed Si¾, N¾, N 2 or a mixed gas Si¾Cl 2, 2 of gas.
需要说明的是， 在存在公共电极 203的结构中， 可以适当调整栅绝缘层 204 的膜厚， 保证器件区与像素区之间具有合理的高度差， 从而减小公共电 极线对高度的影响。  It should be noted that in the structure in which the common electrode 203 is present, the film thickness of the gate insulating layer 204 can be appropriately adjusted to ensure a reasonable height difference between the device region and the pixel region, thereby reducing the influence of the common electrode line on the height.
图 4为本发明实施例提供的另一种 TFT阵列基板的制造方法中执行第三 构图工艺之后的结构示意图， 图 4所示的显影和刻蚀之前的步骤与图 3所示 的第三构图工艺中的相应步骤相同， 但在显影和刻蚀的过程中， 可以将漏极 207上方的部分钝化层 209刻蚀掉， 以在钝化层 209中形成过孔， 通过该过 孔可以实现之后形成的像素电极与漏极 207之间的电连接。  4 is a schematic structural view of a method for fabricating a TFT array substrate according to an embodiment of the present invention, after performing a third patterning process, the steps before development and etching shown in FIG. 4 and the third composition shown in FIG. The corresponding steps in the process are the same, but during development and etching, a portion of the passivation layer 209 over the drain 207 may be etched away to form vias in the passivation layer 209 through which vias may be implemented. The electrical connection between the pixel electrode and the drain 207 is then formed.
S104、 在钝化层上沉积透明导电薄膜层， 通过执行构图工艺而形成像素 电极及位于像素电极上的至少一种原色滤光层， 其中， 像素电极与漏极电连 接。  S104, depositing a transparent conductive film layer on the passivation layer, and forming a pixel electrode and at least one primary color filter layer on the pixel electrode by performing a patterning process, wherein the pixel electrode is electrically connected to the drain.
在本发明的实施例中， 通过执行构图工艺， 在形成位于像素电极上的至 少一种原色滤光层的同时形成像素电极，相对于现有技术， 减少了 TFT-LCD 的制造过程中使用掩模板的次数， 因此减少了 TFT-LCD的制造步骤， 降低 了生产成本。  In an embodiment of the present invention, by performing a patterning process, a pixel electrode is formed while forming at least one primary color filter layer on the pixel electrode, and the mask is reduced in the manufacturing process of the TFT-LCD compared to the prior art. The number of stencils thus reduces the manufacturing steps of the TFT-LCD and reduces the production cost.
在本发明的实施例中， 步骤 S104可以进一步包括以下步骤：  In an embodiment of the present invention, step S104 may further include the following steps:
S1041、 在透明导电薄膜层上， 沉积原色光刻胶层， 所述原色可以是红 色、 绿色或者蓝色， 也可以是设计者需要的其它色彩； 51042、 通过半色调或灰色调掩模板对光刻胶层进行曝光， 以形成非曝 光区、 部分曝光区和完全曝光区， 其中， 非曝光区对应于透明导电薄膜层上 具有原色滤光层的预设位置， 部分曝光区对应于透明导电薄膜层上具有非原 色滤光层的预设位置， 完全曝光区对应于除了部分曝光区和非曝光区之外的 其它区域， 即 TFT区域； S1041, depositing a primary color photoresist layer on the transparent conductive film layer, the primary color may be red, green or blue, or may be other colors required by the designer; 51042, exposing the photoresist layer through a halftone or gray tone mask to form a non-exposed area, a partial exposure area, and a full exposure area, wherein the non-exposure area corresponds to a primary color filter layer on the transparent conductive film layer a preset position, the partial exposure area corresponds to a preset position on the transparent conductive film layer having a non-primary color filter layer, and the full exposure area corresponds to a region other than the partially exposed area and the non-exposed area, that is, the TFT area;
51043、 显影后， 对位于完全曝光区的透明导电薄膜层进行刻蚀， 以形 成像素电极； 以及  51043. After development, etching the transparent conductive film layer in the fully exposed region to form a pixel electrode;
51044、 对位于部分曝光区的光刻胶进行灰化处理， 保留位于非曝光区 的原色光刻胶。  51044. The photoresist located in the partially exposed region is subjected to ashing treatment to retain the primary color photoresist located in the non-exposed region.
下面以红色光刻胶为例对上述步骤进行说明。 图 5为本发明实施例提供 的 TFT阵列基板的制造方法中执行第四构图工艺之后的结构示意图。 如图 5 所示，在执行第三构图工艺之后，通过釆用例如磁控溅射或者热蒸发的方法， 在基板 201上沉积厚度为 100A至 1000A的透明导电薄膜层， 该透明导电薄 膜层可以釆用氧化铟锡、 氧化铟辞或氧化铝辞， 也可以釆用其它金属或者金 属氧化物。 然后， 在透明导电薄膜层上涂敷红色光刻胶薄膜， 当第三构图工 艺中除了 TFT区域的其它区域中的部分钝化层 209被刻蚀掉时，第四构图工 艺中涂敷的红色光刻胶的厚度在像素区域内无钝化层 209的部分大于 TFT区 域（具有钝化层 209 ) 的部分。 接下来， 釆用具有狭缝的半色调或灰色调掩 模板进行曝光， 以形成非曝光区、 部分曝光区和完全曝光区， 其中， 非曝光 区对应于透明导电薄膜层上具有红色滤光层的预设位置， 部分曝光区对应于 透明导电薄膜层上具有非红色滤光层的预设位置， 完全曝光区对应于除了部 分曝光区和非曝光区之外的其它区域， 即 TFT区域。 接下来， 进行显影， 以 将完全曝光区的红色光刻胶去除， 露出透明导电薄膜层， 然后通过刻蚀工艺 将完全曝光区的透明导电薄膜层刻蚀掉， 形成像素电极 210。 在显影之后， 部分曝光区的光刻胶被部分地去除， 从而使其厚度减小。 接下来， 对位于部 分曝光区的光刻胶进行灰化处理，同时对非曝光区的光刻胶也进行灰化处理。 在灰化处理之后， 部分曝光区的光刻胶被完全去除， 而非曝光区的光刻胶的 厚度减小， 对像素电极 210上保留的红色光刻胶不进行剥离， 以形成红色滤 光层 211。  The above steps will be described below by taking a red photoresist as an example. FIG. 5 is a schematic structural diagram of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a fourth patterning process. As shown in FIG. 5, after performing the third patterning process, a transparent conductive film layer having a thickness of 100A to 1000A is deposited on the substrate 201 by, for example, magnetron sputtering or thermal evaporation, and the transparent conductive film layer can be The use of indium tin oxide, indium oxide or aluminum oxide can also be used with other metals or metal oxides. Then, a red photoresist film is coated on the transparent conductive film layer, and the red color is applied in the fourth patterning process when a part of the passivation layer 209 in the other region except the TFT region is etched away in the third patterning process. The thickness of the photoresist is greater in the pixel region than the portion of the TFT region (having the passivation layer 209). Next, the exposure is performed by using a halftone or gray tone mask having slits to form a non-exposed area, a partially exposed area, and a fully exposed area, wherein the non-exposed area corresponds to a red filter layer on the transparent conductive film layer. The preset position, the partial exposure area corresponds to a preset position on the transparent conductive film layer having a non-red filter layer, and the full exposure area corresponds to a region other than the partially exposed area and the non-exposed area, that is, the TFT area. Next, development is performed to remove the red photoresist in the fully exposed region to expose the transparent conductive film layer, and then the transparent conductive film layer in the fully exposed region is etched away by an etching process to form the pixel electrode 210. After development, the photoresist of the partially exposed region is partially removed, thereby reducing its thickness. Next, the photoresist located in the partially exposed region is subjected to ashing treatment, and the photoresist in the non-exposed region is also subjected to ashing treatment. After the ashing process, the photoresist in the partially exposed region is completely removed, and the thickness of the photoresist in the non-exposed region is reduced, and the red photoresist remaining on the pixel electrode 210 is not peeled off to form a red filter. Layer 211.
在第四构图工艺中完成刻蚀之后， 像素电极上方的光刻胶不需进行剥离 处理， 因此缩短了生产周期， 同时， 光刻胶预先经过染色处理， 可以作为彩 膜的部分结构作光线的调色之用， 增大了材料的利用率， 降低了成本。 After the etching is completed in the fourth patterning process, the photoresist above the pixel electrode does not need to be stripped. The processing shortens the production cycle. At the same time, the photoresist is dyed beforehand, and can be used as a part of the color film for color grading, which increases the utilization rate of the material and reduces the cost.
如果上述 TFT 阵列基板在与彩膜基板对盒成型后形成为具有三原色的 TFT-LCD,可以在该 TFT阵列基板上继续以原色光刻胶制造滤光层。这里以 绿色和蓝色光刻胶为例进行说明， 但是本发明的实施例不限于此。  If the TFT array substrate is formed into a TFT-LCD having three primary colors after being formed into a box with the color filter substrate, the filter layer can be continuously formed on the TFT array substrate with the primary color photoresist. Here, the green and blue photoresists are exemplified, but the embodiment of the present invention is not limited thereto.
在本发明的实施例中， 例如， 在基板上沉积绿色光刻胶层， 通过执行第 五构图工艺的曝光、 显影、 烘烤处理， 形成绿色滤光层； 然后， 在基板上沉 积蓝色光刻胶层， 通过执行第六构图工艺的曝光、 显影、 烘烤处理， 形成蓝 色滤光层。 在本发明的实施例中， 绿色光刻胶层和蓝色光刻胶层的第五和第 六构图工艺与现有技术中的彩膜工艺实质上相同或相近，因此这里不再赘述。  In an embodiment of the present invention, for example, a green photoresist layer is deposited on the substrate, and a green filter layer is formed by performing exposure, development, and baking processes of a fifth patterning process; then, blue light is deposited on the substrate. The glue layer is formed, and a blue filter layer is formed by performing exposure, development, and baking treatment of the sixth patterning process. In the embodiment of the present invention, the fifth and sixth patterning processes of the green photoresist layer and the blue photoresist layer are substantially the same as or similar to those of the prior art color film process, and thus will not be described herein.
在执行第五和第六构图工艺之后， 如图 6所示， 在像素电极 210上形成 了红色滤光层 211、 绿色滤光层 212、 蓝色滤光层 213 , 三者可以作为彩膜构 件作光线的调色之用， 其作用与彩膜基板上的滤光层的作用实质上相同或相 近。  After the fifth and sixth patterning processes are performed, as shown in FIG. 6, a red filter layer 211, a green filter layer 212, and a blue filter layer 213 are formed on the pixel electrode 210, and the three can be used as color film members. For the coloring of light, its effect is substantially the same as or similar to that of the filter layer on the color filter substrate.
在本发明的实施例中， 步骤 S104也可以进一步包括以下步骤：  In an embodiment of the present invention, step S104 may further include the following steps:
51045、 在透明导电薄膜层上， 沉积原色光刻胶层；  51045, depositing a primary color photoresist layer on the transparent conductive film layer;
51046、 通过构图工艺对原色光刻胶层进行曝光、 显影、 烘烤处理， 形 成第一原色滤光层， 其中， 第一原色滤光层位于透明导电薄膜层上具有第一 原色滤光层的预设位置；  51046, exposing, developing, and baking the primary color photoresist layer by a patterning process to form a first primary color filter layer, wherein the first primary color filter layer is located on the transparent conductive film layer and has a first primary color filter layer Preset position
S1047、 重复上述原色光刻胶的沉积、 曝光、 显影、 烘烤处理， 形成第 n 原色滤光层， 其中， n为正整数， 第 n原色滤光层位于透明导电薄膜层上具 有第 n原色滤光层的预设位置； 以及  S1047, repeating deposition, exposure, development, and baking treatment of the primary color photoresist to form an nth primary color filter layer, wherein n is a positive integer, and the nth primary color filter layer has an nth primary color on the transparent conductive film layer The preset position of the filter layer;
S1048、 对暴露在原色滤光层之间的透明导电薄膜层进行刻蚀， 以形成 像素电极。  S1048, etching a transparent conductive film layer exposed between the primary color filter layers to form a pixel electrode.
下面， 以红、 绿、 蓝色三原色光刻胶为例进行说明。  Hereinafter, the red, green, and blue primary color photoresists will be described as an example.
首先， 在透明导电薄膜层上， 沉积红色光刻胶层， 通过曝光、 显影、 烘 烤处理， 形成红色滤光层。 在本发明的实施例中， 例如， 通过釆用磁控溅射 方法在基板上沉积透明导电薄膜层之后， 沉积一层红色光刻胶层， 釆用普通 掩模板对红色光刻胶层进行曝光， 使红色光刻胶层形成完全曝光区和非曝光 区， 非曝光区对应于透明导电薄膜层上具有红色滤光层的预设位置， 完全曝 光区对应于除了非曝光区之外的其它区域； 然后， 执行显影处理， 从而使完 全曝光区的红色光刻胶被完全去除， 非曝光区域的红色光刻胶全部保留， 烘 烤处理后形成红色滤光层。 在本发明的实施例中， 上述构图工艺与现有技术 中形成彩膜基板中的彩膜的工艺实质上相同或相近， 因此这里不再详述。 First, a red photoresist layer is deposited on the transparent conductive film layer, and a red filter layer is formed by exposure, development, and baking treatment. In an embodiment of the present invention, for example, after depositing a transparent conductive film layer on a substrate by a magnetron sputtering method, a red photoresist layer is deposited, and the red photoresist layer is exposed by a common mask. , the red photoresist layer is formed into a fully exposed area and a non-exposed area, and the non-exposed area corresponds to a preset position having a red filter layer on the transparent conductive film layer, completely exposed The light region corresponds to a region other than the non-exposed region; then, development processing is performed, so that the red photoresist in the completely exposed region is completely removed, and the red photoresist in the non-exposed region is completely retained, and is formed after the baking treatment Red filter layer. In the embodiment of the present invention, the above-mentioned patterning process is substantially the same as or similar to the process of forming the color film in the color filter substrate in the prior art, and thus will not be described in detail herein.
接下来， 在基板上， 沉积绿色光刻胶层， 通过曝光、 显影、 烘烤处理， 形成绿色滤光层。 在本发明的实施例中， 形成绿色滤光层的步骤除了光刻胶 为绿色外，其它工艺与上述红色滤光层的构图工艺相同， 因此这里不再赘述。  Next, a green photoresist layer is deposited on the substrate, and a green filter layer is formed by exposure, development, and baking treatment. In the embodiment of the present invention, the step of forming the green filter layer is the same as the patterning process of the red filter layer except that the photoresist is green, and therefore will not be described herein.
接下来， 在基板上， 沉积蓝色光刻胶层， 通过曝光、 显影、 烘烤处理， 形成蓝色滤光层。 在本发明的实施例中， 形成蓝色滤光层的步骤除了光刻胶 为蓝色外，其它工艺与上述红色滤光层的构图工艺相同， 因此这里不再赘述。  Next, a blue photoresist layer is deposited on the substrate, and a blue filter layer is formed by exposure, development, and baking treatment. In the embodiment of the present invention, the step of forming the blue filter layer is the same as the patterning process of the red filter layer described above except that the photoresist is blue, and therefore will not be described herein.
之后， 对暴露在原色滤光层之间的透明导电薄膜层进行刻蚀， 以形成像 素电极。  Thereafter, the transparent conductive film layer exposed between the primary color filter layers is etched to form a pixel electrode.
如图 6所示， 在执行步骤 S1045至 S1048之后形成原色滤光层， 该原色 滤光层可以包括红色滤光层 211、绿色滤光层 212和蓝色滤光层 213。在本发 明的实施例中， 在像素电极 210上形成的红色滤光层 211、 绿色滤光层 212 和蓝色滤光层 213 , 三者可以作为彩膜构件作光线的调色之用， 其作用与彩 膜基板上的滤光层的作用实质上相同或相近。  As shown in FIG. 6, a primary color filter layer is formed after performing steps S1045 to S1048, and the primary color filter layer may include a red filter layer 211, a green filter layer 212, and a blue filter layer 213. In the embodiment of the present invention, the red filter layer 211, the green filter layer 212, and the blue filter layer 213 formed on the pixel electrode 210 can be used as a color filter member for color grading. The effect is substantially the same as or similar to the effect of the filter layer on the color filter substrate.
需要说明的是， 在本发明的实施例中， 在上述 TFT阵列基板的像素电极 上也可以釆用本发明实施例提供的方法形成多种原色滤光层， 并且这些原色 可以根据具体情况而定， 可以是红色、 绿色、 蓝色、 黄色或者设计者需要的 其它色彩。  It should be noted that, in the embodiment of the present invention, a plurality of primary color filter layers may be formed on the pixel electrode of the TFT array substrate by using the method provided by the embodiment of the present invention, and the primary colors may be determined according to specific conditions. It can be red, green, blue, yellow or other colors that the designer needs.
在本发明的实施例中， 上述 TFT阵列基板的制造方法还可以包括： 在原 色滤光层上沉积遮光性材料， 通过执行第七构图工艺而形成黑矩阵。  In an embodiment of the invention, the method for fabricating the TFT array substrate may further include: depositing a light-shielding material on the primary color filter layer, and forming a black matrix by performing a seventh patterning process.
当在 TFT阵列基板上形成有黑矩阵时，在彩膜基板和阵列基板的对盒过 程中， 不会因受到外力作用而发生阵列基板和彩膜基板错位的情况， 可以避 免产生漏光现象， 保证了显示图像的质量； 此外， 具有三原色的 TFT-LCD 的制造方法中构图工艺的次数可以由 8次减为 7次， 从而减少了制造步骤。  When a black matrix is formed on the TFT array substrate, in the process of pairing the color filter substrate and the array substrate, the array substrate and the color film substrate are not displaced due to external force, and light leakage can be avoided. In addition, the number of patterning processes in the manufacturing method of the TFT-LCD having the three primary colors can be reduced from 8 times to 7 times, thereby reducing the number of manufacturing steps.
如上所述，本发明实施例提供的 TFT阵列基板的制造方法通过构图工艺 在形成位于像素电极上的至少一种原色滤光层的同时形成像素电极， 相对于 现有技术， 减少了 TFT-LCD 制造过程中使用掩模板的次数， 因此减少了 TFT-LCD的制造步骤， 降低了生产成本。 此外， 原色滤光层的色彩种类可以 调节。另外， 当在 TFT阵列基板上形成有黑矩阵时，可以避免产生漏光现象， 保证了显示图像的质量。 As described above, the manufacturing method of the TFT array substrate provided by the embodiment of the present invention forms a pixel electrode while forming at least one primary color filter layer on the pixel electrode by a patterning process, and the TFT-LCD is reduced compared with the prior art. The number of times the mask is used in the manufacturing process, thus reducing The manufacturing steps of the TFT-LCD reduce the production cost. In addition, the color type of the primary color filter layer can be adjusted. In addition, when a black matrix is formed on the TFT array substrate, light leakage can be avoided, and the quality of the displayed image is ensured.
实施例二  Embodiment 2
下面参照图 6详细说明本发明实施例提供的 TFT阵列基板。如图 6所示， 本发明实施例提供的 TFT阵列基板包括： 基板 201 ; 在基板 201上形成的栅 极 202、 栅线（图中未标示 )和遮光条（图中未标示 ) ； 在栅极 202上形成 的栅绝缘层 204、半导体有源层 205、相分离的源极 206和漏极 207以及沟道 结构（图中未标示 ) ,栅绝缘层 204与半导体有源层 205相接触； 在源极 206 和漏极 207上方形成的钝化层 209;在栅绝缘层 204上方形成的像素电极 210, 像素电极 210与漏极 207电连接； 以及位于像素电极上方的至少一种原色滤 光层。  The TFT array substrate provided by the embodiment of the present invention will be described in detail below with reference to FIG. As shown in FIG. 6, the TFT array substrate provided by the embodiment of the present invention includes: a substrate 201; a gate electrode 202 formed on the substrate 201, a gate line (not shown), and a light shielding strip (not shown); a gate insulating layer 204, a semiconductor active layer 205, a phase separated source 206 and a drain 207, and a channel structure (not shown) formed on the electrode 202, and the gate insulating layer 204 is in contact with the semiconductor active layer 205; a passivation layer 209 formed over the source 206 and the drain 207; a pixel electrode 210 formed over the gate insulating layer 204, the pixel electrode 210 is electrically connected to the drain 207; and at least one primary color filter located above the pixel electrode Floor.
在本发明的实施例中，在 TFT阵列基板上也可以设置有欧姆接触层 208, 半导体有源层 205可以与欧姆接触层 208相接触； 此外， 欧姆接触层 208分 别与源极 206、 漏极 207及沟道结构相接触。  In an embodiment of the present invention, an ohmic contact layer 208 may also be disposed on the TFT array substrate, and the semiconductor active layer 205 may be in contact with the ohmic contact layer 208; further, the ohmic contact layer 208 and the source 206 and the drain, respectively. 207 is in contact with the channel structure.
在本发明的实施例中， 在 TFT阵列基板上也可以设置有公共电极 203 , 像素电极 210设置在公共电极 203 上方， 并且在二者之间设置有栅绝缘层 204。  In the embodiment of the present invention, a common electrode 203 may be disposed on the TFT array substrate, and the pixel electrode 210 is disposed above the common electrode 203 with a gate insulating layer 204 disposed therebetween.
在本发明的实施例中， 原色滤光层（彩色滤光层） 包括原色光刻胶。 例 如， 原色滤光层可以包括红色滤光层 211、 绿色滤光层 212、 蓝色滤光层 213 等。  In an embodiment of the invention, the primary color filter layer (color filter layer) comprises a primary color photoresist. For example, the primary color filter layer may include a red filter layer 211, a green filter layer 212, a blue filter layer 213, and the like.
在本发明的实施例中， 原色滤光层上方可以形成有黑矩阵。  In an embodiment of the invention, a black matrix may be formed over the primary color filter layer.
需要说明的是， 像素电极 210与漏极 207的电连接结构可以通过将除了 TFT区域的其它区域的部分钝化层 209全部刻蚀掉而实现， 也可以通过在钝 化层 209中形成过孔而实现。  It should be noted that the electrical connection structure of the pixel electrode 210 and the drain electrode 207 can be realized by completely etching away part of the passivation layer 209 except for other regions of the TFT region, or by forming a via hole in the passivation layer 209. And realized.
如上所述， 在本发明实施例提供的 TFT阵列基板中， 将原色滤光层制造 在像素电极之上， 减少了 TFT-LCD的制造步骤， 降低了生产成本。 此外， 原色滤光层的种类可以调节。 另外， 当在 TFT阵列基板上形成有黑矩阵时， 可以避免产生漏光现象， 保证了显示图像的质量。  As described above, in the TFT array substrate provided by the embodiment of the present invention, the primary color filter layer is formed on the pixel electrode, which reduces the manufacturing steps of the TFT-LCD and reduces the production cost. In addition, the type of the primary color filter layer can be adjusted. In addition, when a black matrix is formed on the TFT array substrate, light leakage can be avoided, and the quality of the displayed image is ensured.
本发明实施例还提供一种液晶显示器， 其包括本发明实施例提供的任一 种 TFT阵列基板。 An embodiment of the present invention further provides a liquid crystal display, which includes any of the embodiments provided by the embodiments of the present invention. A TFT array substrate.
以上实施例仅用以说明本发明的技术方案， 而非对其限制； 尽管参照前 述实施例对本发明进行了详细的说明， 本领域的普通技术人员应当理解： 其 依然可以对前述各实施例所记载的技术方案进行修改， 或者对其中部分技术 特征进行等同替换； 而这些修改或者替换， 并不使相应技术方案的本质脱离 本发明各实施例技术方案的精神和范围。  The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to be limiting; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that The technical solutions are described as being modified, or equivalents are replaced by some of the technical features; and such modifications or substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

权利要求书 Claim
1、 一种薄膜晶体管 （TFT ) 阵列基板， 包括： A thin film transistor (TFT) array substrate, comprising:
基板；  Substrate
在所述基板上形成的栅极、 栅线和遮光条；  a gate, a gate line, and a light blocking strip formed on the substrate;
在所述栅极上依次形成的栅绝缘层、 半导体有源层、 相分离的源极和漏 极以及沟道结构， 所述栅绝缘层与所述半导体有源层相接触；  a gate insulating layer, a semiconductor active layer, phase-separated source and drain electrodes, and a channel structure sequentially formed on the gate, the gate insulating layer being in contact with the semiconductor active layer;
在所述源极和所述漏极上方形成的钝化层；  a passivation layer formed over the source and the drain;
在所述栅绝缘层上方形成的像素电极，所述像素电极与所述漏极电连接； 以及  a pixel electrode formed over the gate insulating layer, the pixel electrode being electrically connected to the drain;
位于所述像素电极上方的至少一种原色滤光层。  At least one primary color filter layer located above the pixel electrode.
2、 根据权利要求 1所述的薄膜晶体管阵列基板， 其中，  2. The thin film transistor array substrate according to claim 1, wherein
所述原色滤光层由原色光刻胶形成。  The primary color filter layer is formed of a primary color photoresist.
3、 根据权利要求 1或 2所述的薄膜晶体管阵列基板， 还包括： 在所述原色滤光层上方形成的黑矩阵。  The thin film transistor array substrate according to claim 1 or 2, further comprising: a black matrix formed over the primary color filter layer.
4、 根据权利要求 1至 3中任一项所述的薄膜晶体管阵列基板， 还包括： 在所述半导体有源层与所述漏极和所述源极之间形成的欧姆接触层。 The thin film transistor array substrate according to any one of claims 1 to 3, further comprising: an ohmic contact layer formed between the semiconductor active layer and the drain and the source.
5、一种液晶显示器， 包括根据权利要求 1至 4中任一项所述的薄膜晶体 管阵列基板。 A liquid crystal display comprising the thin film transistor array substrate according to any one of claims 1 to 4.
6、一种薄膜晶体管阵列基板的制造方法，用于制造根据权利要求 1所述 的薄膜晶体管阵列基板， 所述方法包括：  A method of fabricating a thin film transistor array substrate for fabricating the thin film transistor array substrate according to claim 1, the method comprising:
在基板上沉积金属层， 通过执行第一构图工艺而形成栅极、 栅线和遮光 条；  Depositing a metal layer on the substrate, forming a gate, a gate line, and a light-shielding strip by performing a first patterning process;
在所述栅极、 所述栅线和所述遮光条上依次沉积栅绝缘层、 半导体有源 层和源漏极金属层， 通过执行第二构图工艺而形成数据线、 相分离的源极和 漏极以及沟道结构；  Depositing a gate insulating layer, a semiconductor active layer, and a source/drain metal layer on the gate, the gate line, and the light-shielding strip, forming a data line, a phase-separated source, and a second patterning process Drain and channel structure;
在所述基板上沉积钝化层， 通过执行第三构图工艺而露出所述漏极； 在所述钝化层上沉积透明导电薄膜层， 通过执行构图工艺而形成像素电 极以及位于所述像素电极上的至少一种原色滤光层， 其中所述像素电极与所 述漏极电连接。 Depositing a passivation layer on the substrate, exposing the drain by performing a third patterning process; depositing a transparent conductive thin film layer on the passivation layer, forming a pixel electrode by performing a patterning process, and positioning the pixel electrode At least one primary color filter layer thereon, wherein the pixel electrode is electrically connected to the drain.
7、根据权利要求 6所述的薄膜晶体管阵列基板的制造方法， 其中， 通过 执行构图工艺而形成像素电极以及位于所述像素电极上的至少一种原色滤光 层包括： The method of manufacturing a thin film transistor array substrate according to claim 6, wherein the forming the pixel electrode by performing the patterning process and the at least one primary color filter layer on the pixel electrode comprises:
在所述透明导电薄膜层上， 沉积原色光刻胶层；  Depositing a primary color photoresist layer on the transparent conductive film layer;
通过半色调掩模板或灰色调掩模板对所述原色光刻胶层进行曝光， 以形 成未曝光区、 部分曝光区和完全曝光区， 其中， 所述非曝光区对应于所述透 明导电薄膜层上的具有所述原色滤光层的预设位置， 所述部分曝光区对应于 所述透明导电薄膜层上的具有非原色滤光层的预设位置， 所述完全曝光区对 应于除了所述部分曝光区和所述非曝光区之外的其它区域；  The primary color photoresist layer is exposed through a halftone mask or a gray tone mask to form an unexposed region, a partially exposed region, and a fully exposed region, wherein the non-exposed region corresponds to the transparent conductive film layer a preset position having the primary color filter layer, the partial exposure area corresponding to a preset position on the transparent conductive film layer having a non-primary color filter layer, wherein the fully exposed area corresponds to the a portion of the exposed area and other areas than the non-exposed area;
在执行显影之后， 对位于所述完全曝光区的透明导电薄膜层进行刻蚀， 以形成像素电极； 以及  After performing development, etching the transparent conductive film layer located in the fully exposed region to form a pixel electrode;
对位于所述部分曝光区的所述原色光刻胶进行灰化处理， 保留位于所述 非曝光区的所述原色光刻胶。  The primary color photoresist located in the partially exposed region is subjected to ashing treatment to retain the primary color resist located in the non-exposed region.
8、根据权利要求 6所述的薄膜晶体管阵列基板的制造方法， 其中， 通过 执行构图工艺而形成像素电极以及位于所述像素电极上的原色滤光层包括： 在所述透明导电薄膜层上， 沉积第一原色光刻胶层；  The method of manufacturing a thin film transistor array substrate according to claim 6, wherein the forming the pixel electrode and the primary color filter layer on the pixel electrode by performing a patterning process comprises: on the transparent conductive film layer, Depositing a first primary color photoresist layer;
通过构图工艺对所述第一原色光刻胶层进行曝光、 显影和烘烤处理， 形 成第一原色滤光层， 所述第一原色滤光层位于所述透明导电薄膜层上的具有 所述第一原色滤光层的预设位置；  Forming, developing, and baking the first primary color photoresist layer by a patterning process to form a first primary color filter layer, wherein the first primary color filter layer is located on the transparent conductive film layer a preset position of the first primary color filter layer;
重复上述原色光刻胶的沉积、 曝光、 显影和烘烤处理， 以形成第 n原色 滤光层， 其中， n为正整数， 所述第 n原色滤光层位于所述透明导电薄膜层 上的具有所述第 n原色滤光层的预设位置； 以及  Repeating, depositing, developing, and baking the above-mentioned primary color photoresist to form an n-th primary color filter layer, wherein n is a positive integer, and the n-th primary color filter layer is located on the transparent conductive film layer a preset position having the nth primary color filter layer;
刻蚀暴露在所述原色滤光层之间的透明导电薄膜层， 以形成像素电极。  A transparent conductive thin film layer exposed between the primary color filter layers is etched to form a pixel electrode.
9、根据权利要求 6至 8中任一项所述的薄膜晶体管阵列基板的制造方法， 在形成所述原色滤光层之后， 还包括： The method of manufacturing a thin film transistor array substrate according to any one of claims 6 to 8, after forming the primary color filter layer, further comprising:
在所述原色滤光层上沉积遮光性材料,通过执行构图工艺而形成黑矩阵。  A light-shielding material is deposited on the primary color filter layer, and a black matrix is formed by performing a patterning process.
10、 根据权利要求 6至 9中任一项所述的薄膜晶体管阵列基板的制造方 括： The manufacture of the thin film transistor array substrate according to any one of claims 6 to 9 as follows:
在所述半导体有源层上沉积欧姆接触层。  An ohmic contact layer is deposited on the semiconductor active layer.
PCT/CN2012/085487 2012-04-24 2012-11-28 Thin-film transistor array substrate, manufacturing method therefor and liquid crystal display WO2013159520A1 (en)

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