WO2010146846A1 - Photoelectric conversion device and method for producing photoelectric conversion device - Google Patents

Photoelectric conversion device and method for producing photoelectric conversion device Download PDF

Info

Publication number
WO2010146846A1
WO2010146846A1 PCT/JP2010/003997 JP2010003997W WO2010146846A1 WO 2010146846 A1 WO2010146846 A1 WO 2010146846A1 JP 2010003997 W JP2010003997 W JP 2010003997W WO 2010146846 A1 WO2010146846 A1 WO 2010146846A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
photoelectric conversion
type semiconductor
semiconductor layer
conversion unit
Prior art date
Application number
PCT/JP2010/003997
Other languages
French (fr)
Japanese (ja)
Inventor
今北健一
内田寛人
浅利伸
橋本征典
藤長徹志
小林忠正
若井雅文
朝比奈伸一
植喜信
中村久三
斎藤一也
清水康男
Original Assignee
株式会社アルバック
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社アルバック filed Critical 株式会社アルバック
Publication of WO2010146846A1 publication Critical patent/WO2010146846A1/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/028—Inorganic materials including, apart from doping material or other impurities, only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0368—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors
    • H01L31/03682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors including only elements of Group IV of the Periodic Table
    • H01L31/03685—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors including only elements of Group IV of the Periodic Table including microcrystalline silicon, uc-Si
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0368—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors
    • H01L31/03682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors including only elements of Group IV of the Periodic Table
    • H01L31/03687—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors including only elements of Group IV of the Periodic Table including microcrystalline AIVBIV alloys, e.g. uc-SiGe, uc-SiC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0376—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including amorphous semiconductors
    • H01L31/03762—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including amorphous semiconductors including only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0376—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including amorphous semiconductors
    • H01L31/03762—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including amorphous semiconductors including only elements of Group IV of the Periodic Table
    • H01L31/03765—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including amorphous semiconductors including only elements of Group IV of the Periodic Table including AIVBIV compounds or alloys, e.g. SiGe, SiC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0392—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate
    • H01L31/03921—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate including only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/075—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PIN type, e.g. amorphous silicon PIN solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/075—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PIN type, e.g. amorphous silicon PIN solar cells
    • H01L31/076—Multiple junction or tandem solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • H01L31/1812—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table including only AIVBIV alloys, e.g. SiGe
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H01L31/1872—Recrystallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic Table
    • H01L31/204—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic Table including AIVBIV alloys, e.g. SiGe, SiC
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/545—Microcrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/548—Amorphous silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a photoelectric conversion device using a thin film and a method for manufacturing the photoelectric conversion device.
  • the present application claims priority based on Japanese Patent Application No. 2009-145691 filed on June 18, 2009 and Japanese Patent Application No. 2009-229881 filed on October 1, 2009, the contents of which are incorporated herein by reference. To do.
  • a photoelectric conversion device using single crystal silicon is excellent in energy conversion efficiency per unit area.
  • a photoelectric conversion device using single crystal silicon uses a silicon wafer obtained by slicing a single crystal silicon ingot, a large amount of energy is consumed for manufacturing the ingot and the manufacturing cost is high.
  • a photoelectric conversion device using an amorphous (amorphous) silicon thin film hereinafter also referred to as “a-Si thin film” that can be manufactured at a lower cost is widely used as a low-cost photoelectric conversion device.
  • a tandem structure in which two photoelectric conversion units are stacked has been proposed.
  • a tandem photoelectric conversion device 200 as shown in FIG. 17 is known (see, for example, Patent Document 1).
  • an insulating transparent substrate 201 provided with a transparent conductive film 202 is used.
  • a p-type semiconductor layer 231 (p layer), an i-type silicon layer 232 (amorphous silicon layer, i layer), and an n-type semiconductor layer 233 (n layer) are sequentially stacked on the transparent conductive film 202.
  • a pin-type first photoelectric conversion unit 203 is formed.
  • a p-type semiconductor layer 241 (p layer), an i-type silicon layer 242 (crystalline silicon layer, i layer), and an n-type semiconductor layer 243 (n layer) are sequentially stacked on the first photoelectric conversion unit 203.
  • the obtained pin type second photoelectric conversion unit 204 is formed. Further, a back electrode 205 is formed on the second photoelectric conversion unit 204.
  • FIG. 18 shows the relationship between the wavelength and the power generation efficiency in the photoelectric conversion device having such a conventional tandem structure.
  • the relationship between the wavelength and the power generation efficiency of each of the pin-type first photoelectric conversion unit made of an amorphous silicon-based thin film and the pin-type second photoelectric conversion unit made of a crystalline silicon-based thin film is shown. It is shown.
  • the pin-type second photoelectric conversion unit made of a crystalline silicon thin film has low power generation efficiency in the long wavelength region. For this reason, it was difficult to improve the photoelectric conversion efficiency in the whole photoelectric conversion apparatus including the first photoelectric conversion unit and the second photoelectric conversion unit.
  • the present invention has been made to solve the above-described problem, and in a photoelectric conversion device having a tandem structure, power generation in a long wavelength region in a pin-type second photoelectric conversion unit made of a crystalline silicon-based thin film.
  • the primary purpose is to improve efficiency and improve photoelectric conversion efficiency.
  • this invention makes it the 2nd objective to provide the manufacturing method of the photoelectric conversion apparatus which can manufacture the photoelectric conversion apparatus which has a tandem structure with improved photoelectric conversion efficiency by a simple method.
  • the present invention provides a photoelectric conversion device having a single structure including a pin-type photoelectric conversion unit made of a crystalline silicon-based thin film, improving power generation efficiency in a long wavelength region and improving photoelectric conversion efficiency.
  • Third purpose Moreover, this invention makes it the 4th objective to provide the manufacturing method of the photoelectric conversion apparatus which can manufacture the photoelectric conversion apparatus which has a single structure with improved photoelectric conversion efficiency by a simple method.
  • the photoelectric conversion device includes a substrate, a transparent conductive film formed on the substrate, a first p-type semiconductor layer, a first i-type semiconductor layer, and a first n-type semiconductor layer.
  • the thickness of the barrier layer is preferably in the range of 10 to 200 mm, where “1 mm” is “0.1 nm”.
  • a photoelectric conversion device manufacturing method comprising: preparing a substrate on which a transparent conductive film is formed; and forming a first p-type semiconductor layer constituting a first photoelectric conversion unit on the transparent conductive film, A first p-type semiconductor layer, which is a crystalline silicon-based thin film that forms a second photoelectric conversion unit on the first n-type semiconductor layer by sequentially forming an i-type semiconductor layer and a first n-type semiconductor layer. , A second i-type semiconductor layer is formed in order, a barrier layer that is an i-type semiconductor layer of an amorphous silicon thin film is formed on the second i-type semiconductor layer, and the second photoelectric conversion is formed on the barrier layer. A second n-type semiconductor layer, which is a crystalline silicon-based thin film constituting the unit, is formed.
  • a photoelectric conversion device includes a substrate, a transparent conductive film formed on the substrate, a third p-type semiconductor layer, a third i-type semiconductor layer that are crystalline silicon-based thin films, and A third n-type semiconductor layer; and a barrier layer that is an i-type semiconductor layer of an amorphous silicon thin film provided between the third i-type semiconductor layer and the third n-type semiconductor layer, and the transparent conductive film A third photoelectric conversion unit formed above.
  • the manufacturing method of the photoelectric conversion device is a crystalline silicon-based thin film that prepares a substrate on which a transparent conductive film is formed and constitutes a third photoelectric conversion unit on the transparent conductive film.
  • a third p-type semiconductor layer and a third i-type semiconductor layer are formed in order, a barrier layer that is an i-type semiconductor layer of an amorphous silicon thin film is formed on the third i-type semiconductor layer, and the barrier layer is formed on the barrier layer.
  • a third n-type semiconductor layer which is a crystalline silicon-based thin film constituting the third photoelectric conversion unit is formed.
  • a photoelectric conversion device includes a substrate, a transparent conductive film formed on the substrate, a fourth p-type semiconductor layer, a fourth i-type semiconductor layer, and a fourth n-type semiconductor layer.
  • a fourth photoelectric conversion unit formed on the transparent conductive film, a fifth p-type semiconductor layer, a fifth i-type semiconductor layer, and a fifth n-type semiconductor layer, and formed on the fourth photoelectric conversion unit.
  • the fifth i-type semiconductor layer is an amorphous silicon germanium-based thin film.
  • the sixth i-type semiconductor layer is preferably a microcrystalline silicon germanium-based thin film.
  • the thickness of the barrier layer is preferably in the range of 10 to 200 mm.
  • a method for manufacturing a photoelectric conversion device comprising: preparing a substrate on which a transparent conductive film is formed; and forming a fourth p-type semiconductor layer constituting a fourth photoelectric conversion unit on the transparent conductive film; A fourth i-type semiconductor layer and a fourth n-type semiconductor layer are formed in order, and a fifth p-type semiconductor layer, a fifth i-type semiconductor layer constituting a fifth photoelectric conversion unit are formed on the fourth n-type semiconductor layer; And a fifth n-type semiconductor layer, and a sixth p-type semiconductor layer and a sixth i-type semiconductor which are crystalline silicon-based thin films constituting the sixth photoelectric conversion unit on the fifth n-type semiconductor layer.
  • a barrier layer which is an i-type semiconductor layer of an amorphous silicon thin film is formed on the sixth i-type semiconductor layer, and the crystalline material constituting the sixth photoelectric conversion unit is formed on the barrier layer
  • first photoelectric conversion device In the photoelectric conversion device according to the first aspect of the present invention (hereinafter, also referred to as “first photoelectric conversion device”), between the second i-type semiconductor layer and the second n-type semiconductor layer made of a crystalline silicon-based thin film.
  • an i-type semiconductor layer made of an amorphous silicon-based thin film is disposed as a barrier layer. For this reason, the holes (holes) flowing back toward the second n-type semiconductor layer are reflected by the barrier layer toward the second p-type semiconductor layer, thereby improving the short-circuit current (Jsc) (hereinafter, Also referred to as “barrier layer function 1”).
  • the barrier layer increases the band gap of the microcrystalline cell and improves the open-circuit voltage (Voc) (hereinafter also referred to as “barrier layer function 2”). Therefore, in the photoelectric conversion device according to the first aspect of the present invention, a barrier layer is provided between an appropriate interlayer, that is, a second i-type semiconductor layer and a second n-type semiconductor layer made of a crystalline silicon-based thin film. Therefore, both Voc and Jsc described above are improved. Therefore, the power generation efficiency in the second photoelectric conversion unit can be improved. As a result, according to the present invention, a photoelectric conversion device having a tandem structure with improved photoelectric conversion efficiency can be provided.
  • the second p-type semiconductor layer made of a crystalline silicon-based thin film and the second i-type semiconductor layers are sequentially formed (first step), an i-type semiconductor layer (barrier layer) made of an amorphous silicon thin film is formed on the second i-type semiconductor layer (second step), and crystals are formed on the barrier layer.
  • a second n-type semiconductor layer made of a high-quality silicon thin film is formed (third step). The first step, the second step, and the third step are performed in order.
  • both Voc and Jsc can be increased by functions 1 and 2 of the barrier layer, and the power generation efficiency in the second photoelectric conversion unit is improved.
  • the photoelectric conversion device In the photoelectric conversion device according to the third aspect of the present invention (hereinafter, also referred to as “second photoelectric conversion device”), between the third i-type semiconductor layer and the third n-type semiconductor layer made of a crystalline silicon-based thin film.
  • an i-type semiconductor layer made of an amorphous silicon-based thin film is disposed as a barrier layer. For this reason, the holes that flow backward toward the third n-type semiconductor layer are reflected by the barrier layer toward the third p-type semiconductor layer, and Jsc can be improved (Function 1 of the barrier layer).
  • the barrier layer increases the band gap of the microcrystalline cell and improves Voc (barrier layer function 2).
  • the barrier layer is provided, both Voc and Jsc described above are improved. Therefore, power generation efficiency can be improved. As a result, according to the present invention, a photoelectric conversion device having a single structure with improved photoelectric conversion efficiency can be provided.
  • the third p-type semiconductor layer and the third p-type semiconductor layer made of a crystalline silicon-based thin film are used.
  • i-type semiconductor layers are sequentially formed (first step)
  • an i-type semiconductor layer (barrier layer) made of an amorphous silicon thin film is formed on the third i-type semiconductor layer (second step)
  • crystals are formed on the barrier layer.
  • Forming a third n-type semiconductor layer made of a high-quality silicon-based thin film (third step); The first step, the second step, and the third step are performed in order.
  • both Voc and Jsc can be increased by the functions 1 and 2 of the barrier layer, and the power generation efficiency is improved.
  • the photoelectric conversion device in the photoelectric conversion device according to the fifth aspect of the present invention (hereinafter also referred to as “third photoelectric conversion device”), between the sixth i-type semiconductor layer and the sixth n-type semiconductor layer made of a crystalline silicon-based thin film.
  • an i-type semiconductor layer made of an amorphous silicon-based thin film is disposed as a barrier layer. Therefore, holes that have flowed back toward the sixth n-type semiconductor layer are reflected by the barrier layer toward the sixth p-type semiconductor layer, and the short-circuit current (Jsc) can be improved (barrier layer). Function 1).
  • the barrier layer increases the band gap of the microcrystalline cell and improves the open circuit voltage (Voc) (barrier layer function 2).
  • a barrier layer is provided between an appropriate interlayer, that is, a sixth i-type semiconductor layer and a sixth n-type semiconductor layer made of a crystalline silicon-based thin film. Therefore, both Voc and Jsc described above are improved. Therefore, the power generation efficiency in the sixth photoelectric conversion unit can be improved. As a result, according to the present invention, a photoelectric conversion device having a triple structure with improved photoelectric conversion efficiency can be provided.
  • a sixth p-type semiconductor layer and a sixth p-type semiconductor layer made of a crystalline silicon-based thin film are used.
  • i-type semiconductor layers are sequentially formed (first step)
  • an i-type semiconductor layer (barrier layer) made of an amorphous silicon thin film is formed on the sixth i-type semiconductor layer (second step)
  • crystals are formed on the barrier layer.
  • a sixth n-type semiconductor layer made of a high-quality silicon-based thin film is formed (third step). The first step, the second step, and the third step are performed in order.
  • both Voc and Jsc can be increased by the functions 1 and 2 of the barrier layer, and the power generation efficiency in the sixth photoelectric conversion unit is improved.
  • FIG. 1 It is the schematic which shows the manufacturing system which manufactures the photoelectric conversion apparatus (3rd photoelectric conversion apparatus) which concerns on 3rd embodiment of this invention. It is a figure which shows a discharge curve about the photoelectric conversion apparatus produced in Example 1 and Comparative Example 1.
  • FIG. It is a figure which shows the relationship between a wavelength and electric power generation efficiency about the photoelectric conversion apparatus produced in Example 1 and Comparative Example 1.
  • FIG. It is a figure which shows the relationship between the thickness of a barrier layer, and photoelectric conversion efficiency (eta) about the photoelectric conversion apparatus produced in Example 2-7 and Comparative Example 2.
  • FIG. It is a figure which shows the relationship between the thickness of a barrier layer, and the short circuit current Jsc about the photoelectric conversion apparatus produced in Example 2-7 and Comparative Example 2.
  • FIG. 2-7 It is a figure which shows the relationship between the thickness of a barrier layer, and the open circuit voltage Voc about the photoelectric conversion apparatus produced in Example 2-7 and the comparative example 2.
  • FIG. It is a figure which shows the relationship between Ic / Ia and Jsc about the photoelectric conversion apparatus produced in Example 2-7 and Comparative Example 2.
  • FIG. It is a figure which shows the relationship between a wavelength and power generation efficiency about the photoelectric conversion apparatus of Example 8. It is a figure which shows the relationship between a wavelength and power generation efficiency about the photoelectric conversion apparatus of Example 9.
  • FIG. It is a figure which shows the relationship between a wavelength and power generation efficiency about the photoelectric conversion apparatus of Example 8 and Comparative Example 3.
  • FIG. 1 is a cross-sectional view showing the layer configuration of the photoelectric conversion device according to the first embodiment of the present invention.
  • the photoelectric conversion device 10A (10) of the first embodiment of the present invention the substrate 1 on which a transparent conductive film is formed is used, and the transparent conductive film 2 is formed on the first surface 1a of the substrate 1.
  • the transparent conductive film 2 is formed on the first surface 1a of the substrate 1.
  • the 1st photoelectric conversion unit 3 and the 2nd photoelectric conversion unit 4 are piled up in order.
  • the first photoelectric conversion unit 3 and the second photoelectric conversion unit 4 have a pin-type semiconductor stacked structure in which a p-type semiconductor layer, a substantially intrinsic i-type semiconductor layer, and an n-type semiconductor layer are stacked.
  • a back electrode 5 is formed on the second photoelectric conversion unit 4.
  • the substrate 1 is an insulating substrate having a light transmission property, and is made of, for example, an insulating material made of glass, transparent resin, etc., having excellent sunlight transmission properties and durability.
  • the substrate 1 includes a transparent conductive film 2.
  • a transparent conductive film 2 As a material of the transparent conductive film 2, for example, a light transmissive metal oxide such as ITO (indium tin oxide), SnO 2 , ZnO or the like is employed.
  • the transparent conductive film 2 is formed on the substrate 1 by vacuum deposition or sputtering.
  • this photoelectric conversion device 10 ⁇ / b> A (10) the sunlight S is incident on the second surface 1 b of the substrate 1 as indicated by the arrow in FIG. 1.
  • the first photoelectric conversion unit 3 includes a p-type semiconductor layer 31 (p layer, first p-type semiconductor layer), a substantially intrinsic i-type semiconductor layer 32 (i layer, amorphous silicon layer, first i Type semiconductor layer) and an n-type semiconductor layer 33 (n layer, first n-type semiconductor layer) are stacked. That is, the first photoelectric conversion unit 3 is formed by stacking the p layer 31, the i layer 32, and the n layer 33 in this order.
  • the first photoelectric conversion unit 3 is made of, for example, an amorphous (amorphous) silicon-based material.
  • the thickness of the p layer 31 is, for example, 80 mm
  • the thickness of the i layer 32 is, for example, 1800 mm
  • the thickness of the n layer 33 is, for example, 100 mm.
  • the p layer 31, i layer 32, and n layer 33 of the first photoelectric conversion unit 3 are formed in a plurality of plasma CVD reaction chambers. That is, in each of a plurality of different plasma CVD reaction chambers, one layer constituting the first photoelectric conversion unit 103 is formed.
  • the second photoelectric conversion unit 4 includes a p-type semiconductor layer 41 (p layer, second p-type semiconductor layer), a substantially intrinsic i-type semiconductor layer 42 (i layer, crystalline silicon layer, second i-type semiconductor layer). ), And an n-type semiconductor layer 43 (n-layer, second n-type semiconductor layer) are stacked. That is, the second photoelectric conversion unit 4 is formed by stacking the p layer 41, the i layer 42, and the n layer 43 in this order.
  • the second photoelectric conversion unit 4 is made of a silicon-based material containing a crystalline material.
  • the thickness of the p layer 41 is 150 mm
  • the thickness of the i layer 42 is 15000 mm, for example
  • the thickness of the n layer 43 is 300 mm, for example.
  • an i-type semiconductor layer made of an amorphous silicon thin film is interposed between the i layer 42 and the n layer 43. Is arranged as. For this reason, by the function of the barrier layer 45, the holes (holes) flowing back toward the n layer 43 are reflected toward the p layer 41, and the short circuit current (Jsc) can be improved. Further, the band gap of the microcrystalline cell is increased by the action of the barrier layer 45, and the open circuit voltage (Voc) can be improved.
  • both Voc and Jsc can be improved, and the power generation efficiency of the second photoelectric conversion unit 4 can be improved. it can.
  • it is possible to improve the photoelectric conversion efficiency in the entire photoelectric conversion device including the first photoelectric conversion unit and the second photoelectric conversion unit.
  • the thickness of the barrier layer 45 is preferably in the range of 10 to 200 mm, for example, 50 mm. It has been confirmed that the photoelectric conversion efficiency increases when the thickness of the barrier layer 45 is in the range of 0 to 200 mm. When the thickness of the barrier layer 45 is 50 mm or more, Jsc decreases, while Voc and fill factor (FF) increase. Thereby, the photoelectric conversion efficiency in the whole photoelectric conversion device having a tandem structure is improved.
  • the crystallization rate in the barrier layer 45 constituting 10A (10) is less than 1.0.
  • the crystallization rate means a value obtained by dividing Ic by Ia (hereinafter referred to as Ic / Ia), and is a value obtained by quantifying the mixing ratio of crystalline and amorphous.
  • the crystallization rate of the barrier layer 45 can be independently controlled regardless of the crystallization rate (Ic / Ia) of the i layer 42 of the microcrystalline cell. That is, by adopting such a layer structure, Jsc can be improved in the photoelectric conversion device 10 of the first embodiment.
  • the power generation efficiency in the long wavelength region is improved by the layer structure of the first embodiment, and the photoelectric conversion efficiency in the microcrystalline tandem thin film solar cell can be improved by about 1%.
  • the back electrode 5 is made of, for example, a conductive light reflecting film such as Ag (silver) or Al (aluminum).
  • the back electrode 5 is formed using, for example, a sputtering method or a vapor deposition method.
  • a laminated structure in which a layer made of a conductive oxide such as ITO, SnO 2 , or ZnO is formed between the n layer 43 of the second photoelectric conversion unit 4 and the back electrode 5. Can also be used.
  • the manufacturing method of the photoelectric conversion device 10A (10) having the above configuration includes a step of sequentially forming the p layer 31, the i layer 32, and the n layer 33 constituting the first photoelectric conversion unit 3, and the n layer 33 of the first photoelectric conversion unit 3.
  • the open circuit voltage (Voc) and the short circuit current (Jsc) can be improved by the function of the barrier layer described above.
  • the power generation efficiency of the two photoelectric conversion units 4 is improved, and the photoelectric conversion efficiency in the entire photoelectric conversion device including the first photoelectric conversion unit 3 and the second photoelectric conversion unit 4 is improved.
  • the manufacturing method of the first embodiment it is possible to easily manufacture the photoelectric conversion device 10 with improved photoelectric conversion efficiency.
  • a method for manufacturing a photoelectric conversion device having a tandem structure will be described in order.
  • an insulating transparent substrate 1 on which a transparent conductive film 2 is formed is prepared.
  • the p layer 31, the i layer 32, the n layer 33, and the p layer 41 are formed on the transparent conductive film 2.
  • a plurality of plasma CVD reaction chambers in which the p layer 31, the i layer 32, the n layer 33, and the p layer 41 are formed are different from each other.
  • one layer of the p layer 31, the i layer 32, the n layer 33, and the p layer 41 is formed, and the p layer 31 is formed by a plurality of plasma CVD reaction chambers connected in a row.
  • the i layer 32, the n layer 33, and the p layer 41 are sequentially formed. That is, the first intermediate product 10a of the photoelectric conversion device in which the p layer 41 constituting the second photoelectric conversion unit 4 is provided on the n layer 33 of the first photoelectric conversion unit 3 is obtained.
  • the p layer 31 is formed using plasma CVD in a separate reaction chamber.
  • the substrate temperature is set to 180 to 200 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 70 to 120 Pa
  • monosilane (SiH 4 ) is 300 sccm
  • diborane (B 2 H 6 / H 2 ) using hydrogen as a diluent gas is set to 180 sccm
  • methane (CH 4 ) is set to 500 sccm.
  • a p-layer made of amorphous silicon (a-Si) 31 can be formed.
  • the i layer 32 is formed using plasma CVD in a separate reaction chamber.
  • the substrate temperature is set to 180 to 200 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the pressure in the reaction chamber is set to 70 to 120 Pa
  • monosilane (SiH 4 ) is set to 1200 sccm as the reaction gas flow rate.
  • the i layer 32 made of amorphous silicon can be formed.
  • the n layer 33 is formed using a plasma CVD method in a separate reaction chamber.
  • the substrate temperature is set to 180 to 200 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the pressure in the reaction chamber is set to 70 to 120 Pa
  • the reaction gas flow rate is phosphine (PH Under the condition that 3 / H 2 ) is set to 200 sccm, the n layer 33 made of amorphous silicon can be formed.
  • the p layer 41 is formed using a plasma CVD method in a separate reaction chamber.
  • the substrate temperature is set to 180 to 200 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 500 to 900 Pa
  • monosilane (SiH 4 ) is set to 100 sccm
  • hydrogen (H 2 ) as the reaction gas flow rate.
  • diborane (B 2 H 6 / H 2 ) using hydrogen as a diluent gas is set to 50 sccm
  • the p-layer 41 of microcrystalline silicon ( ⁇ c-Si) can be formed. .
  • the substrate 1 on which the p layer 31, i layer 32, n layer 33, and p layer 41 are formed as described above is taken out of the reaction chamber, and the p layer 41 is exposed to the atmosphere.
  • the i layer 42, the barrier layer 45, and the n layer 43 constituting the second photoelectric conversion unit 4 are formed on the p layer 41 exposed to the atmosphere in a single plasma CVD reaction chamber. It is formed. That is, the second intermediate product 10b of the photoelectric conversion device in which the second photoelectric conversion unit 4 is provided on the first photoelectric conversion unit 3 is obtained.
  • the photoelectric conversion apparatus 10A (10) shown in FIG. 1 is obtained by forming the back surface electrode 5 on the n layer 43 of the second photoelectric conversion unit 4.
  • the i layer 42 is formed using a plasma CVD method in the same reaction chamber as that in which the n layer 43 is formed.
  • the substrate temperature is set to 180 to 200 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 500 to 900 Pa
  • monosilane (SiH 4 ) is 180 sccm
  • hydrogen (H 2 ) as the reaction gas flow rate.
  • the i-layer 42 of microcrystalline silicon can be formed.
  • the barrier layer 45 is formed using a plasma CVD method in the same reaction chamber as the reaction chamber in which the i layer 42 is formed.
  • the substrate temperature is set to 180 to 200 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 70 to 120 Pa
  • monosilane (SiH 4 ) is set to 1200 sccm as the reaction gas flow rate.
  • the barrier layer 45 i-type semiconductor layer made of amorphous silicon can be formed.
  • the n layer 43 is formed using a plasma CVD method in the same reaction chamber as that in which the i layer 42 is formed.
  • the substrate temperature is set to 180 to 200 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 500 to 900 Pa
  • monosilane (SiH 4 ) is 180 sccm
  • phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas is set to 200 sccm, and the n-layer 43 of microcrystalline silicon can be formed.
  • the manufacturing system of the photoelectric conversion apparatus 10 in the first embodiment includes a so-called in-line type first film forming apparatus 60, an exposure apparatus 80 that exposes the p layer 41 to the atmosphere, and a so-called batch type second film forming apparatus 70.
  • the inline-type first film forming apparatus 60 has a configuration in which a plurality of film forming reaction chambers called chambers are linearly connected.
  • the p layer 31, the i layer 32, the n layer 33 of the first photoelectric conversion unit 3, and the p layer 41 of the second photoelectric conversion unit 4 are formed separately.
  • the exposure apparatus 80 exposes the substrate processed in the first film forming apparatus 60 to the atmosphere, and then moves the substrate to the second film forming apparatus 70.
  • the i layer 42, the barrier layer 45, and the n layer 43 of the second photoelectric conversion unit 4 are stacked in this order in the same film forming reaction chamber.
  • a plurality of substrates are collectively conveyed, and an i layer 42, a barrier layer 45, and an n layer 43 are sequentially formed in each of the plurality of substrates in the film formation reaction chamber. (Batch processing).
  • a load chamber 61 (L: Lord) to which a substrate is first loaded and a vacuum pump for reducing the internal pressure is connected is disposed.
  • a heating chamber that heats the substrate so that the substrate temperature reaches a certain temperature may be provided in the subsequent stage of the load chamber 61 according to the film forming process.
  • Connected to the load chamber 61 is a P layer deposition reaction chamber 62 for forming the p layer 31.
  • An I layer deposition reaction chamber 63 for forming the i layer 32 is connected to the P layer deposition reaction chamber 62.
  • An N layer deposition reaction chamber 64 for forming the n layer 33 is connected to the I layer deposition reaction chamber 63.
  • a P layer deposition reaction chamber 65 for forming the p layer 41 is connected to the N layer deposition reaction chamber 64.
  • an unload chamber 66 (UL: United) that returns the internal pressure from reduced pressure to atmospheric pressure and carries the substrate out of the first film deposition apparatus 60.
  • the plurality of reaction chambers 62, 63, 64, 65 described above are continuously arranged in a straight line.
  • the substrate is sequentially transferred to the reaction chambers 62, 63, 64, and 65, and a film forming process is performed in each reaction chamber.
  • an insulating transparent substrate 1 on which a transparent conductive film 2 is formed is prepared as shown in FIG. 2A.
  • the p layer 31, i layer 32, n layer 33, and second photoelectric conversion unit 4 of the first photoelectric conversion unit 3 are formed on the transparent conductive film 2 as shown in FIG. 2B.
  • the first intermediate product 10a of the photoelectric conversion device 10 provided with the p layer 41 is formed.
  • the second film forming apparatus 70 in the manufacturing system includes a load / unload chamber 71 (L / UL) and an IIN layer film formation reaction chamber 72 connected to the load / unload chamber 71.
  • the load / unload chamber 71 carries the first intermediate product 10 a of the photoelectric conversion apparatus processed in the first film formation apparatus 60 into the IIN layer film formation reaction chamber 72.
  • the load / unload chamber 71 reduces the internal pressure after the substrate is loaded into the load / unload chamber 71, or returns the internal pressure from the reduced pressure to the atmospheric pressure when the substrate is unloaded from the load / unload chamber 71.
  • the i layer 42, the barrier layer 45, and the n layer 43 of the second photoelectric conversion unit 4 are stacked in this order in the same deposition reaction chamber. Further, in such a film formation reaction chamber, a plurality of substrates are collectively conveyed, and an i layer 42, a barrier layer 45, and an n layer 43 are sequentially formed in each of the plurality of substrates in the film formation reaction chamber. (Batch processing). Therefore, the film formation process in the IIN layer film formation reaction chamber 72 is performed simultaneously on a plurality of substrates.
  • the second intermediate product 10 b of the photoelectric conversion device 10 in which the second photoelectric conversion unit 4 is provided is disposed on the first photoelectric conversion unit 3.
  • the I-layer film formation reaction chamber 63 includes four reaction chambers 63a, 63b, 63c, and 63d.
  • film forming processes are simultaneously performed on six substrates.
  • the p layer of the second photoelectric conversion unit 4 which is a crystalline photoelectric conversion device is formed on the n layer 33 of the first photoelectric conversion unit 3 which is an amorphous photoelectric conversion device.
  • 41 is formed in advance, and the i layer 42, the barrier layer 45, and the n layer 43 of the second photoelectric conversion unit 4 are formed on the p layer 41.
  • the barrier layer 45 is formed between the i layer 42 and the n layer 43 of the second photoelectric conversion unit 4 in the same film formation chamber (IIN layer film formation reaction chamber 72). Therefore, the photoelectric conversion device 10 having good characteristics can be obtained.
  • the i layer 42, the barrier layer 45, and the n layer 43 constituting the second photoelectric conversion unit 4 are formed on the p layer 41 exposed to the atmosphere.
  • OH radical plasma treatment OH radical plasma treatment
  • hydrogen plasma treatment it is desirable to expose the p layer 41 exposed in the atmosphere to plasma in an atmosphere containing hydrogen gas (hydrogen plasma treatment).
  • the OH radical plasma treatment there is a method in which an OH radical plasma treatment chamber is prepared in advance, the substrate on which the p layer 41 of the second photoelectric conversion unit 4 is formed is transferred to the plasma treatment chamber, and the p layer 41 is exposed to plasma. Adopted. Further, after the OH radical plasma treatment, the i layer 42, the barrier layer 45, and the n layer 43 constituting the second photoelectric conversion unit 4 are formed in a reaction chamber different from the OH radical plasma treatment chamber. On the other hand, as the OH radical plasma treatment, the OH radical plasma treatment and the treatment for forming the i layer 42, the barrier layer 45, and the n layer 43 constituting the second photoelectric conversion unit 4 are continuously performed in the same reaction chamber. May be.
  • the respective layers are formed.
  • the impurity gas PH 3 remaining in the reaction chamber can be decomposed and removed. Therefore, even when the film formation process of the i layer 42, the barrier layer 45, and the n layer 43 of the second photoelectric conversion unit 4 is repeatedly performed in the same processing chamber, a good impurity profile is obtained and a good condition is obtained.
  • a photoelectric conversion device 10 made of a laminated thin film having power generation efficiency can be obtained.
  • CO 2 , CH 2 O 2, or a mixed gas composed of H 2 O and H 2 is used as a process gas.
  • a process gas desirable. That is, in order to generate OH radical-containing plasma, (CO 2 + H 2 ), (CH 2 O 2 + H 2 ), or (H 2 O + H 2 ) is allowed to flow between the electrodes in the processing chamber while flowing into the processing chamber. For example, it can be effectively generated by applying a high frequency such as 13.5 MHz, 27 MHz, or 40 MHz.
  • alcohols such as (HCOOCH 3 + H 2 ) and (CH 3 OH + H 2 ), and hydrocarbons containing oxygen such as formate esters may be used.
  • hydrocarbons containing oxygen such as formate esters
  • the n layer 33 in which the microcrystalline phase formed on the p layer 31 and the i layer 32 of the first photoelectric conversion unit 3 is dispersed in the amorphous crystalline phase is obtained without damaging the lower layer.
  • an effect of activating the surface of the p layer 41 formed on the n layer 33 is obtained. Therefore, the surface of the p layer 41 of the second photoelectric conversion unit 4 can be activated, and the crystals of the i layer 42 and the n layer 43 of the second photoelectric conversion unit 4 stacked on the p layer 41 are effective. Can be generated.
  • the second photoelectric conversion unit 4 is formed on a large-area substrate, a uniform crystallization rate distribution can be obtained. Even if the hydrogen plasma treatment is performed instead of the OH radical plasma treatment, the same effect as the OH radical plasma treatment can be obtained.
  • a layer in which microcrystalline silicon is dispersed in an amorphous silicon layer may be employed.
  • a layer in which microcrystalline silicon is dispersed in an amorphous silicon oxide layer may be employed.
  • a-SiO amorphous silicon oxide layer
  • the refractive index can be adjusted to be lower than that of an amorphous silicon semiconductor layer. . It is possible to improve conversion efficiency by making this layer function as a wavelength selective reflection film and confining short wavelength light on the top cell side. Regardless of the effect of confining this light, in the layer in which microcrystalline silicon is dispersed in the amorphous silicon oxide layer (a-SiO), the second photoelectric conversion unit 4 is subjected to OH radical plasma treatment. Crystal growth nuclei of the i layer 42 and the n layer 43 are effectively generated. Therefore, a uniform crystallization rate distribution can be obtained even on a large-area substrate.
  • a crystalline silicon-based thin film may be formed as the n layer 33 constituting the first photoelectric conversion unit 3. That is, the crystalline n layer 33 and the p layer 41 of the crystalline second photoelectric conversion unit 4 are formed on the p layer 31 and the i layer 32 of the amorphous first photoelectric conversion unit 3. At this time, the crystalline n layer 33 formed on the p layer 31 and the i layer 32 and the p layer 41 of the second photoelectric conversion unit 4 are formed in the atmosphere after the p layer 31 and the i layer 32 are formed. It is desirable to form continuously without exposing.
  • the first photoelectric conversion unit 3 is exposed to the air atmosphere, and then the second photoelectric conversion unit 4 of the reaction chamber is exposed.
  • a method of forming the p layer 41, the i layer 42, and the n layer 43 is known. In this method, the i-layer 32 of the first photoelectric conversion unit 3 deteriorates due to the time, temperature, atmosphere, etc., the substrate is exposed to the air atmosphere, and the device performance is degraded.
  • the crystalline n layer 33 and the second photoelectric conversion unit 4 are not exposed to the air atmosphere.
  • the p layer 41 is continuously formed.
  • the surface of the p layer 41 is activated by performing an OH radical plasma treatment in a separate reaction chamber on the substrate on which the crystalline n layer 33 and the p layer 41 of the second photoelectric conversion unit 4 are formed. As a result, crystal nuclei are generated. Subsequently, the i-layer 42 of the crystalline second photoelectric conversion unit 4 is laminated on the p-layer 41, thereby comprising a laminated thin film having a uniform crystallization rate distribution over a large area and good power generation efficiency. A photoelectric conversion device 10A (10) can be obtained. Such OH radical plasma treatment may be performed in the same reaction chamber as the reaction chamber in which the i layer 42 is formed.
  • FIG. 4 is a cross-sectional view showing a layer configuration of the photoelectric conversion device 10 manufactured by the manufacturing method according to the second embodiment.
  • the photoelectric conversion device having a tandem structure has been described.
  • the present invention is not limited to the tandem structure, and can also be applied to a photoelectric conversion device having a single structure.
  • a substrate 1 on which a transparent conductive film is formed is used, and the transparent conductive film 2 is the first surface of the substrate 1. It is formed on 1a.
  • a pin-type third photoelectric conversion unit 8 is formed on the transparent conductive film 2.
  • a p-type semiconductor layer 81 (p layer, third p-type semiconductor layer), a substantially intrinsic i-type semiconductor layer 82 (i layer, third i-type semiconductor layer), n-type Semiconductor layers 83 (n layer and third n-type semiconductor layer) are sequentially stacked.
  • the p layer 81, the i layer 82, and the n layer 83 constituting the third photoelectric conversion unit 8 are made of a crystalline silicon-based thin film. Further, an i layer made of an amorphous silicon thin film is disposed as a barrier layer 85 between the i layer 82 and the n layer 83.
  • the barrier layer 85 is provided as described above, holes that have flowed back toward the n layer 83 are directed toward the p layer 81 by the barrier layer 85. Reflected and the short circuit current (Jsc) can be improved.
  • the barrier layer 85 is provided, the band gap of the microcrystalline cell can be increased and the open circuit voltage (Voc) can be improved.
  • the manufacturing method of the photoelectric conversion device 10 ⁇ / b> B (10) includes a step of sequentially forming a p layer 81 and an i layer 82 constituting the third photoelectric conversion unit 8, and a barrier on the i layer 82 constituting the third photoelectric conversion unit 8. Forming a layer 85, and forming an n layer 83 constituting the third photoelectric conversion unit 8 on the barrier layer 85.
  • the method of forming each of the p layer 81, the i layer 82, the barrier layer 85, and the n layer 83 constituting the third photoelectric conversion unit 8 is the p constituting the second photoelectric conversion unit 4 in the first embodiment described above.
  • FIG. 5 is a cross-sectional view showing a layer configuration of a photoelectric conversion device 10C (10) manufactured by the manufacturing method according to the third embodiment.
  • the photoelectric conversion device 10 having a tandem structure or a single structure has been described.
  • the present invention is not limited to these structures, and is also applicable to a photoelectric conversion device having a triple structure. Is possible.
  • the photoelectric conversion device 10 ⁇ / b> C (10) uses a substrate 1 on which a transparent conductive film is formed.
  • the transparent conductive film 2 is formed on the first surface 1 a of the substrate 1. ing.
  • a fourth photoelectric conversion unit 110, a fifth photoelectric conversion unit 120, and a sixth photoelectric conversion unit 130 are sequentially stacked.
  • the fourth photoelectric conversion unit 110, the fifth photoelectric conversion unit 120, and the sixth photoelectric conversion unit 130 are a pin type in which a p-type semiconductor layer, a substantially intrinsic i-type semiconductor layer, and an n-type semiconductor layer are stacked. It has a semiconductor laminated structure.
  • the fourth photoelectric conversion unit 110 includes a p-type semiconductor layer 111 (p layer, fourth p-type semiconductor layer), a substantially intrinsic i-type semiconductor layer 112 (i layer, amorphous silicon layer, fourth i-type semiconductor). Layer) and an n-type semiconductor layer 113 (n-layer, fourth n-type semiconductor layer) are stacked. That is, the fourth photoelectric conversion unit 110 is formed by stacking the p layer 111, the i layer 112, and the n layer 113 in this order.
  • the fourth photoelectric conversion unit 110 is made of, for example, an amorphous (amorphous) silicon-based material.
  • the thickness of the p layer 111 is, for example, 80 mm
  • the thickness of the i layer 112 is, for example, 1000 mm
  • the thickness of the n layer 113 is, for example, 300 mm.
  • the p layer 111, the i layer 112, and the n layer 113 constituting the fourth photoelectric conversion unit 110 are formed in a plurality of plasma CVD reaction chambers. That is, in each of a plurality of plasma CVD reaction chambers different from each other, one layer constituting the fourth photoelectric conversion unit 110 is formed.
  • the fifth photoelectric conversion unit 120 includes a p-type semiconductor layer 121 (p layer, fifth p-type semiconductor layer), a substantially intrinsic i-type semiconductor layer 122 (i layer, crystalline silicon layer, fifth i-type semiconductor layer). ), An n-type semiconductor layer 123 (n layer, fifth n-type semiconductor layer) is stacked. That is, the fifth photoelectric conversion unit 120 is formed by stacking the p layer 121, the i layer 122, and the n layer 123 in this order.
  • the fifth photoelectric conversion unit 120 is made of a silicon-based material containing a crystalline material.
  • the i layer 122 of the fifth photoelectric conversion unit 120 is preferably made of an amorphous silicon germanium-based thin film.
  • the thickness of the p layer 121 is 200 mm
  • the thickness of the i layer 122 is 12000 mm, for example
  • the thickness of the n layer 123 is 300 mm, for example.
  • the sixth photoelectric conversion unit 130 includes a p-type semiconductor layer 131 (p layer, sixth p-type semiconductor layer), a substantially intrinsic i-type semiconductor layer 132 (i layer, crystalline silicon layer, sixth i-type semiconductor layer). ) And an n-type semiconductor layer 133 (n-layer, sixth n-type semiconductor layer) are stacked. That is, the sixth photoelectric conversion unit 130 is formed by stacking the p layer 131, the i layer 132, and the n layer 133 in this order.
  • the sixth photoelectric conversion unit 130 is made of a silicon-based material containing a crystalline material.
  • the i layer 132 of the sixth photoelectric conversion unit 130 is preferably made of a microcrystalline silicon germanium-based thin film ( ⁇ c-SiGe).
  • the thickness of the p layer 131 is 200 mm
  • the thickness of the i layer 132 is 15000 mm, for example
  • the thickness of the n layer 133 is 300 mm, for example.
  • the p layer 131, the i layer 132, and the n layer 133 are made of a crystalline silicon thin film, Between the n layer 133, an i-type semiconductor layer made of an amorphous silicon thin film is disposed as a barrier layer 135.
  • the barrier layer 135 is provided as described above, the holes that flow backward toward the n layer 133 are directed toward the p layer 131 by the barrier layer 135. Reflected and the short circuit current (Jsc) can be improved.
  • the barrier layer 135 is provided, the band gap of the microcrystalline cell can be increased and the open-circuit voltage (Voc) can be improved.
  • the thickness of the barrier layer 135 is preferably in the range of 10 to 200 mm, for example, 50 mm. It has been confirmed that the photoelectric conversion efficiency is increased when the thickness of the barrier layer 135 is in the range of 0 to 200 mm. When the thickness of the barrier layer 135 is 50 mm or more, Jsc decreases, while Voc and fill factor (FF) increase. Thereby, the photoelectric conversion efficiency in the whole photoelectric conversion device having a triple structure is improved.
  • the manufacturing method of the photoelectric conversion device 10C (10) of the third embodiment includes a step of sequentially forming the p layer 111, the i layer 112, and the n layer 113 constituting the fourth photoelectric conversion unit 110, and the fourth photoelectric conversion unit 110. Forming a p-layer 121, an i-layer 122, and an n-layer 123 constituting the fifth photoelectric conversion unit 120 in this order on the n-layer 113, and a sixth photoelectric conversion on the n-layer 123 of the fifth photoelectric conversion unit 120.
  • both Voc and Jsc can be increased by the function of the barrier layer described above, and the power generation in the sixth photoelectric conversion unit 130 is performed. Efficiency is improved.
  • a photoelectric conversion device having a triple structure with improved photoelectric conversion efficiency can be easily manufactured.
  • a method for manufacturing a photoelectric conversion device having a triple structure will be described in order.
  • an insulating transparent substrate 1 on which a transparent conductive film 2 is formed is prepared. Thereafter, the p layer 111, the i layer 112, and the n layer 113 are formed on the transparent conductive film 2.
  • a plurality of plasma CVD reaction chambers in which the p layer 111, the i layer 112, and the n layer 113 are formed are different from each other.
  • one layer of the p layer 111, the i layer 112, and the n layer 113 is formed in one plasma CVD reaction chamber, and the p layer 111, the i layer 112, And the n layer 113 are sequentially formed.
  • the p layer 111 is formed using a plasma CVD method in a separate reaction chamber.
  • the substrate temperature is set to 180 to 200 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 70 to 120 Pa
  • monosilane (SiH 4 ) is 300 sccm
  • diborane (B 2 H 6 / H 2 ) using hydrogen as a diluent gas is set to 180 sccm
  • methane (CH 4 ) is set to 500 sccm
  • the layer 111 can be formed.
  • the i layer 112 is formed using a plasma CVD method in a separate reaction chamber.
  • the substrate temperature is set to 180 to 200 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 70 to 120 Pa
  • monosilane (SiH 4 ) is set to 1200 sccm as the reaction gas flow rate.
  • the i layer 112 made of amorphous silicon can be formed.
  • the n layer 113 is formed using a plasma CVD method in a separate reaction chamber.
  • the substrate temperature is set to 180 to 200 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 500 to 900 Pa
  • monosilane (SiH 4 ) is 180 sccm
  • the phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas is set to 200 sccm
  • the n layer 113 made of microcrystalline silicon can be formed.
  • the p layer 121, the i layer 122, and the n layer 123 that constitute the fifth photoelectric conversion unit 120, and the p layer 131 that constitutes the sixth photoelectric conversion unit 130. are sequentially stacked.
  • a plurality of plasma CVD reaction chambers in which the p layer 121, the i layer 122, the n layer 123, and the p layer 131 are formed are different from each other.
  • one layer of the p layer 31, the i layer 32, the n layer 33, and the p layer 41 is formed, and a plurality of plasma CVD reaction chambers connected in a row form the p layer 121, An i layer 122, an n layer 123, and a p layer 131 are sequentially formed.
  • the p layer 121 is formed using a plasma CVD method in a separate reaction chamber.
  • the substrate temperature is set to 180 to 200 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 500 to 900 Pa
  • monosilane (SiH 4 ) is set to 100 sccm
  • hydrogen (H 2 ) as the reaction gas flow rate.
  • Is set to 25000 sccm
  • diborane (B 2 H 6 / H 2 ) using hydrogen as a diluent gas is set to 50 sccm
  • the p-layer 121 made of microcrystalline silicon can be formed.
  • the i layer 122 is formed using a plasma CVD method in a separate reaction chamber.
  • the substrate temperature is set to 180 to 200 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the pressure in the reaction chamber is set to 80 Pa
  • monosilane (SiH 4 ) is 700 sccm
  • monogermane (GeH 4 ) as the reaction gas flow rate.
  • the i layer 122 made of microcrystalline silicon germanium ( ⁇ c-SiGe) can be formed under the condition that is set to 500 sccm.
  • the n layer 123 is formed using a plasma CVD method in a separate reaction chamber.
  • the substrate temperature is set to 180 to 200 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 500 to 900 Pa
  • monosilane (SiH 4 ) is 180 sccm
  • phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas is set to 200 sccm, and the n-layer 123 of microcrystalline silicon can be formed.
  • the p layer 131 is formed using a plasma CVD method in a separate reaction chamber.
  • the substrate temperature is set to 180 to 200 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 500 to 900 Pa
  • monosilane (SiH 4 ) is set to 100 sccm
  • hydrogen (H 2 ) as the reaction gas flow rate.
  • diborane (B 2 H 6 / H 2 ) using hydrogen as a diluent gas is set to 50 sccm, and the p-layer 131 of microcrystalline silicon can be formed.
  • the substrate 1 on which the p layer 121, the i layer 122, the n layer 123, and the p layer 131 are formed as described above is taken out of the reaction chamber, and the p layer 131 is exposed to the atmosphere. Subsequently, the i layer 132, the barrier layer 135, and the n layer 133 constituting the sixth photoelectric conversion unit 130 are formed on the p layer 131 exposed in the atmosphere in a single plasma CVD reaction chamber.
  • the i layer 132 is formed using a plasma CVD method in the same reaction chamber as that in which the n layer 133 is formed.
  • the substrate temperature is set to 170 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 1600 Pa
  • the reaction gas flow rates are 1800 sccm for monosilane (SiH 4 ) and 18000 sccm for hydrogen (H 2 ).
  • the i layer 132 made of microcrystalline silicon can be formed.
  • the i layer 132 of the sixth photoelectric conversion unit 130 is formed of a microcrystalline silicon germanium ( ⁇ c-SiGe) -based thin film.
  • the i layer 132 is formed using a plasma CVD method in the same reaction chamber as that in which the n layer 133 is formed.
  • the substrate temperature is set to 170 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 1600 Pa
  • the reaction gas flow rate is 1500 sccm for monosilane (SiH 4 )
  • 300 sccm for monogermane
  • the i layer 132 made of microcrystalline silicon germanium ( ⁇ c-SiGe) can be formed under the condition that hydrogen (H 2 ) is set to 180000 sccm.
  • the barrier layer 135 is formed using a plasma CVD method in the same reaction chamber as that in which the i layer 132 is formed. For example, under the conditions where the substrate temperature is set to 170 to 190 ° C., the power supply frequency is set to 13.56 MHz, the pressure in the reaction chamber is set to 1200 Pa, and monosilane (SiH 4 ) is set to 4300 sccm as the reaction gas flow rate, A barrier layer 135 (i-type semiconductor layer) made of amorphous silicon can be formed.
  • the n layer 133 is formed by plasma CVD in the same reaction chamber as that in which the i layer 132 is formed.
  • the substrate temperature is set to 170 to 190 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the pressure in the reaction chamber is set to 1200 Pa
  • monosilane (SiH 4 ) is 720 sccm
  • hydrogen (H 2 ) is used as the reaction gas flow rate.
  • the n-layer 133 of microcrystalline silicon can be formed under the conditions of 108000 sccm and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas at 720 sccm.
  • the manufacturing system of the photoelectric conversion device 10 in the third embodiment is an exposure that exposes the so-called in-line third film forming device 160 and fourth film forming device 170 and the p layer 131 to the atmosphere.
  • An apparatus 190 and a so-called batch-type fifth film forming apparatus 180 are arranged in order.
  • the in-line type third film forming apparatus 160 has a configuration in which a plurality of film forming reaction chambers called chambers are linearly connected. In the third film forming apparatus 160, each of the p layer 111, the i layer 112, and the n layer 113 of the fourth photoelectric conversion unit 3 is formed separately.
  • the in-line type fourth film forming apparatus 170 has a configuration in which a plurality of film forming reaction chambers called chambers are linearly connected.
  • the p layer 121, the i layer 122, the n layer 123 of the fifth photoelectric conversion unit 3, and the p layer 131 of the sixth photoelectric conversion unit 130 are formed separately.
  • the exposure apparatus 190 exposes the substrate processed in the fourth film forming apparatus 170 to the atmosphere, and then moves the substrate to the fifth film forming apparatus 180.
  • the i layer 132, the barrier layer 135, and the n layer 133 in the sixth photoelectric conversion unit 130 are stacked in this order in the same film forming reaction chamber.
  • a plurality of substrates are collectively transferred into such a deposition reaction chamber, and an i layer 132, a barrier layer 135, and an n layer 133 are sequentially formed in each of the plurality of substrates in the deposition reaction chamber. (Batch processing).
  • a load chamber 161 (L: Lord) to which a substrate is first loaded and a vacuum pump for reducing the internal pressure is connected is disposed.
  • a heating chamber that heats the substrate so that the substrate temperature reaches a certain temperature may be provided in the subsequent stage of the load chamber 161 in accordance with the film forming process.
  • a P layer film formation reaction chamber 162 for forming the p layer 111 is connected to the load chamber 161.
  • An I layer deposition reaction chamber 163 for forming the i layer 112 is connected to the P layer deposition reaction chamber 162.
  • An N layer deposition reaction chamber 164 for forming the n layer 113 is connected to the I layer deposition reaction chamber 163.
  • the plurality of reaction chambers 162 and 163 described above are continuously arranged in a straight line.
  • the substrate is sequentially transferred to the reaction chambers 162, 163, 164, and 165, and film formation is performed in each reaction chamber.
  • an insulating transparent substrate 1 on which a transparent conductive film 2 is formed is prepared at a point A shown in FIG.
  • a photoelectric conversion device 10 ⁇ / b> C (a p-layer 111, an i-layer 112, and an n-layer 113 are sequentially provided on the transparent conductive film 2 formed on the insulating transparent substrate 1.
  • the first intermediate product 10) is arranged.
  • the P layer film formation reaction chamber 171 for forming the p layer 121 is connected to the N layer film formation reaction chamber 164.
  • An I-layer deposition reaction chamber 172 for forming the i layer 122 is connected to the P-layer deposition reaction chamber 171.
  • An N layer deposition reaction chamber 173 for forming the n layer 123 is connected to the I layer deposition reaction chamber 172.
  • a P layer deposition reaction chamber 174 for forming the p layer 131 is connected to the N layer deposition reaction chamber 173.
  • an unload chamber 175 (UL: United) that returns the internal pressure from reduced pressure to atmospheric pressure and carries the substrate out of the fourth film deposition apparatus 170.
  • the plurality of reaction chambers 172, 173, 174, and 175 described above are continuously arranged in a straight line between the P layer deposition reaction chamber 171 and the unload chamber 175.
  • the substrate is sequentially transferred to the reaction chambers 171, 172, 173, 174, and 175, and film formation is performed in each reaction chamber.
  • the photoelectric conversion device 10 ⁇ / b> C in which the p layer 121, the i layer 122, the n layer 123, and the p layer 131 of the fifth photoelectric conversion unit 120 are sequentially provided on the n layer 113.
  • the second intermediate product 10) is arranged.
  • the fifth film forming apparatus 180 in the manufacturing system includes a load / unload chamber 181 (L / UL) and an IIN layer film formation reaction chamber 182 connected to the load / unload chamber 181.
  • the load / unload chamber 181 carries the second intermediate product of the photoelectric conversion device processed in the fourth film formation apparatus 170 into the IIN layer film formation reaction chamber 182.
  • the load / unload chamber 181 reduces the internal pressure after the substrate is loaded into the load / unload chamber 181 or returns the internal pressure from the reduced pressure to the atmospheric pressure when the substrate is unloaded from the load / unload chamber 181.
  • the i layer 132, the barrier layer 135, and the n layer 133 of the sixth photoelectric conversion unit 130 are stacked in this order in the same deposition reaction chamber.
  • a plurality of substrates are collectively transferred into such a deposition reaction chamber, and an i layer 132, a barrier layer 135, and an n layer 133 are sequentially formed in each of the plurality of substrates in the deposition reaction chamber. (Batch processing). Therefore, the film formation process in the IIN layer film formation reaction chamber 182 is performed simultaneously on a plurality of substrates.
  • the third intermediate product of the photoelectric conversion device 10 provided with the sixth photoelectric conversion unit 130 is disposed on the fifth photoelectric conversion unit 120.
  • the I-layer deposition reaction chamber 163 includes four reaction chambers 163a, 163b, 163c, and 163d.
  • the I-layer film formation reaction chamber 172 includes four reaction chambers 172a, 172b, 172c, and 172d.
  • film forming processes are simultaneously performed on six substrates.
  • the p layer of the sixth photoelectric conversion unit 130 which is a crystalline photoelectric conversion device is formed on the n layer 123 of the fifth photoelectric conversion unit 120 which is an amorphous photoelectric conversion device.
  • 131 is formed in advance, and the i layer 132, the barrier layer 135, and the n layer 133 of the sixth photoelectric conversion unit 130 are formed on the p layer 131.
  • the barrier layer 135 is formed between the i layer 132 and the n layer 133 of the sixth photoelectric conversion unit 130 in the same film formation chamber (IIN layer film formation reaction chamber 182). Therefore, the photoelectric conversion device 10C (10) having favorable characteristics can be obtained.
  • i layer 132 on p layer 131 exposed in the atmosphere it is desirable to perform hydrogen plasma treatment on p layer 131 exposed in the atmosphere.
  • An n layer 133 in which phases are dispersed in an amorphous crystal phase is obtained. As a result, an effect of activating the surface of the p layer 131 formed on the n layer 133 is obtained.
  • the surface of the p layer 131 of the sixth photoelectric conversion unit 130 can be activated, and the crystal of the i layer 132 of the sixth photoelectric conversion unit 130 stacked on the p layer 131 can be effectively generated. Can do. Therefore, even when the sixth photoelectric conversion unit 130 is formed on a large-area substrate, a uniform crystallization rate distribution can be obtained.
  • both Voc and Jsc can be improved by the function of the barrier layer 135, and the photoelectric conversion efficiency is improved.
  • the manufacturing method of the third embodiment it is possible to easily manufacture the photoelectric conversion device 10C (10) with improved photoelectric conversion efficiency.
  • the substrate processed by the third film forming device 160 is exposed to the atmosphere, and then the substrate is moved to the fourth film forming device 170.
  • a device (not shown) may be provided as necessary.
  • Example 1 and Comparative Example 1 a photoelectric conversion device having a tandem structure was manufactured.
  • Examples 2 to 7 and Comparative Example 2 photoelectric conversion devices having a single structure were manufactured.
  • Examples 8 to 9 and Comparative Examples 3 to 4 photoelectric conversion devices having a triple structure were manufactured.
  • a photoelectric conversion device was manufactured using a substrate having a size of 1100 mm ⁇ 1400 mm.
  • Example 1 a photoelectric conversion device having a structure in which a first photoelectric conversion unit was formed on a substrate and a second photoelectric conversion unit was formed on the first photoelectric conversion unit was produced. Specifically, in Example 1, a p-layer made of an amorphous amorphous silicon-based thin film constituting the first photoelectric conversion unit, a buffer layer, an i-layer made of an amorphous amorphous silicon-based thin film, and an i-layer An n layer containing microcrystalline silicon and a p layer containing microcrystalline silicon constituting the second photoelectric conversion unit were sequentially stacked on the substrate using a plurality of different deposition chambers.
  • the p layer of the second photoelectric conversion unit was exposed to the atmosphere.
  • hydrogen plasma treatment was performed on the p layer of the second photoelectric conversion unit using hydrogen (H 2 ) as a process gas.
  • an i layer made of microcrystalline silicon, an i layer (barrier layer) made of an amorphous amorphous silicon thin film, and an n layer made of microcrystalline silicon constituting the second photoelectric conversion unit were formed.
  • Example 1 the p layer, i layer, n layer of the first photoelectric conversion unit, and the p layer of the second photoelectric conversion unit were formed using a plasma CVD method in individual reaction chambers.
  • the substrate temperature is set to 190 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the pressure in the reaction chamber is set to 110 Pa
  • monosilane (SiH 4 ) is 300 sccm as a reaction gas flow rate.
  • the film is formed to a thickness of 80 mm under the conditions that hydrogen (H 2 ) is set to 2300 sccm, diborane (B 2 H 6 / H 2 ) using hydrogen as a diluent gas is set to 180 sccm, and methane (CH 4 ) is set to 500 sccm. did.
  • the substrate temperature is set to 190 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the pressure in the reaction chamber is set to 110 Pa
  • monosilane (SiH 4 ) is 300 sccm
  • hydrogen (H 2 ) as the reaction gas flow rate. ) was set to 2300 sccm and methane (CH 4 ) was set to 100 sccm.
  • the substrate temperature is set to 190 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 80 Pa
  • monosilane (SiH 4 ) is used as the reaction gas flow rate.
  • the film was formed to a thickness of 1800 mm under the condition set to 1200 sccm.
  • the n layer of the first photoelectric conversion unit has a substrate temperature set to 180 ° C., a power supply frequency set to 13.56 MHz, a reaction chamber pressure set to 700 Pa, and monosilane (SiH 4 ) as a reaction gas flow rate.
  • the film was formed to a thickness of 100 ⁇ under the conditions of 180 sccm, hydrogen (H 2 ) of 27000 sccm, and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas at 200 sccm.
  • the substrate temperature is set to 180 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 700 Pa
  • monosilane (SiH 4 ) is set as the reaction gas flow rate.
  • the film was formed to a thickness of 150 mm under the conditions of 100 sccm, hydrogen (H 2 ) 25000 sccm, and diborane (B 2 H 6 / H 2 ) using hydrogen as a diluent gas at 50 sccm.
  • the p layer of the second photoelectric conversion unit was exposed to the atmosphere here.
  • plasma treatment was performed under the conditions that the substrate temperature was set to 190 ° C., the power supply frequency was set to 13.56 MHz, the pressure in the reaction chamber was set to 700 Pa, and H 2 was set to 1000 sccm as the process gas. did. That is, H 2 gas in a plasma state was exposed to the p layer.
  • the substrate temperature is set to 170 ° C.
  • the applied RF power is set to 550 W
  • the pressure in the reaction chamber is set to 1200 Pa
  • monosilane (SiH 4 ) is 40 sccm as the reaction gas flow rate.
  • hydrogen (H 2 ) was set to 2800 sccm
  • a film having a thickness of 15000 mm was formed. At this time, the film formation rate was 262 Km / min.
  • the substrate temperature is set to 170 ° C.
  • the applied RF power is set to 40 W
  • the reaction chamber pressure is set to 40 Pa
  • monosilane (SiH 4 ) is 300 sccm as the reaction gas flow rate.
  • the film was formed to a film thickness of 50 mm under the conditions set as above. The film formation rate at this time was 141 ⁇ / min.
  • the substrate temperature is set to 170 ° C.
  • the applied RF power is set to 1000 W
  • the reaction chamber pressure is set to 800 Pa
  • monosilane (SiH 4 ) is 20 sccm as the reaction gas flow rate.
  • a film having a thickness of 300 mm was formed under the conditions where hydrogen (H 2 ) was set to 2000 sccm and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas was set to 15 sccm. At this time, the film formation rate was 174 ⁇ / min.
  • Comparative Example 1 a barrier layer was not formed between the i layer and the n layer of the second photoelectric conversion unit, and a photoelectric conversion device having a tandem structure was produced in the same manner as in Example 1. Specifically, the p layer, the buffer layer, the i layer, the n layer formed on the i layer, and the p layer constituting the second photoelectric conversion unit constituting the first photoelectric conversion unit are formed into a plurality of different films. The layers were sequentially stacked on the substrate using a chamber. Thereafter, the p layer of the second photoelectric conversion unit was exposed to the atmosphere. Next, hydrogen plasma treatment was performed on the p layer of the second photoelectric conversion unit. Then, i layer and n layer which comprise a 2nd photoelectric conversion unit were formed.
  • Example 2 the p layer containing microcrystalline silicon constituting the third photoelectric conversion unit on the substrate, the i layer made of microcrystalline silicon, the i layer made of an amorphous silicon thin film (barrier layer), A photoelectric conversion device having a structure in which an n layer made of microcrystalline silicon was formed was manufactured.
  • the p layer, i layer, barrier layer, and n layer of the third photoelectric conversion unit were formed using the plasma CVD method in the same film formation chamber.
  • the p layer of the third photoelectric conversion unit has a substrate temperature set to 180 ° C., a power supply frequency set to 13.56 MHz, a reaction chamber pressure set to 700 Pa, and monosilane (SiH 4 ) as a reaction gas flow rate of 100 sccm,
  • the film was formed to a thickness of 150 mm under the conditions that hydrogen (H 2 ) was set to 25000 sccm and diborane (B 2 H 6 / H 2 ) using hydrogen as a diluent gas was set to 50 sccm.
  • the substrate temperature is set to 170 ° C.
  • the applied RF power is set to 550 W
  • the reaction chamber pressure is set to 1200 Pa
  • monosilane (SiH 4 ) is 40 sccm as the reaction gas flow rate.
  • hydrogen (H 2 ) was set to 2800 sccm
  • a film having a thickness of 15000 mm was formed. At this time, the film formation rate was 262 Km / min.
  • the substrate temperature is set to 170 ° C.
  • the applied RF power is set to 40 W
  • the reaction chamber pressure is set to 40 Pa
  • monosilane (SiH 4 ) is 300 sccm as the reaction gas flow rate.
  • the film was formed to a thickness of 10 mm under the conditions set as above. The film formation rate at this time was 141 ⁇ / min.
  • the substrate temperature is set to 170 ° C.
  • the applied RF power is set to 1000 W
  • the reaction chamber pressure is set to 800 Pa
  • monosilane (SiH 4 ) is 20 sccm as the reaction gas flow rate.
  • a film having a thickness of 300 mm was formed under the conditions where hydrogen (H 2 ) was set to 2000 sccm and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas was set to 15 sccm. At this time, the film formation rate was 174 ⁇ / min.
  • the photoelectric conversion devices in Examples 3 to 7 are microcrystalline photoelectric conversion devices having a single structure that is the same as the structure of Example 2 except for the thickness of the barrier layer. Moreover, the thickness of the barrier layer in Example 3 is 20 mm. The thickness of the barrier layer in Example 4 is 50 mm. The thickness of the barrier layer in Example 5 is 100 mm. The thickness of the barrier layer in Example 6 is 150 mm. The thickness of the barrier layer in Example 7 is 200 mm.
  • Comparative Example 2 a barrier layer was not formed between the i layer and the n layer of the third photoelectric conversion unit, and a microcrystalline photoelectric conversion device having a single structure was produced in the same manner as in Example 2. did. That is, a p-layer containing microcrystalline silicon is formed on a substrate, and then an i layer made of microcrystalline silicon and an n layer made of microcrystalline silicon are sequentially formed to form the photoelectric conversion device of Comparative Example 2. Has been.
  • Example 8 the fourth photoelectric conversion unit is formed on the substrate, the fifth photoelectric conversion unit is formed on the fourth photoelectric conversion unit, and the sixth photoelectric conversion unit is formed on the fifth photoelectric conversion unit.
  • a photoelectric conversion device having the above structure was manufactured.
  • the fourth photoelectric conversion unit is composed of an amorphous amorphous silicon carbide (a-SiC) thin film, a p layer, a buffer layer, and an amorphous amorphous silicon thin film.
  • a-SiC amorphous amorphous silicon carbide
  • An i layer and an n layer containing microcrystalline silicon formed on the i layer were sequentially stacked on the substrate using a plurality of different deposition chambers. Thereafter, the n layer of the fourth photoelectric conversion unit was exposed to the atmosphere.
  • Example 8 the p layer, i layer, n layer of the fourth photoelectric conversion unit, the p layer, i layer, n layer of the fifth photoelectric conversion unit, and the p layer of the sixth photoelectric conversion unit are different from each other.
  • the layers were sequentially stacked on the substrate using a plasma CVD method in a film formation chamber.
  • the i layer of the sixth photoelectric conversion unit, the i layer (barrier layer) made of an amorphous amorphous silicon thin film, and the n layer were formed by plasma CVD in the same film formation chamber.
  • the substrate temperature is set to 190 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the pressure in the reaction chamber is set to 110 Pa
  • monosilane (SiH 4 ) is 300 sccm as a reaction gas flow rate
  • the film is formed to a thickness of 80 mm under the conditions that hydrogen (H 2 ) is set to 2300 sccm, diborane (B 2 H 6 / H 2 ) using hydrogen as a diluent gas is set to 180 sccm, and methane (CH 4 ) is set to 500 sccm. did.
  • the substrate temperature is set to 190 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the pressure in the reaction chamber is set to 110 Pa
  • monosilane (SiH 4 ) is 300 sccm
  • hydrogen (H 2 ) as the reaction gas flow rate. ) was set to 2300 sccm
  • methane (CH 4 ) was set to 100 sccm.
  • the substrate temperature is set to 190 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 80 Pa
  • monosilane (SiH 4 ) is used as the reaction gas flow rate.
  • the film was formed to a thickness of 1000 mm under the condition set to 1200 sccm.
  • the substrate temperature is set to 180 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 700 Pa
  • monosilane (SiH 4 ) is used as the reaction gas flow rate.
  • a film having a thickness of 300 mm was formed under the conditions of 180 sccm, hydrogen (H 2 ) of 27000 sccm, and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas at 200 sccm.
  • the n layer of the fourth photoelectric conversion unit was exposed to the atmosphere here.
  • plasma treatment was performed under the conditions that the substrate temperature was set to 190 ° C., the power supply frequency was set to 13.56 MHz, the pressure in the reaction chamber was set to 700 Pa, and H 2 was set to 1000 sccm as the process gas. did.
  • the substrate temperature is set to 180 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 700 Pa
  • monosilane (SiH 4 ) is used as the reaction gas flow rate.
  • hydrogen (H 2) is 25000Sccm
  • diborane hydrogen is used as the diluent gas (B 2 H 6 / H 2 ) was set to 50 sccm, and formed into a film having a thickness of 200 ⁇ .
  • the substrate temperature is set to 190 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 80 Pa
  • monosilane (SiH 4 ) is used as the reaction gas flow rate.
  • the film was formed to a thickness of 1200 mm under the conditions that 700 sccm and monogermane (GeH 4 ) were set to 500 sccm.
  • the substrate temperature is set to 180 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 700 Pa
  • monosilane (SiH 4 ) is used as the reaction gas flow rate.
  • a film having a thickness of 300 mm was formed under the conditions of 180 sccm, hydrogen (H 2 ) of 27000 sccm, and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas at 200 sccm.
  • the substrate temperature is set to 180 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 700 Pa
  • the reaction gas flow rate is monosilane (SiH 4 ).
  • hydrogen (H 2) is 25000Sccm
  • diborane hydrogen is used as the diluent gas (B 2 H 6 / H 2 ) was set to 50 sccm, and formed into a film having a thickness of 200 ⁇ .
  • the p layer of the sixth photoelectric conversion unit was exposed to the atmosphere here.
  • the reaction chamber pressure is 1200 Pa
  • H 2 as a process gas in the conditions set in the 4000 sccm
  • facilities plasma treatment did.
  • the substrate temperature is set to 170 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 1600 Pa
  • monosilane (SiH 4 ) is used as the reaction gas flow rate.
  • the film was formed to a thickness of 15000 mm under the conditions of 1800 sccm and hydrogen (H 2 ) of 180000 sccm.
  • the barrier layer of the sixth photoelectric conversion unit has a substrate temperature set at 170 ° C., a power supply frequency set at 13.56 MHz, a reaction chamber pressure set at 1200 Pa, and monosilane (SiH 4 ) as a reaction gas flow rate.
  • the film was formed to a thickness of 100 mm under the condition set to 4300 sccm.
  • the substrate temperature is set to 170 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 1200 Pa
  • monosilane (SiH 4 ) is used as the reaction gas flow rate.
  • a film was formed to a thickness of 300 mm under the conditions of 720 sccm, hydrogen (H 2 ) of 108000 sccm, and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas at 720 sccm.
  • Comparative Example 3 a barrier layer was not formed between the i layer and the n layer of the sixth photoelectric conversion unit, and a photoelectric conversion device having a triple structure was produced in the same manner as in Example 8. Specifically, a p layer, a buffer layer, an i layer, and an n layer formed on the i layer constituting the fourth photoelectric conversion unit are sequentially stacked on the substrate using a plurality of different film forming chambers. . Thereafter, the n layer of the fourth photoelectric conversion unit was exposed to the atmosphere. Next, hydrogen plasma treatment was performed on the n layer of the fourth photoelectric conversion unit.
  • the p-layer, i-layer, and n-layer constituting the fifth photoelectric conversion unit, and the p-layer constituting the sixth photoelectric conversion unit were sequentially stacked on the substrate using a plurality of different film formation chambers. . Thereafter, the p layer of the sixth photoelectric conversion unit was exposed to the atmosphere. Next, hydrogen plasma treatment was performed on the p layer of the sixth photoelectric conversion unit. Then, i layer and n layer which comprise a 6th photoelectric conversion unit were formed.
  • Example 9 the fourth photoelectric conversion unit is formed on the substrate, the fifth photoelectric conversion unit is formed on the fourth photoelectric conversion unit, and the sixth photoelectric conversion unit is formed on the fifth photoelectric conversion unit.
  • a photoelectric conversion device having the above structure was manufactured.
  • the fourth photoelectric conversion unit is composed of an amorphous amorphous silicon carbide (a-SiC) thin film, a p layer, a buffer layer, and an amorphous amorphous silicon thin film.
  • a-SiC amorphous amorphous silicon carbide
  • An i layer and an n layer containing microcrystalline silicon formed on the i layer were sequentially stacked on the substrate using a plurality of different deposition chambers. Thereafter, the n layer of the fourth photoelectric conversion unit was exposed to the atmosphere.
  • hydrogen plasma treatment was performed on the n layer of the fourth photoelectric conversion unit using hydrogen (H 2 ) as a process gas. Thereafter, an i layer composed of an amorphous silicon germanium (a-SiGe) thin film constituting the fifth photoelectric conversion unit, an n layer formed on the i layer and containing microcrystalline silicon, and a microcrystalline silicon constituting the sixth photoelectric conversion unit The p layer containing was sequentially laminated on the substrate using a plurality of different film formation chambers. Thereafter, the p layer of the sixth photoelectric conversion unit was exposed to the atmosphere. Next, hydrogen plasma treatment was performed on the p layer of the sixth photoelectric conversion unit using hydrogen (H 2 ) as a process gas.
  • hydrogen (H 2 ) hydrogen
  • Example 9 the p layer, i layer, n layer of the fourth photoelectric conversion unit, the p layer, i layer, n layer of the fifth photoelectric conversion unit, and the p layer of the sixth photoelectric conversion unit are different from each other.
  • the layers were sequentially stacked on the substrate using a plasma CVD method in a film formation chamber.
  • the i layer of the sixth photoelectric conversion unit, the i layer (barrier layer) made of an amorphous amorphous silicon thin film, and the n layer were formed by plasma CVD in the same film formation chamber.
  • the substrate temperature is set to 190 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the pressure in the reaction chamber is set to 110 Pa
  • monosilane (SiH 4 ) is 300 sccm as a reaction gas flow rate
  • the film is formed to a thickness of 80 mm under the conditions that hydrogen (H 2 ) is set to 2300 sccm, diborane (B 2 H 6 / H 2 ) using hydrogen as a diluent gas is set to 180 sccm, and methane (CH 4 ) is set to 500 sccm. did.
  • the substrate temperature is set to 190 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the pressure in the reaction chamber is set to 110 Pa
  • monosilane (SiH 4 ) is 300 sccm
  • hydrogen (H 2 ) as the reaction gas flow rate. ) was set to 2300 sccm
  • methane (CH 4 ) was set to 100 sccm.
  • the substrate temperature is set to 190 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 80 Pa
  • monosilane (SiH 4 ) is used as the reaction gas flow rate.
  • the film was formed to a thickness of 1000 mm under the condition set to 1200 sccm.
  • the substrate temperature is set to 180 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 700 Pa
  • monosilane (SiH 4 ) is used as the reaction gas flow rate.
  • a film having a thickness of 300 mm was formed under the conditions of 180 sccm, hydrogen (H 2 ) of 27000 sccm, and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas at 200 sccm.
  • the n layer of the fourth photoelectric conversion unit was exposed to the atmosphere here.
  • plasma treatment was performed under the conditions that the substrate temperature was set to 190 ° C., the power supply frequency was set to 13.56 MHz, the pressure in the reaction chamber was set to 700 Pa, and H 2 was set to 1000 sccm as the process gas. did.
  • the substrate temperature is set to 180 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 700 Pa
  • monosilane (SiH 4 ) is used as the reaction gas flow rate.
  • hydrogen (H 2) is 25000Sccm
  • diborane hydrogen is used as the diluent gas (B 2 H 6 / H 2 ) was set to 50 sccm, and formed into a film having a thickness of 200 ⁇ .
  • the substrate temperature is set to 190 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 80 Pa
  • monosilane (SiH 4 ) is used as the reaction gas flow rate.
  • the film was formed to a thickness of 1200 mm under the conditions that 700 sccm and monogermane (GeH 4 ) were set to 500 sccm.
  • the substrate temperature is set to 180 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 700 Pa
  • monosilane (SiH 4 ) is used as the reaction gas flow rate.
  • a film having a thickness of 300 mm was formed under the conditions of 180 sccm, hydrogen (H 2 ) of 27000 sccm, and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas at 200 sccm.
  • the substrate temperature is set to 180 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 700 Pa
  • the reaction gas flow rate is monosilane (SiH 4 ).
  • hydrogen (H 2) is 25000Sccm
  • diborane hydrogen is used as the diluent gas (B 2 H 6 / H 2 ) was set to 50 sccm, and formed into a film having a thickness of 200 ⁇ .
  • the p layer of the sixth photoelectric conversion unit was exposed to the atmosphere here.
  • the reaction chamber pressure is 1200 Pa
  • H 2 as a process gas in the conditions set in the 4000 sccm
  • facilities plasma treatment did.
  • the substrate temperature is set to 170 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 1600 Pa
  • monosilane (SiH 4 ) is used as the reaction gas flow rate.
  • a film having a thickness of 9000 mm was formed under the conditions of 1500 sccm, monogermane (GeH 4 ) of 300 sccm, and hydrogen (H 2 ) of 180,000 sccm.
  • the barrier layer of the sixth photoelectric conversion unit has a substrate temperature set at 170 ° C., a power supply frequency set at 13.56 MHz, a reaction chamber pressure set at 1200 Pa, and monosilane (SiH 4 ) as a reaction gas flow rate.
  • the film was formed to a thickness of 100 mm under the condition set to 4300 sccm.
  • the substrate temperature is set to 180 ° C.
  • the power supply frequency is set to 13.56 MHz
  • the reaction chamber pressure is set to 1200 Pa
  • monosilane (SiH 4 ) is used as the reaction gas flow rate.
  • a film was formed to a thickness of 300 mm under the conditions of 720 sccm, hydrogen (H 2 ) of 108000 sccm, and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas at 720 sccm.
  • a barrier layer was not formed between the i layer and the n layer of the sixth photoelectric conversion unit, and a photoelectric conversion device having a triple structure was produced in the same manner as in Example 9. Specifically, a p layer, a buffer layer, an i layer, and an n layer formed on the i layer constituting the fourth photoelectric conversion unit are sequentially stacked on the substrate using a plurality of different film forming chambers. . Thereafter, the n layer of the fourth photoelectric conversion unit was exposed to the atmosphere. Next, hydrogen plasma treatment was performed on the n layer of the fourth photoelectric conversion unit.
  • the p-layer, i-layer, and n-layer constituting the fifth photoelectric conversion unit, and the p-layer constituting the sixth photoelectric conversion unit were sequentially stacked on the substrate using a plurality of different film formation chambers. . Thereafter, the p layer of the sixth photoelectric conversion unit was exposed to the atmosphere. Next, hydrogen plasma treatment was performed on the p layer of the sixth photoelectric conversion unit. Then, i layer and n layer which comprise a 6th photoelectric conversion unit were formed.
  • Table 1 shows experimental results regarding a photoelectric conversion device having a tandem structure.
  • the photoelectric conversion devices of Example 1 and Comparative Example 1 were irradiated with AM 1.5 light at a light amount of 100 mW / cm 2 and output characteristics at 25 ° C. as photoelectric characteristics ( ⁇ ), short-circuit current (Jsc), open-circuit voltage (Voc) and fill factor (FF) were measured.
  • the results are shown in Table 1.
  • a discharge curve is shown in FIG. 7, and the relationship between a wavelength and electric power generation efficiency is shown in FIG.
  • FIGS. 9 to 11 are a graph in which ⁇ , Jsc, and Voc (vertical axis) are plotted with respect to the thickness of the barrier layer (horizontal axis).
  • the effect of increasing the photoelectric conversion efficiency ⁇ is confirmed when the thickness of the barrier layer is in the range of 10 to 200 mm.
  • the thickness of the barrier layer is 50 mm or more, Jsc decreases, but Voc and FF increase. This shows that ⁇ is improved.
  • the photoelectric conversion efficiency ⁇ is substantially constant when the thickness of the barrier layer is 200 mm or more, and it has not been confirmed that the photoelectric conversion efficiency ⁇ is further improved.
  • the thickness of the barrier layer may be 200 mm or more, but is preferably 200 mm or less in consideration of the film formation efficiency. If the photoelectric conversion device is evaluated based on Jsc, the thickness of the barrier layer is preferably 10 to 200 mm, and particularly preferably 20 to 100 mm.
  • the intensity of Raman scattered light observed with a laser Raman microscope will be described.
  • the intensity of Raman scattered light caused by the amorphous phase dispersed in the i layer made of microcrystals is represented by Ia
  • the intensity of Raman scattered light caused by the microcrystalline phase dispersed in the i layer made of microcrystals is expressed as Ia.
  • Ic the crystallization rate in the i layer composed of microcrystals constituting the photoelectric conversion device
  • Ic / Ia the crystallization ratio in the i layer composed of microcrystals constituting the photoelectric conversion device.
  • FIG. 12 shows the relationship between the crystallization ratio Ic / Ia and the Jsc of the photoelectric conversion device.
  • the solid line indicates the result in the photoelectric conversion device provided with the barrier layer of the present invention
  • the broken line indicates the result in the photoelectric conversion device not provided with the barrier layer of the present invention.
  • Jsc can be improved by the layer structure of the present invention in which a barrier layer is provided regardless of the crystallization rate (Ic / Ia) of the i-layer made of microcrystals. I understand. Therefore, Ic / Ia increases and Jsc increases as the microcrystalline layer manufacturing conditions are changed. However, Ic / Ia of the structure (microcrystalline layer) provided with the barrier layer and the barrier layer are provided.
  • the Jsc in the structure with the barrier layer can be increased. Even if Ic / Ia varies, Jsc in the structure provided with the barrier layer can be increased. That is, the effect obtained by the barrier layer (increase in Jsc) is not related to the increase in Ic / Ia.
  • the present invention is widely applicable to photoelectric conversion devices and methods for manufacturing photoelectric conversion devices.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Inorganic Chemistry (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Development (AREA)
  • Sustainable Energy (AREA)
  • Photovoltaic Devices (AREA)

Abstract

A photoelectric conversion device (10) is comprised of a substrate (1); a transparent conductive film (2) formed on the substrate (1); a first photoelectric conversion unit (3) which is composed of a first p-type semiconductor layer (31), a first i-type semiconductor layer (32), and a first n-type semiconductor layer (33), and is formed on the transparent conductive film (2); and a second photoelectric conversion unit (4) which is comprised of a second p-type semiconductor layer (41), i.e., a crystalline silicon type thin film, a second i-type semiconductor layer (42), a second n-type semiconductor layer (43), and a barrier layer (45), i.e., an i-type semiconductor layer composed of an amorphous silicon thin film provided between the second i-type semiconductor layer (42) and the second n-type semiconductor layer (43), and which is formed on the first photoelectric conversion unit (3).

Description

光電変換装置及び光電変換装置の製造方法Photoelectric conversion device and method of manufacturing photoelectric conversion device
　本発明は、薄膜を利用した光電変換装置及び光電変換装置の製造方法に関する。
　本願は、２００９年６月１８日に出願された特願２００９－１４５６９１号及び２００９年１０月１日に出願された特願２００９－２２９８８１号に基づき優先権を主張し、その内容をここに援用する。 The present invention relates to a photoelectric conversion device using a thin film and a method for manufacturing the photoelectric conversion device.
The present application claims priority based on Japanese Patent Application No. 2009-145691 filed on June 18, 2009 and Japanese Patent Application No. 2009-229881 filed on October 1, 2009, the contents of which are incorporated herein by reference. To do.
　近年、光電変換装置は、太陽電池又は光センサ等に一般的に利用されており、とりわけ太陽電池においては、エネルギーの効率的な利用の観点から広く普及を始めている。特に、単結晶シリコンを利用した光電変換装置は、単位面積当たりのエネルギー変換効率に優れている。
　しかし、一方で単結晶シリコンを利用した光電変換装置は、単結晶シリコンインゴットをスライスしたシリコンウエハを用いるため、インゴットの製造に大量のエネルギーが費やされ、製造コストが高い。
　例えば、屋外等に設置される大面積の光電変換装置を、単結晶シリコンを利用して製造すると、現状では相当にコストが掛かる。
　そこで、より安価に製造可能なアモルファス（非晶質）シリコン薄膜（以下、「ａ－Ｓｉ薄膜」とも表記する）を利用した光電変換装置が、ローコストな光電変換装置として普及している。 In recent years, photoelectric conversion devices are generally used for solar cells, optical sensors, and the like, and in particular, solar cells have begun to spread widely from the viewpoint of efficient use of energy. In particular, a photoelectric conversion device using single crystal silicon is excellent in energy conversion efficiency per unit area.
However, on the other hand, since a photoelectric conversion device using single crystal silicon uses a silicon wafer obtained by slicing a single crystal silicon ingot, a large amount of energy is consumed for manufacturing the ingot and the manufacturing cost is high.
For example, if a large-area photoelectric conversion device installed outdoors or the like is manufactured using single crystal silicon, it is considerably expensive at present.
Thus, a photoelectric conversion device using an amorphous (amorphous) silicon thin film (hereinafter also referred to as “a-Si thin film”) that can be manufactured at a lower cost is widely used as a low-cost photoelectric conversion device.
　ところが、このアモルファス（非晶質）シリコン薄膜を利用した光電変換装置の変換効率は、単結晶シリコン又は多結晶シリコン等を利用した結晶型の光電変換装置の変換効率に比べて低い。
　そこで、光電変換装置の変換効率を向上させる構造として、２つの光電変換ユニットが積層されたタンデム型の構造が提案されている。
　例えば、図１７に示すようなタンデム型の光電変換装置２００が知られている（例えば、特許文献１参照）。
　この光電変換装置２００においては、透明導電膜２０２が配された絶縁性の透明基板２０１が用いられている。透明導電膜２０２上には、ｐ型半導体層２３１（ｐ層）、ｉ型シリコン層２３２（非晶質シリコン層，ｉ層）、及びｎ型半導体層２３３（ｎ層）を順次積層して得られたｐｉｎ型の第一光電変換ユニット２０３が形成されている。第一光電変換ユニット２０３上には、ｐ型半導体層２４１（ｐ層）、ｉ型シリコン層２４２（結晶質シリコン層，ｉ層）、及びｎ型半導体層２４３（ｎ層）を順次積層して得られたｐｉｎ型の第二光電変換ユニット２０４が形成されている。更に、第二光電変換ユニット２０４上には、裏面電極２０５が形成されている。 However, the conversion efficiency of a photoelectric conversion device using this amorphous (amorphous) silicon thin film is lower than the conversion efficiency of a crystalline photoelectric conversion device using single crystal silicon or polycrystalline silicon.
Therefore, as a structure for improving the conversion efficiency of the photoelectric conversion device, a tandem structure in which two photoelectric conversion units are stacked has been proposed.
For example, a tandem photoelectric conversion device 200 as shown in FIG. 17 is known (see, for example, Patent Document 1).
In this photoelectric conversion device 200, an insulating transparent substrate 201 provided with a transparent conductive film 202 is used. A p-type semiconductor layer 231 (p layer), an i-type silicon layer 232 (amorphous silicon layer, i layer), and an n-type semiconductor layer 233 (n layer) are sequentially stacked on the transparent conductive film 202. A pin-type first photoelectric conversion unit 203 is formed. A p-type semiconductor layer 241 (p layer), an i-type silicon layer 242 (crystalline silicon layer, i layer), and an n-type semiconductor layer 243 (n layer) are sequentially stacked on the first photoelectric conversion unit 203. The obtained pin type second photoelectric conversion unit 204 is formed. Further, a back electrode 205 is formed on the second photoelectric conversion unit 204.
　このような従来のタンデム構造を有する光電変換装置における波長と発電効率との関係を図１８に示す。図１８においては、非晶質のシリコン系薄膜からなるｐｉｎ型の第一光電変換ユニット及び結晶質のシリコン系薄膜からなるｐｉｎ型の第二光電変換ユニットの各々の波長と発電効率との関係が示されている。
　図１８に示されるように、結晶質のシリコン系薄膜からなるｐｉｎ型の第二光電変換ユニットにおいては、長波長領域における発電効率が低い。このため、第一光電変換ユニット及び第二光電変換ユニットを含む光電変換装置全体における光電変換効率を向上させることが困難であった。 FIG. 18 shows the relationship between the wavelength and the power generation efficiency in the photoelectric conversion device having such a conventional tandem structure. In FIG. 18, the relationship between the wavelength and the power generation efficiency of each of the pin-type first photoelectric conversion unit made of an amorphous silicon-based thin film and the pin-type second photoelectric conversion unit made of a crystalline silicon-based thin film is shown. It is shown.
As shown in FIG. 18, the pin-type second photoelectric conversion unit made of a crystalline silicon thin film has low power generation efficiency in the long wavelength region. For this reason, it was difficult to improve the photoelectric conversion efficiency in the whole photoelectric conversion apparatus including the first photoelectric conversion unit and the second photoelectric conversion unit.
日本国特許第３５８９５８１号公報Japanese Patent No. 3589581
　本発明は、上記の課題を解決するためになされたものであって、タンデム構造を有する光電変換装置において、結晶質のシリコン系薄膜からなるｐｉｎ型の第二光電変換ユニットにおける長波長領域の発電効率を改善し、光電変換効率を向上させることを第一の目的とする。
　また、本発明は、光電変換効率が向上されたタンデム構造を有する光電変換装置を簡便な方法で製造することができる光電変換装置の製造方法を提供することを第二の目的とする。
　また、本発明は、結晶質のシリコン系薄膜からなるｐｉｎ型の光電変換ユニットを備えたシングル構造を有する光電変換装置において、長波長領域の発電効率を改善し、光電変換効率を向上させることを第三の目的とする。
　また、本発明は、光電変換効率が向上れたシングル構造を有する光電変換装置を簡便な方法で製造することができる光電変換装置の製造方法を提供することを第四の目的とする。 The present invention has been made to solve the above-described problem, and in a photoelectric conversion device having a tandem structure, power generation in a long wavelength region in a pin-type second photoelectric conversion unit made of a crystalline silicon-based thin film. The primary purpose is to improve efficiency and improve photoelectric conversion efficiency.
Moreover, this invention makes it the 2nd objective to provide the manufacturing method of the photoelectric conversion apparatus which can manufacture the photoelectric conversion apparatus which has a tandem structure with improved photoelectric conversion efficiency by a simple method.
Further, the present invention provides a photoelectric conversion device having a single structure including a pin-type photoelectric conversion unit made of a crystalline silicon-based thin film, improving power generation efficiency in a long wavelength region and improving photoelectric conversion efficiency. Third purpose.
Moreover, this invention makes it the 4th objective to provide the manufacturing method of the photoelectric conversion apparatus which can manufacture the photoelectric conversion apparatus which has a single structure with improved photoelectric conversion efficiency by a simple method.
　本発明の第１態様の光電変換装置は、基板と、前記基板上に形成された透明導電膜と、第一ｐ型半導体層，第一ｉ型半導体層，及び第一ｎ型半導体層を含み、前記透明導電膜上に形成された第一光電変換ユニットと、結晶質のシリコン系薄膜である第二ｐ型半導体層，第二ｉ型半導体層，及び第二ｎ型半導体層と、前記第二ｉ型半導体層及び前記第二ｎ型半導体層の間に設けられたアモルファスシリコン系薄膜のｉ型半導体層であるバリア層とを含み、前記第一光電変換ユニット上に形成された第二光電変換ユニットとを含む。
　本発明の第１態様の光電変換装置においては、前記バリア層の厚さは、１０～２００Åの範囲であることが好ましい、ここで、「１Å」は「０．１ｎｍ」である。 The photoelectric conversion device according to the first aspect of the present invention includes a substrate, a transparent conductive film formed on the substrate, a first p-type semiconductor layer, a first i-type semiconductor layer, and a first n-type semiconductor layer. A first photoelectric conversion unit formed on the transparent conductive film, a second p-type semiconductor layer, a second i-type semiconductor layer, and a second n-type semiconductor layer, which are crystalline silicon thin films, A second photoelectric layer formed on the first photoelectric conversion unit, including a barrier layer that is an i-type semiconductor layer of an amorphous silicon thin film provided between the second i-type semiconductor layer and the second n-type semiconductor layer. Including a conversion unit.
In the photoelectric conversion device of the first aspect of the present invention, the thickness of the barrier layer is preferably in the range of 10 to 200 mm, where “1 mm” is “0.1 nm”.
　本発明の第２態様の光電変換装置の製造方法は、透明導電膜が形成された基板を準備し、前記透明導電膜上に、第一光電変換ユニットを構成する第一ｐ型半導体層，第一ｉ型半導体層，及び第一ｎ型半導体層を順に形成し、前記第一ｎ型半導体層上に、第二光電変換ユニットを構成する結晶質のシリコン系薄膜である第二ｐ型半導体層，第二ｉ型半導体層を順に形成し、前記第二ｉ型半導体層上に、アモルファスシリコン系薄膜のｉ型半導体層であるバリア層を形成し、前記バリア層上に、前記第二光電変換ユニットを構成する結晶質のシリコン系薄膜である第二ｎ型半導体層を形成する。 According to a second aspect of the present invention, there is provided a photoelectric conversion device manufacturing method comprising: preparing a substrate on which a transparent conductive film is formed; and forming a first p-type semiconductor layer constituting a first photoelectric conversion unit on the transparent conductive film, A first p-type semiconductor layer, which is a crystalline silicon-based thin film that forms a second photoelectric conversion unit on the first n-type semiconductor layer by sequentially forming an i-type semiconductor layer and a first n-type semiconductor layer. , A second i-type semiconductor layer is formed in order, a barrier layer that is an i-type semiconductor layer of an amorphous silicon thin film is formed on the second i-type semiconductor layer, and the second photoelectric conversion is formed on the barrier layer. A second n-type semiconductor layer, which is a crystalline silicon-based thin film constituting the unit, is formed.
　本発明の第３態様の光電変換装置は、基板と、前記基板上に形成された透明導電膜と、結晶質のシリコン系薄膜である第三ｐ型半導体層，第三ｉ型半導体層，及び第三ｎ型半導体層と、前記第三ｉ型半導体層及び前記第三ｎ型半導体層の間に設けられたアモルファスシリコン系薄膜のｉ型半導体層であるバリア層とを含み、前記透明導電膜上に形成された第三光電変換ユニットとを含む。 A photoelectric conversion device according to a third aspect of the present invention includes a substrate, a transparent conductive film formed on the substrate, a third p-type semiconductor layer, a third i-type semiconductor layer that are crystalline silicon-based thin films, and A third n-type semiconductor layer; and a barrier layer that is an i-type semiconductor layer of an amorphous silicon thin film provided between the third i-type semiconductor layer and the third n-type semiconductor layer, and the transparent conductive film A third photoelectric conversion unit formed above.
　本発明の第４態様の光電変換装置の製造方法は、透明導電膜が形成された基板を準備し、前記透明導電膜上に、第三光電変換ユニットを構成する結晶質のシリコン系薄膜である第三ｐ型半導体層，第三ｉ型半導体層を順に形成し、前記第三ｉ型半導体層上に、アモルファスシリコン系薄膜のｉ型半導体層であるバリア層を形成し、前記バリア層上に、前記第三光電変換ユニットを構成する結晶質のシリコン系薄膜である第三ｎ型半導体層を形成する。 The manufacturing method of the photoelectric conversion device according to the fourth aspect of the present invention is a crystalline silicon-based thin film that prepares a substrate on which a transparent conductive film is formed and constitutes a third photoelectric conversion unit on the transparent conductive film. A third p-type semiconductor layer and a third i-type semiconductor layer are formed in order, a barrier layer that is an i-type semiconductor layer of an amorphous silicon thin film is formed on the third i-type semiconductor layer, and the barrier layer is formed on the barrier layer. Then, a third n-type semiconductor layer which is a crystalline silicon-based thin film constituting the third photoelectric conversion unit is formed.
　本発明の第５態様の光電変換装置は、基板と、前記基板上に形成された透明導電膜と、第四ｐ型半導体層，第四ｉ型半導体層，及び第四ｎ型半導体層を含み、前記透明導電膜上に形成された第四光電変換ユニットと、第五ｐ型半導体層，第五ｉ型半導体層，及び第五ｎ型半導体層を含み、前記第四光電変換ユニット上に形成された第五光電変換ユニットと、結晶質のシリコン系薄膜である第六ｐ型半導体層，第六ｉ型半導体層，及び第六ｎ型半導体層と、前記第六ｉ型半導体層及び前記第六ｎ型半導体層の間に設けられたアモルファスシリコン系薄膜のｉ型半導体層であるバリア層とを含み、前記第五光電変換ユニット上に形成された第六光電変換ユニットとを含む。
　本発明の第５態様の光電変換装置においては、前記第五ｉ型半導体層は、アモルファスのシリコンゲルマニウム系薄膜であることが好ましい。
　本発明の第５態様の光電変換装置においては、前記第六ｉ型半導体層は、微結晶のシリコンゲルマニウム系薄膜であることが好ましい。
　本発明の第５態様の光電変換装置においては、前記バリア層の厚さは、１０～２００Åの範囲であることが好ましい。 A photoelectric conversion device according to a fifth aspect of the present invention includes a substrate, a transparent conductive film formed on the substrate, a fourth p-type semiconductor layer, a fourth i-type semiconductor layer, and a fourth n-type semiconductor layer. A fourth photoelectric conversion unit formed on the transparent conductive film, a fifth p-type semiconductor layer, a fifth i-type semiconductor layer, and a fifth n-type semiconductor layer, and formed on the fourth photoelectric conversion unit. The fifth photoelectric conversion unit, the sixth p-type semiconductor layer, the sixth i-type semiconductor layer, and the sixth n-type semiconductor layer, which are crystalline silicon thin films, the sixth i-type semiconductor layer, and the sixth A barrier layer that is an i-type semiconductor layer of an amorphous silicon thin film provided between the six n-type semiconductor layers, and a sixth photoelectric conversion unit formed on the fifth photoelectric conversion unit.
In the photoelectric conversion device according to the fifth aspect of the present invention, it is preferable that the fifth i-type semiconductor layer is an amorphous silicon germanium-based thin film.
In the photoelectric conversion device according to the fifth aspect of the present invention, the sixth i-type semiconductor layer is preferably a microcrystalline silicon germanium-based thin film.
In the photoelectric conversion device according to the fifth aspect of the present invention, the thickness of the barrier layer is preferably in the range of 10 to 200 mm.
　本発明の第６態様の光電変換装置の製造方法は、透明導電膜が形成された基板を準備し、前記透明導電膜上に、第四光電変換ユニットを構成する第四ｐ型半導体層，第四ｉ型半導体層，及び第四ｎ型半導体層を順に形成し、前記第四ｎ型半導体層上に、第五光電変換ユニットを構成する第五ｐ型半導体層，第五ｉ型半導体層，及び第五ｎ型半導体層を順に形成し、前記第五ｎ型半導体層上に、第六光電変換ユニットを構成する結晶質のシリコン系薄膜である第六ｐ型半導体層，第六ｉ型半導体層を順に形成し、前記第六ｉ型半導体層上に、アモルファスシリコン系薄膜のｉ型半導体層であるバリア層を形成し、前記バリア層上に、前記第六光電変換ユニットを構成する結晶質のシリコン系薄膜である第六ｎ型半導体層を形成する。 According to a sixth aspect of the present invention, there is provided a method for manufacturing a photoelectric conversion device, comprising: preparing a substrate on which a transparent conductive film is formed; and forming a fourth p-type semiconductor layer constituting a fourth photoelectric conversion unit on the transparent conductive film; A fourth i-type semiconductor layer and a fourth n-type semiconductor layer are formed in order, and a fifth p-type semiconductor layer, a fifth i-type semiconductor layer constituting a fifth photoelectric conversion unit are formed on the fourth n-type semiconductor layer; And a fifth n-type semiconductor layer, and a sixth p-type semiconductor layer and a sixth i-type semiconductor which are crystalline silicon-based thin films constituting the sixth photoelectric conversion unit on the fifth n-type semiconductor layer. Layers are formed in order, a barrier layer which is an i-type semiconductor layer of an amorphous silicon thin film is formed on the sixth i-type semiconductor layer, and the crystalline material constituting the sixth photoelectric conversion unit is formed on the barrier layer A sixth n-type semiconductor layer, which is a silicon-based thin film, is formed.
　本発明の第１態様の光電変換装置（以下、「第一光電変換装置」とも呼ぶ）においては、結晶質のシリコン系薄膜からなる第二ｉ型半導体層と第二ｎ型半導体層との間に、アモルファスシリコン系薄膜からなるｉ型半導体層がバリア層として配置されている。このため、第二ｎ型半導体層に向けて逆流した正孔（ホール）は、バリア層によって第二ｐ型半導体層に向けて反射され、短絡電流（Ｊｓｃ）を向上させることができる（以下、「バリア層の機能１」とも呼ぶ）。
　また、バリア層により、微結晶セルのバンドギャップが増加し、開放電圧（Ｖｏｃ）が向上する（以下、「バリア層の機能２」とも呼ぶ）。
　従って、本発明の第１態様の光電変換装置においては、適切な層間、即ち、結晶質のシリコン系薄膜からなる第二ｉ型半導体層と第二ｎ型半導体層との間にバリア層が設けられているので、上述したＶｏｃ及びＪｓｃの両方が向上する。従って、第二光電変換ユニットにおける発電効率を向上させることができる。
　その結果、本発明によれば、光電変換効率が向上したタンデム構造を有する光電変換装置を提供することができる。 In the photoelectric conversion device according to the first aspect of the present invention (hereinafter, also referred to as “first photoelectric conversion device”), between the second i-type semiconductor layer and the second n-type semiconductor layer made of a crystalline silicon-based thin film. In addition, an i-type semiconductor layer made of an amorphous silicon-based thin film is disposed as a barrier layer. For this reason, the holes (holes) flowing back toward the second n-type semiconductor layer are reflected by the barrier layer toward the second p-type semiconductor layer, thereby improving the short-circuit current (Jsc) (hereinafter, Also referred to as “barrier layer function 1”).
The barrier layer increases the band gap of the microcrystalline cell and improves the open-circuit voltage (Voc) (hereinafter also referred to as “barrier layer function 2”).
Therefore, in the photoelectric conversion device according to the first aspect of the present invention, a barrier layer is provided between an appropriate interlayer, that is, a second i-type semiconductor layer and a second n-type semiconductor layer made of a crystalline silicon-based thin film. Therefore, both Voc and Jsc described above are improved. Therefore, the power generation efficiency in the second photoelectric conversion unit can be improved.
As a result, according to the present invention, a photoelectric conversion device having a tandem structure with improved photoelectric conversion efficiency can be provided.
　また、本発明の第２態様の光電変換装置の製造方法（以下、「第一光電変換装置の製法」とも呼ぶ）においては、結晶質のシリコン系薄膜からなる第二ｐ型半導体層及び第二ｉ型半導体層を順に形成し（第一ステップ）、第二ｉ型半導体層上にアモルファスシリコン系薄膜からなるｉ型半導体層（バリア層）を形成し（第二ステップ）、バリア層上に結晶質のシリコン系薄膜からなる第二ｎ型半導体層を形成する（第三ステップ）。第一ステップ，第二ステップ，及び第三ステップは、順に行われる。この方法によって得られる光電変換装置においては、バリア層の機能１、２によりＶｏｃ及びＪｓｃの両方を増加させることができ、第二光電変換ユニットにおける発電効率が向上する。
　その結果、本発明によれば、光電変換効率が向上したタンデム構造を有する光電変換装置を簡便に製造できる製造方法を提供することができる。 In the method for manufacturing a photoelectric conversion device according to the second aspect of the present invention (hereinafter also referred to as “method for manufacturing the first photoelectric conversion device”), the second p-type semiconductor layer made of a crystalline silicon-based thin film and the second i-type semiconductor layers are sequentially formed (first step), an i-type semiconductor layer (barrier layer) made of an amorphous silicon thin film is formed on the second i-type semiconductor layer (second step), and crystals are formed on the barrier layer. A second n-type semiconductor layer made of a high-quality silicon thin film is formed (third step). The first step, the second step, and the third step are performed in order. In the photoelectric conversion device obtained by this method, both Voc and Jsc can be increased by functions 1 and 2 of the barrier layer, and the power generation efficiency in the second photoelectric conversion unit is improved.
As a result, according to the present invention, it is possible to provide a manufacturing method that can easily manufacture a photoelectric conversion device having a tandem structure with improved photoelectric conversion efficiency.
　本発明の第３態様の光電変換装置（以下、「第二光電変換装置」とも呼ぶ）においては、結晶質のシリコン系薄膜からなる第三ｉ型半導体層と第三ｎ型半導体層との間に、アモルファスシリコン系薄膜からなるｉ型半導体層がバリア層として配置されている。このため、第三ｎ型半導体層に向けて逆流した正孔（ホール）は、バリア層によって第三ｐ型半導体層に向けて反射され、Ｊｓｃを向上させることができる（バリア層の機能１）。
　また、バリア層により、微結晶セルのバンドギャップが増加し、Ｖｏｃが向上する（バリア層の機能２）。
　従って、本発明の第３態様の光電変換装置においては、バリア層が設けられているので、上述したＶｏｃ及びＪｓｃの両方が向上する。従って、発電効率を向上させることができる。
　その結果、本発明によれば、光電変換効率が向上したシングル構造を有する光電変換装置を提供することができる。 In the photoelectric conversion device according to the third aspect of the present invention (hereinafter, also referred to as “second photoelectric conversion device”), between the third i-type semiconductor layer and the third n-type semiconductor layer made of a crystalline silicon-based thin film. In addition, an i-type semiconductor layer made of an amorphous silicon-based thin film is disposed as a barrier layer. For this reason, the holes that flow backward toward the third n-type semiconductor layer are reflected by the barrier layer toward the third p-type semiconductor layer, and Jsc can be improved (Function 1 of the barrier layer). .
In addition, the barrier layer increases the band gap of the microcrystalline cell and improves Voc (barrier layer function 2).
Therefore, in the photoelectric conversion device of the third aspect of the present invention, since the barrier layer is provided, both Voc and Jsc described above are improved. Therefore, power generation efficiency can be improved.
As a result, according to the present invention, a photoelectric conversion device having a single structure with improved photoelectric conversion efficiency can be provided.
　また、本発明の第４態様の光電変換装置の製造方法（以下、「第二光電変換装置の製法」とも呼ぶ）においては、結晶質のシリコン系薄膜からなる第三ｐ型半導体層及び第三ｉ型半導体層を順に形成し（第一ステップ）、第三ｉ型半導体層上にアモルファスシリコン系薄膜からなるｉ型半導体層（バリア層）を形成し（第二ステップ）、バリア層上に結晶質のシリコン系薄膜からなる第三ｎ型半導体層を形成する（第三ステップ）。第一ステップ，第二ステップ，及び第三ステップは、順に行われる。この方法によって得られる光電変換装置においては、バリア層の機能１、２によりＶｏｃ及びＪｓｃの両方を増加させることができ、発電効率が向上する。
　その結果、本発明によれば、光電変換効率が向上したシングル構造を有する光電変換装置を簡便に製造できる製造方法を提供することができる。 In the method for manufacturing a photoelectric conversion device according to the fourth aspect of the present invention (hereinafter also referred to as “method for manufacturing a second photoelectric conversion device”), the third p-type semiconductor layer and the third p-type semiconductor layer made of a crystalline silicon-based thin film are used. i-type semiconductor layers are sequentially formed (first step), an i-type semiconductor layer (barrier layer) made of an amorphous silicon thin film is formed on the third i-type semiconductor layer (second step), and crystals are formed on the barrier layer. Forming a third n-type semiconductor layer made of a high-quality silicon-based thin film (third step); The first step, the second step, and the third step are performed in order. In the photoelectric conversion device obtained by this method, both Voc and Jsc can be increased by the functions 1 and 2 of the barrier layer, and the power generation efficiency is improved.
As a result, according to the present invention, it is possible to provide a manufacturing method capable of easily manufacturing a photoelectric conversion device having a single structure with improved photoelectric conversion efficiency.
　本発明の第５態様の光電変換装置（以下、「第三光電変換装置」とも呼ぶ）においては、結晶質のシリコン系薄膜からなる第六ｉ型半導体層と第六ｎ型半導体層との間に、アモルファスシリコン系薄膜からなるｉ型半導体層がバリア層として配置されている。このため、第六ｎ型半導体層に向けて逆流した正孔（ホール）は、バリア層によって第六ｐ型半導体層に向けて反射され、短絡電流（Ｊｓｃ）を向上させることができる（バリア層の機能１）。
　また、バリア層により、微結晶セルのバンドギャップが増加し、開放電圧（Ｖｏｃ）が向上する（バリア層の機能２）。
　従って、本発明の第５態様の光電変換装置においては、適切な層間、即ち、結晶質のシリコン系薄膜からなる第六ｉ型半導体層と第六ｎ型半導体層との間にバリア層が設けられているので、上述したＶｏｃ及びＪｓｃの両方が向上する。従って、第六光電変換ユニットにおける発電効率を向上させることができる。
　その結果、本発明によれば、光電変換効率が向上したトリプル構造を有する光電変換装置を提供することができる。 In the photoelectric conversion device according to the fifth aspect of the present invention (hereinafter also referred to as “third photoelectric conversion device”), between the sixth i-type semiconductor layer and the sixth n-type semiconductor layer made of a crystalline silicon-based thin film. In addition, an i-type semiconductor layer made of an amorphous silicon-based thin film is disposed as a barrier layer. Therefore, holes that have flowed back toward the sixth n-type semiconductor layer are reflected by the barrier layer toward the sixth p-type semiconductor layer, and the short-circuit current (Jsc) can be improved (barrier layer). Function 1).
In addition, the barrier layer increases the band gap of the microcrystalline cell and improves the open circuit voltage (Voc) (barrier layer function 2).
Therefore, in the photoelectric conversion device of the fifth aspect of the present invention, a barrier layer is provided between an appropriate interlayer, that is, a sixth i-type semiconductor layer and a sixth n-type semiconductor layer made of a crystalline silicon-based thin film. Therefore, both Voc and Jsc described above are improved. Therefore, the power generation efficiency in the sixth photoelectric conversion unit can be improved.
As a result, according to the present invention, a photoelectric conversion device having a triple structure with improved photoelectric conversion efficiency can be provided.
　また、本発明の第６態様の光電変換装置の製造方法（以下、「第三光電変換装置の製法」とも呼ぶ）においては、結晶質のシリコン系薄膜からなる第六ｐ型半導体層及び第六ｉ型半導体層を順に形成し（第一ステップ）、第六ｉ型半導体層上にアモルファスシリコン系薄膜からなるｉ型半導体層（バリア層）を形成し（第二ステップ）、バリア層上に結晶質のシリコン系薄膜からなる第六ｎ型半導体層を形成する（第三ステップ）。第一ステップ，第二ステップ，及び第三ステップは、順に行われる。この方法によって得られる光電変換装置においては、バリア層の機能１、２によりＶｏｃ及びＪｓｃの両方を増加させることができ、第六光電変換ユニットにおける発電効率が向上する。
　その結果、本発明によれば、光電変換効率が向上したトリプル構造を有する光電変換装置を簡便に製造できる製造方法を提供することができる。 In the method for manufacturing a photoelectric conversion device according to the sixth aspect of the present invention (hereinafter also referred to as “method for manufacturing a third photoelectric conversion device”), a sixth p-type semiconductor layer and a sixth p-type semiconductor layer made of a crystalline silicon-based thin film are used. i-type semiconductor layers are sequentially formed (first step), an i-type semiconductor layer (barrier layer) made of an amorphous silicon thin film is formed on the sixth i-type semiconductor layer (second step), and crystals are formed on the barrier layer. A sixth n-type semiconductor layer made of a high-quality silicon-based thin film is formed (third step). The first step, the second step, and the third step are performed in order. In the photoelectric conversion device obtained by this method, both Voc and Jsc can be increased by the functions 1 and 2 of the barrier layer, and the power generation efficiency in the sixth photoelectric conversion unit is improved.
As a result, according to the present invention, it is possible to provide a manufacturing method capable of easily manufacturing a photoelectric conversion device having a triple structure with improved photoelectric conversion efficiency.
本発明の第一実施形態に係る光電変換装置（第一光電変換装置）の層構成を示す断面図である。It is sectional drawing which shows the layer structure of the photoelectric conversion apparatus (1st photoelectric conversion apparatus) which concerns on 1st embodiment of this invention. 図１に示す光電変換装置の製造方法を説明する図である。It is a figure explaining the manufacturing method of the photoelectric conversion apparatus shown in FIG. 図１に示す光電変換装置の製造方法を説明する図である。It is a figure explaining the manufacturing method of the photoelectric conversion apparatus shown in FIG. 図１に示す光電変換装置の製造方法を説明する図である。It is a figure explaining the manufacturing method of the photoelectric conversion apparatus shown in FIG. 本発明の第一実施形態に係る光電変換装置を製造する製造システムを示す概略図である。It is the schematic which shows the manufacturing system which manufactures the photoelectric conversion apparatus which concerns on 1st embodiment of this invention. 本発明の第二実施形態に係る光電変換装置（第二光電変換装置）の層構成を示す断面図である。It is sectional drawing which shows the layer structure of the photoelectric conversion apparatus (2nd photoelectric conversion apparatus) which concerns on 2nd embodiment of this invention. 本発明の第三実施形態に係る光電変換装置（第三光電変換装置）の層構成を示す断面図である。It is sectional drawing which shows the layer structure of the photoelectric conversion apparatus (3rd photoelectric conversion apparatus) which concerns on 3rd embodiment of this invention. 本発明の第三実施形態に係る光電変換装置（第三光電変換装置）を製造する製造システムを示す概略図である。It is the schematic which shows the manufacturing system which manufactures the photoelectric conversion apparatus (3rd photoelectric conversion apparatus) which concerns on 3rd embodiment of this invention. 実施例１及び比較例１において作製された光電変換装置について、放電曲線を示す図である。It is a figure which shows a discharge curve about the photoelectric conversion apparatus produced in Example 1 and Comparative Example 1. FIG. 実施例１及び比較例１において作製された光電変換装置について、波長と発電効率との関係を示す図である。It is a figure which shows the relationship between a wavelength and electric power generation efficiency about the photoelectric conversion apparatus produced in Example 1 and Comparative Example 1. FIG. 実施例２－７及び比較例２において作製された光電変換装置について、バリア層の厚さと光電変換効率ηとの関係を示す図である。It is a figure which shows the relationship between the thickness of a barrier layer, and photoelectric conversion efficiency (eta) about the photoelectric conversion apparatus produced in Example 2-7 and Comparative Example 2. FIG. 実施例２－７及び比較例２において作製された光電変換装置について、バリア層の厚さと短絡電流Ｊｓｃとの関係を示す図である。It is a figure which shows the relationship between the thickness of a barrier layer, and the short circuit current Jsc about the photoelectric conversion apparatus produced in Example 2-7 and Comparative Example 2. FIG. 実施例２－７及び比較例２において作製された光電変換装置について、バリア層の厚さと開放電圧Ｖｏｃとの関係を示す図である。It is a figure which shows the relationship between the thickness of a barrier layer, and the open circuit voltage Voc about the photoelectric conversion apparatus produced in Example 2-7 and the comparative example 2. FIG. 実施例２－７及び比較例２において作製された光電変換装置について、Ｉｃ／Ｉａと、Ｊｓｃとの関係を示す図である。It is a figure which shows the relationship between Ic / Ia and Jsc about the photoelectric conversion apparatus produced in Example 2-7 and Comparative Example 2. FIG. 実施例８の光電変換装置について、波長と発電効率との関係を示す図である。It is a figure which shows the relationship between a wavelength and power generation efficiency about the photoelectric conversion apparatus of Example 8. 実施例９の光電変換装置について、波長と発電効率との関係を示す図である。It is a figure which shows the relationship between a wavelength and power generation efficiency about the photoelectric conversion apparatus of Example 9. FIG. 実施例８及び比較例３の光電変換装置について、波長と発電効率との関係を示す図である。It is a figure which shows the relationship between a wavelength and power generation efficiency about the photoelectric conversion apparatus of Example 8 and Comparative Example 3. 実施例９及び比較例４の光電変換装置について、波長と発電効率との関係を示す図である。It is a figure which shows the relationship between a wavelength and power generation efficiency about the photoelectric conversion apparatus of Example 9 and Comparative Example 4. 従来の光電変換装置を示す断面図である。It is sectional drawing which shows the conventional photoelectric conversion apparatus. 従来の光電変換装置において、波長と発電効率との関係を示す図である。It is a figure which shows the relationship between a wavelength and power generation efficiency in the conventional photoelectric conversion apparatus.
　以下、本発明に係る光電変換装置及び光電変換装置の製造方法の実施形態について、図面に基づき説明する。
　また、以下の説明に用いる各図においては、各構成要素を図面上で認識し得る程度の大きさとするため、各構成要素の寸法及び比率を実際のものとは適宜に異ならせてある。 Hereinafter, embodiments of a photoelectric conversion device and a method for manufacturing the photoelectric conversion device according to the present invention will be described with reference to the drawings.
In the drawings used for the following description, the dimensions and ratios of the respective components are appropriately changed from the actual ones in order to make the respective components large enough to be recognized on the drawings.
＜第一実施形態＞
　第一実施形態においては、アモルファスシリコン型の光電変換装置である第一光電変換ユニットと、微結晶シリコン型の光電変換装置である第二光電変換ユニットとが積層されたタンデム構造を有する光電変換装置を説明する。
　図１は、本発明の第一実施形態の光電変換装置の層構成を示す断面図である。
　本発明の第一実施形態の光電変換装置１０Ａ（１０）においては、透明導電膜が形成された基板１が用いられており、この透明導電膜２は、基板１の第１面１ａ上に形成されている。透明導電膜２上には、第一光電変換ユニット３及び第二光電変換ユニット４が順に重ねて設けられている。第一光電変換ユニット３及び第二光電変換ユニット４は、ｐ型半導体層，実質的に真性なｉ型半導体層，及びｎ型半導体層が積層されているｐｉｎ型の半導体積層構造を有する。第二光電変換ユニット４上には、裏面電極５が形成されている。 <First embodiment>
In the first embodiment, a photoelectric conversion device having a tandem structure in which a first photoelectric conversion unit that is an amorphous silicon photoelectric conversion device and a second photoelectric conversion unit that is a microcrystalline silicon photoelectric conversion device are stacked. Will be explained.
FIG. 1 is a cross-sectional view showing the layer configuration of the photoelectric conversion device according to the first embodiment of the present invention.
In the photoelectric conversion device 10A (10) of the first embodiment of the present invention, the substrate 1 on which a transparent conductive film is formed is used, and the transparent conductive film 2 is formed on the first surface 1a of the substrate 1. Has been. On the transparent conductive film 2, the 1st photoelectric conversion unit 3 and the 2nd photoelectric conversion unit 4 are piled up in order. The first photoelectric conversion unit 3 and the second photoelectric conversion unit 4 have a pin-type semiconductor stacked structure in which a p-type semiconductor layer, a substantially intrinsic i-type semiconductor layer, and an n-type semiconductor layer are stacked. A back electrode 5 is formed on the second photoelectric conversion unit 4.
　基板１は、光透過性を有する絶縁性の基板であり、例えば、ガラス，透明樹脂等からなり、太陽光の透過性に優れ、かつ、耐久性を有する絶縁材料からなる。この基板１は、透明導電膜２を備えている。透明導電膜２の材料としては、例えばＩＴＯ（ｉｎｄｉｕｍ　Ｔｉｎ　Ｏｘｉｄｅ）、ＳｎＯ２、ＺｎＯ等の光透過性の金属酸化物が採用される。この透明導電膜２は、真空蒸着法又はスパッタ法によって基板１上に形成される。この光電変換装置１０Ａ（１０）においては、図１の矢印で示すように、基板１の第２面１ｂに太陽光Ｓが入射する。 The substrate 1 is an insulating substrate having a light transmission property, and is made of, for example, an insulating material made of glass, transparent resin, etc., having excellent sunlight transmission properties and durability. The substrate 1 includes a transparent conductive film 2. As a material of the transparent conductive film 2, for example, a light transmissive metal oxide such as ITO (indium tin oxide), SnO 2 , ZnO or the like is employed. The transparent conductive film 2 is formed on the substrate 1 by vacuum deposition or sputtering. In this photoelectric conversion device 10 </ b> A (10), the sunlight S is incident on the second surface 1 b of the substrate 1 as indicated by the arrow in FIG. 1.
　また、第一光電変換ユニット３は、ｐ型半導体層３１（ｐ層、第一ｐ型半導体層），実質的に真性なｉ型半導体層３２（ｉ層、非晶質シリコン層、第一ｉ型半導体層），及びｎ型半導体層３３（ｎ層、第一ｎ型半導体層）が積層されたｐｉｎ構造を有している。即ち、ｐ層３１，ｉ層３２，及びｎ層３３を、この順に積層することにより第一光電変換ユニット３が形成されている。この第一光電変換ユニット３は、例えば、アモルファス（非晶質）シリコン系材料によって構成されている。
　第一光電変換ユニット３においては、ｐ層３１の厚さが例えば８０Å、ｉ層３２の厚さが例えば１８００Å、ｎ層３３の厚さが例えば１００Åである。
　第一光電変換ユニット３のｐ層３１，ｉ層３２，及びｎ層３３は、複数のプラズマＣＶＤ反応室において形成される。即ち、互いに異なる複数のプラズマＣＶＤ反応室の各々においては、第一光電変換ユニット１０３を構成する一つの層が形成される。 The first photoelectric conversion unit 3 includes a p-type semiconductor layer 31 (p layer, first p-type semiconductor layer), a substantially intrinsic i-type semiconductor layer 32 (i layer, amorphous silicon layer, first i Type semiconductor layer) and an n-type semiconductor layer 33 (n layer, first n-type semiconductor layer) are stacked. That is, the first photoelectric conversion unit 3 is formed by stacking the p layer 31, the i layer 32, and the n layer 33 in this order. The first photoelectric conversion unit 3 is made of, for example, an amorphous (amorphous) silicon-based material.
In the first photoelectric conversion unit 3, the thickness of the p layer 31 is, for example, 80 mm, the thickness of the i layer 32 is, for example, 1800 mm, and the thickness of the n layer 33 is, for example, 100 mm.
The p layer 31, i layer 32, and n layer 33 of the first photoelectric conversion unit 3 are formed in a plurality of plasma CVD reaction chambers. That is, in each of a plurality of different plasma CVD reaction chambers, one layer constituting the first photoelectric conversion unit 103 is formed.
　第二光電変換ユニット４は、ｐ型半導体層４１（ｐ層、第二ｐ型半導体層），実質的に真性なｉ型半導体層４２（ｉ層、結晶質シリコン層、第二ｉ型半導体層），及びｎ型半導体層４３（ｎ層、第二ｎ型半導体層）が積層されたｐｉｎ構造を有している。即ち、ｐ層４１、ｉ層４２、及びｎ層４３を、この順に積層することにより第二光電変換ユニット４が形成されている。この第二光電変換ユニット４は、結晶質を含むシリコン系材料によって構成されている。
　第二光電変換ユニット４においては、ｐ層４１の厚さが例えば１５０Å、ｉ層４２の厚さが例えば１５０００Å、ｎ層４３の厚さが例えば３００Åである。 The second photoelectric conversion unit 4 includes a p-type semiconductor layer 41 (p layer, second p-type semiconductor layer), a substantially intrinsic i-type semiconductor layer 42 (i layer, crystalline silicon layer, second i-type semiconductor layer). ), And an n-type semiconductor layer 43 (n-layer, second n-type semiconductor layer) are stacked. That is, the second photoelectric conversion unit 4 is formed by stacking the p layer 41, the i layer 42, and the n layer 43 in this order. The second photoelectric conversion unit 4 is made of a silicon-based material containing a crystalline material.
In the second photoelectric conversion unit 4, the thickness of the p layer 41 is 150 mm, the thickness of the i layer 42 is 15000 mm, for example, and the thickness of the n layer 43 is 300 mm, for example.
　特に、第一実施形態の光電変換装置１０Ａ（１０）の第二光電変換ユニット４においては、ｉ層４２とｎ層４３との間に、アモルファスシリコン系薄膜からなるｉ型半導体層がバリア層４５として配置されている。
　このため、バリア層４５の機能により、ｎ層４３に向けて逆流した正孔（ホール）はｐ層４１に向けて反射され、短絡電流（Ｊｓｃ）を向上させることができる。
　また、バリア層４５の働きにより、微結晶セルのバンドギャップが増加し、開放電圧（Ｖｏｃ）を向上させることができる。
　このように第一実施形態の光電変換装置１０においては、バリア層４５を挿入することにより、Ｖｏｃ及びＪｓｃの両方を向上させることができ、第二光電変換ユニット４の発電効率を向上させることができる。
　その結果、第一光電変換ユニット及び第二光電変換ユニットを含む光電変換装置全体における光電変換効率を向上させることが可能である。 In particular, in the second photoelectric conversion unit 4 of the photoelectric conversion device 10 </ b> A (10) of the first embodiment, an i-type semiconductor layer made of an amorphous silicon thin film is interposed between the i layer 42 and the n layer 43. Is arranged as.
For this reason, by the function of the barrier layer 45, the holes (holes) flowing back toward the n layer 43 are reflected toward the p layer 41, and the short circuit current (Jsc) can be improved.
Further, the band gap of the microcrystalline cell is increased by the action of the barrier layer 45, and the open circuit voltage (Voc) can be improved.
Thus, in the photoelectric conversion apparatus 10 of the first embodiment, by inserting the barrier layer 45, both Voc and Jsc can be improved, and the power generation efficiency of the second photoelectric conversion unit 4 can be improved. it can.
As a result, it is possible to improve the photoelectric conversion efficiency in the entire photoelectric conversion device including the first photoelectric conversion unit and the second photoelectric conversion unit.
　バリア層４５の厚さは、例えば１０～２００Åの範囲であることが好ましく、　例えば、５０Åである。バリア層４５の厚さが０～２００Åの範囲である場合に、光電変換効率が増加する効果が確認されている。
　バリア層４５の厚さが５０Å以上においてＪｓｃは低下するが、その一方でＶｏｃ、曲線因子（ＦＦ）が増加する。これによって、タンデム構造を有する光電変換装置全体における光電変換効率は向上する。 The thickness of the barrier layer 45 is preferably in the range of 10 to 200 mm, for example, 50 mm. It has been confirmed that the photoelectric conversion efficiency increases when the thickness of the barrier layer 45 is in the range of 0 to 200 mm.
When the thickness of the barrier layer 45 is 50 mm or more, Jsc decreases, while Voc and fill factor (FF) increase. Thereby, the photoelectric conversion efficiency in the whole photoelectric conversion device having a tandem structure is improved.
　次に、レーザーラマン顕微鏡で観測されたラマン散乱光の強度について説明する。バリア層４５中に分散するアモルファス相に起因するラマン散乱光の強度をＩａで表し、バリア層４５中に分散する微結晶相に起因するラマン散乱光の強度をＩｃで表した場合、光電変換装置１０Ａ（１０）を構成するバリア層４５における結晶化率は１．０未満である。結晶化率とは、ＩｃをＩａで除した値（以下、Ｉｃ／Ｉａと表記する）を意味し、結晶質とアモルファスの混在比が数値化された値である。また、バリア層４５においては、微結晶セルのｉ層４２の結晶化率（Ｉｃ／Ｉａ）とは無関係に、バリア層４５の結晶化率を独立して制御することができる。
　つまり、このような層構造を採用することによって、第一実施形態の光電変換装置１０においてはＪｓｃを向上させることが可能となる。
　第一実施形態の層構造によって長波長領域における発電効率が向上し、微結晶タンデム型薄膜太陽電池における光電変換効率を１％程度向上させることが可能である。 Next, the intensity of Raman scattered light observed with a laser Raman microscope will be described. When the intensity of Raman scattered light caused by the amorphous phase dispersed in the barrier layer 45 is represented by Ia, and the intensity of Raman scattered light caused by the microcrystalline phase dispersed in the barrier layer 45 is represented by Ic, a photoelectric conversion device The crystallization rate in the barrier layer 45 constituting 10A (10) is less than 1.0. The crystallization rate means a value obtained by dividing Ic by Ia (hereinafter referred to as Ic / Ia), and is a value obtained by quantifying the mixing ratio of crystalline and amorphous. In the barrier layer 45, the crystallization rate of the barrier layer 45 can be independently controlled regardless of the crystallization rate (Ic / Ia) of the i layer 42 of the microcrystalline cell.
That is, by adopting such a layer structure, Jsc can be improved in the photoelectric conversion device 10 of the first embodiment.
The power generation efficiency in the long wavelength region is improved by the layer structure of the first embodiment, and the photoelectric conversion efficiency in the microcrystalline tandem thin film solar cell can be improved by about 1%.
　裏面電極５は、例えば、Ａｇ（銀）又はＡｌ（アルミニウム）等の導電性の光反射膜によって構成されている。この裏面電極５は、例えばスパッタ法又は蒸着法を用いて形成される。また、裏面電極５の構造としては、第二光電変換ユニット４のｎ層４３と裏面電極５との間に、ＩＴＯ又はＳｎＯ２、ＺｎＯ等の導電性酸化物からなる層が形成された積層構造を用いることもできる。 The back electrode 5 is made of, for example, a conductive light reflecting film such as Ag (silver) or Al (aluminum). The back electrode 5 is formed using, for example, a sputtering method or a vapor deposition method. Further, as the structure of the back electrode 5, a laminated structure in which a layer made of a conductive oxide such as ITO, SnO 2 , or ZnO is formed between the n layer 43 of the second photoelectric conversion unit 4 and the back electrode 5. Can also be used.
　次に、以上のような構成を有する光電変換装置１０Ａ（１０）を製造するための製造方法を説明する。第一実施形態の光電変換装置の製造方法は、第一光電変換ユニット３を構成するｐ層３１，ｉ層３２，及びｎ層３３を順に形成するステップ、第一光電変換ユニット３のｎ層３３上に、第二光電変換ユニット４を構成するｐ層４１及びｉ層４２を順に形成するステップ、第二光電変換ユニット４を構成するｉ層４２上にバリア層４５を形成するステップ、及びバリア層４５上に第二光電変換ユニット４を構成するｎ層４３を形成するステップを含む。 Next, a manufacturing method for manufacturing the photoelectric conversion device 10A (10) having the above configuration will be described. The manufacturing method of the photoelectric conversion device according to the first embodiment includes a step of sequentially forming the p layer 31, the i layer 32, and the n layer 33 constituting the first photoelectric conversion unit 3, and the n layer 33 of the first photoelectric conversion unit 3. A step of sequentially forming a p layer 41 and an i layer 42 constituting the second photoelectric conversion unit 4, a step of forming a barrier layer 45 on the i layer 42 constituting the second photoelectric conversion unit 4, and a barrier layer A step of forming an n layer 43 constituting the second photoelectric conversion unit 4 on the second photoelectric conversion unit 4.
　従って、第一実施形態の光電変換装置の製造方法によって得られる光電変換装置１０においては、上述したバリア層の機能により開放電圧（Ｖｏｃ）と短絡電流（Ｊｓｃ）とを向上させることができ、第二光電変換ユニット４の発電効率を向上させ、第一光電変換ユニット３及び第二光電変換ユニット４を含む光電変換装置全体における光電変換効率が向上する。
　その結果、第一実施形態の製造方法によれば、光電変換効率が向上した光電変換装置１０を簡便に製造することが可能である。
　以下、タンデム構造を有する光電変換装置の製造方法について順に説明する。 Therefore, in the photoelectric conversion device 10 obtained by the photoelectric conversion device manufacturing method of the first embodiment, the open circuit voltage (Voc) and the short circuit current (Jsc) can be improved by the function of the barrier layer described above. The power generation efficiency of the two photoelectric conversion units 4 is improved, and the photoelectric conversion efficiency in the entire photoelectric conversion device including the first photoelectric conversion unit 3 and the second photoelectric conversion unit 4 is improved.
As a result, according to the manufacturing method of the first embodiment, it is possible to easily manufacture the photoelectric conversion device 10 with improved photoelectric conversion efficiency.
Hereinafter, a method for manufacturing a photoelectric conversion device having a tandem structure will be described in order.
　まず、図２Ａに示すように、透明導電膜２が成膜された絶縁性透明基板１を準備する。次に、図２Ｂに示すように、透明導電膜２上に、ｐ層３１，ｉ層３２，ｎ層３３，及びｐ層４１が形成される。
　ここで、ｐ層３１，ｉ層３２，ｎ層３３，及びｐ層４１が形成される複数のプラズマＣＶＤ反応室は互いに異なる。また、一つのプラズマＣＶＤ反応室において、ｐ層３１，ｉ層３２，ｎ層３３，及びｐ層４１の一つの層が形成され、一列に連結された複数のプラズマＣＶＤ反応室によってｐ層３１，ｉ層３２，ｎ層３３，及びｐ層４１が順次に形成される。
　即ち、第一光電変換ユニット３のｎ層３３上に第二光電変換ユニット４を構成するｐ層４１が設けられた光電変換装置の第一中間品１０ａが得られる。 First, as shown in FIG. 2A, an insulating transparent substrate 1 on which a transparent conductive film 2 is formed is prepared. Next, as illustrated in FIG. 2B, the p layer 31, the i layer 32, the n layer 33, and the p layer 41 are formed on the transparent conductive film 2.
Here, a plurality of plasma CVD reaction chambers in which the p layer 31, the i layer 32, the n layer 33, and the p layer 41 are formed are different from each other. Further, in one plasma CVD reaction chamber, one layer of the p layer 31, the i layer 32, the n layer 33, and the p layer 41 is formed, and the p layer 31 is formed by a plurality of plasma CVD reaction chambers connected in a row. The i layer 32, the n layer 33, and the p layer 41 are sequentially formed.
That is, the first intermediate product 10a of the photoelectric conversion device in which the p layer 41 constituting the second photoelectric conversion unit 4 is provided on the n layer 33 of the first photoelectric conversion unit 3 is obtained.
　ｐ層３１は、個別の反応室内においてプラズマＣＶＤを用いて形成される。例えば、基板温度が１８０～２００℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が７０～１２０Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が３００ｓｃｃｍ、水素（Ｈ２）が２３００ｓｃｃｍ、希釈ガスとして水素が用いられたジボラン（Ｂ２Ｈ６／Ｈ２）が１８０ｓｃｃｍ、メタン（ＣＨ４）が５００ｓｃｃｍに設定された条件で、アモルファスシリコン（ａ－Ｓｉ）からなるｐ層３１を成膜することができる。 The p layer 31 is formed using plasma CVD in a separate reaction chamber. For example, the substrate temperature is set to 180 to 200 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 70 to 120 Pa, monosilane (SiH 4 ) is 300 sccm, hydrogen (H 2 ) as the reaction gas flow rate. ) Is set to 2300 sccm, diborane (B 2 H 6 / H 2 ) using hydrogen as a diluent gas is set to 180 sccm, and methane (CH 4 ) is set to 500 sccm. A p-layer made of amorphous silicon (a-Si) 31 can be formed.
　ｉ層３２は、個別の反応室内においてプラズマＣＶＤを用いて形成される。例えば、基板温度が１８０～２００℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が７０～１２０Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１２００ｓｃｃｍに設定された条件でアモルファスシリコンからなるｉ層３２を成膜することができる。 The i layer 32 is formed using plasma CVD in a separate reaction chamber. For example, the substrate temperature is set to 180 to 200 ° C., the power supply frequency is set to 13.56 MHz, the pressure in the reaction chamber is set to 70 to 120 Pa, and monosilane (SiH 4 ) is set to 1200 sccm as the reaction gas flow rate. Thus, the i layer 32 made of amorphous silicon can be formed.
　ｎ層３３は、個別の反応室内においてプラズマＣＶＤ法を用いて形成される。例えば、基板温度が１８０～２００℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が７０～１２０Ｐａに設定され、反応ガスの流量として希釈ガスとして水素が用いられたホスフィン（ＰＨ３／Ｈ２）が２００ｓｃｃｍに設定された条件で、アモルファスシリコンからなるｎ層３３を成膜することができる。 The n layer 33 is formed using a plasma CVD method in a separate reaction chamber. For example, the substrate temperature is set to 180 to 200 ° C., the power supply frequency is set to 13.56 MHz, the pressure in the reaction chamber is set to 70 to 120 Pa, and the reaction gas flow rate is phosphine (PH Under the condition that 3 / H 2 ) is set to 200 sccm, the n layer 33 made of amorphous silicon can be formed.
　ｐ層４１は、個別の反応室内においてプラズマＣＶＤ法を用いて形成される。例えば、基板温度が１８０～２００℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が５００～９００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１００ｓｃｃｍ、水素（Ｈ２）が２５０００ｓｃｃｍ、希釈ガスとして水素が用いられたジボラン（Ｂ２Ｈ６／Ｈ２）が５０ｓｃｃｍに設定された条件で、微結晶シリコン（μｃ－Ｓｉ）のｐ層４１を成膜することができる。 The p layer 41 is formed using a plasma CVD method in a separate reaction chamber. For example, the substrate temperature is set to 180 to 200 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 500 to 900 Pa, monosilane (SiH 4 ) is set to 100 sccm, hydrogen (H 2 ) as the reaction gas flow rate. ) Is 25000 sccm, and diborane (B 2 H 6 / H 2 ) using hydrogen as a diluent gas is set to 50 sccm, the p-layer 41 of microcrystalline silicon (μc-Si) can be formed. .
　次に、上記のようにｐ層３１，ｉ層３２，ｎ層３３，及びｐ層４１が形成された基板１を反応室から取り出し、ｐ層４１を大気中に露呈させる。
　引き続き、図２Ｃに示すように、大気中に露呈されたｐ層４１上に、第二光電変換ユニット４を構成するｉ層４２，バリア層４５，及びｎ層４３が単数のプラズマＣＶＤ反応室内で形成される。
　即ち、第一光電変換ユニット３上に第二光電変換ユニット４が設けられた光電変換装置の第二中間品１０ｂが得られる。その後、第二光電変換ユニット４のｎ層４３上に裏面電極５を形成することにより、図１に示す光電変換装置１０Ａ（１０）が得られる。 Next, the substrate 1 on which the p layer 31, i layer 32, n layer 33, and p layer 41 are formed as described above is taken out of the reaction chamber, and the p layer 41 is exposed to the atmosphere.
Subsequently, as shown in FIG. 2C, the i layer 42, the barrier layer 45, and the n layer 43 constituting the second photoelectric conversion unit 4 are formed on the p layer 41 exposed to the atmosphere in a single plasma CVD reaction chamber. It is formed.
That is, the second intermediate product 10b of the photoelectric conversion device in which the second photoelectric conversion unit 4 is provided on the first photoelectric conversion unit 3 is obtained. Then, the photoelectric conversion apparatus 10A (10) shown in FIG. 1 is obtained by forming the back surface electrode 5 on the n layer 43 of the second photoelectric conversion unit 4.
　ｉ層４２は、ｎ層４３が形成される反応室と同じ反応室内においてプラズマＣＶＤ法を用いて形成される。例えば、基板温度が１８０～２００℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が５００～９００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１８０ｓｃｃｍ、水素（Ｈ２）が２７０００ｓｃｃｍに設定された条件で、微結晶シリコンのｉ層４２を成膜することができる。 The i layer 42 is formed using a plasma CVD method in the same reaction chamber as that in which the n layer 43 is formed. For example, the substrate temperature is set to 180 to 200 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 500 to 900 Pa, monosilane (SiH 4 ) is 180 sccm, hydrogen (H 2 ) as the reaction gas flow rate. ) Is set to 27000 sccm, the i-layer 42 of microcrystalline silicon can be formed.
　バリア層４５は、ｉ層４２が形成される反応室と同じ反応室内においてプラズマＣＶＤ法を用いて形成される。例えば、基板温度が１８０～２００℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が７０～１２０Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１２００ｓｃｃｍに設定された条件で、アモルファスシリコンからなるバリア層４５（ｉ型半導体層）を成膜することができる。 The barrier layer 45 is formed using a plasma CVD method in the same reaction chamber as the reaction chamber in which the i layer 42 is formed. For example, the substrate temperature is set to 180 to 200 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 70 to 120 Pa, and monosilane (SiH 4 ) is set to 1200 sccm as the reaction gas flow rate. Thus, the barrier layer 45 (i-type semiconductor layer) made of amorphous silicon can be formed.
　ｎ層４３は、ｉ層４２が形成される反応室と同じ反応室内においてプラズマＣＶＤ法を用いて形成される。例えば、基板温度が１８０～２００℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が５００～９００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１８０ｓｃｃｍ、水素（Ｈ２）が２７０００ｓｃｃｍ、希釈ガスとして水素が用いられたホスフィン（ＰＨ３／Ｈ２）が２００ｓｃｃｍに設定された条件で、微結晶シリコンのｎ層４３を成膜することができる。 The n layer 43 is formed using a plasma CVD method in the same reaction chamber as that in which the i layer 42 is formed. For example, the substrate temperature is set to 180 to 200 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 500 to 900 Pa, monosilane (SiH 4 ) is 180 sccm, hydrogen (H 2 ) as the reaction gas flow rate. ) Is set to 27000 sccm, and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas is set to 200 sccm, and the n-layer 43 of microcrystalline silicon can be formed.
　次に、この光電変換装置１０Ａ（１０）の製造システムを図３に基づいて説明する。
　第一実施形態における光電変換装置１０の製造システムは、いわゆるインライン型の第一成膜装置６０と、ｐ層４１を大気中に露呈させる暴露装置８０と、いわゆるバッチ型の第二成膜装置７０とが順に配置された構成を有する。
　インライン型の第一成膜装置６０は、チャンバと呼ばれる複数の成膜反応室が直線状に連結して配置された構成を有する。第一成膜装置６０においては、第一光電変換ユニット３のｐ層３１，ｉ層３２，ｎ層３３，及び第二光電変換ユニット４のｐ層４１の各層が別々に形成される。複数の成膜反応室が一列に連結されているので、複数の成膜反応室の順番に応じてｐ層３１，ｉ層３２，ｎ層３３，及びｐ層４１からなる４層が基板１上に積層される。
　暴露装置８０は、第一成膜装置６０において処理された基板を大気に曝し、その後、基板を第二成膜装置７０へ移動させる。
　第二成膜装置７０においては、第二光電変換ユニット４のｉ層４２，バリア層４５，及びｎ層４３が同じ成膜反応室においてこの順番で積層される。また、このような成膜反応室には、複数の基板が一括に搬送され、複数の基板の各々にｉ層４２，バリア層４５，及びｎ層４３が順に成膜反応室の中で形成される（バッチ処理）。 Next, a manufacturing system of the photoelectric conversion device 10A (10) will be described with reference to FIG.
The manufacturing system of the photoelectric conversion apparatus 10 in the first embodiment includes a so-called in-line type first film forming apparatus 60, an exposure apparatus 80 that exposes the p layer 41 to the atmosphere, and a so-called batch type second film forming apparatus 70. Are arranged in order.
The inline-type first film forming apparatus 60 has a configuration in which a plurality of film forming reaction chambers called chambers are linearly connected. In the first film forming apparatus 60, the p layer 31, the i layer 32, the n layer 33 of the first photoelectric conversion unit 3, and the p layer 41 of the second photoelectric conversion unit 4 are formed separately. Since a plurality of film formation reaction chambers are connected in a row, four layers including a p layer 31, an i layer 32, an n layer 33, and a p layer 41 are arranged on the substrate 1 in accordance with the order of the plurality of film formation reaction chambers. Is laminated.
The exposure apparatus 80 exposes the substrate processed in the first film forming apparatus 60 to the atmosphere, and then moves the substrate to the second film forming apparatus 70.
In the second film forming apparatus 70, the i layer 42, the barrier layer 45, and the n layer 43 of the second photoelectric conversion unit 4 are stacked in this order in the same film forming reaction chamber. Further, in such a film formation reaction chamber, a plurality of substrates are collectively conveyed, and an i layer 42, a barrier layer 45, and an n layer 43 are sequentially formed in each of the plurality of substrates in the film formation reaction chamber. (Batch processing).
　製造システムにおける第一成膜装置６０においては、基板が最初に搬入され、内部圧力を減圧する真空ポンプが接続されたロード室６１（Ｌ：Ｌｏｒｄ）が配置されている。なお、ロード室６１の後段に、成膜プロセスに応じて、基板温度を一定の温度に到達させるように基板を加熱する加熱チャンバが設けられてもよい。
　ロード室６１には、ｐ層３１を形成するＰ層成膜反応室６２が接続されている。Ｐ層成膜反応室６２には、ｉ層３２を形成するＩ層成膜反応室６３が接続されている。Ｉ層成膜反応室６３には、ｎ層３３を形成するＮ層成膜反応室６４が接続されている。Ｎ層成膜反応室６４には、ｐ層４１を形成するＰ層成膜反応室６５が接続されている。Ｐ層成膜反応室６５には、内部圧力を減圧から大気圧に戻し、基板を第一成膜装置６０から搬出するアンロード室６６（ＵＬ：Ｕｎｌｏｒｄ）が接続されている。ロード室６１とアンロード室６６との間に、上述した複数の反応室６２，６３，６４，６５が連続して直線状に配置されている。減圧雰囲気が維持された状態で、基板は、反応室６２，６３，６４，６５に順に搬送され、各反応室において成膜処理が行われる。
　図３に示すＡ地点においては、図２Ａに示すように、透明導電膜２が成膜された絶縁性透明基板１が準備される。また、図３に示すＢ地点においては、図２Ｂに示すように透明導電膜２上に、第一光電変換ユニット３のｐ層３１，ｉ層３２，ｎ層３３，及び第二光電変換ユニット４のｐ層４１が設けられた光電変換装置１０の第一中間品１０ａが形成される。 In the first film forming apparatus 60 in the manufacturing system, a load chamber 61 (L: Lord) to which a substrate is first loaded and a vacuum pump for reducing the internal pressure is connected is disposed. A heating chamber that heats the substrate so that the substrate temperature reaches a certain temperature may be provided in the subsequent stage of the load chamber 61 according to the film forming process.
Connected to the load chamber 61 is a P layer deposition reaction chamber 62 for forming the p layer 31. An I layer deposition reaction chamber 63 for forming the i layer 32 is connected to the P layer deposition reaction chamber 62. An N layer deposition reaction chamber 64 for forming the n layer 33 is connected to the I layer deposition reaction chamber 63. A P layer deposition reaction chamber 65 for forming the p layer 41 is connected to the N layer deposition reaction chamber 64. Connected to the P layer deposition reaction chamber 65 is an unload chamber 66 (UL: United) that returns the internal pressure from reduced pressure to atmospheric pressure and carries the substrate out of the first film deposition apparatus 60. Between the load chamber 61 and the unload chamber 66, the plurality of reaction chambers 62, 63, 64, 65 described above are continuously arranged in a straight line. In a state where the reduced-pressure atmosphere is maintained, the substrate is sequentially transferred to the reaction chambers 62, 63, 64, and 65, and a film forming process is performed in each reaction chamber.
At point A shown in FIG. 3, an insulating transparent substrate 1 on which a transparent conductive film 2 is formed is prepared as shown in FIG. 2A. 3, the p layer 31, i layer 32, n layer 33, and second photoelectric conversion unit 4 of the first photoelectric conversion unit 3 are formed on the transparent conductive film 2 as shown in FIG. 2B. The first intermediate product 10a of the photoelectric conversion device 10 provided with the p layer 41 is formed.
　また、製造システムにおける第二成膜装置７０は、ロード・アンロード室７１（Ｌ／ＵＬ）と、ロード・アンロード室７１に接続されたＩＩＮ層成膜反応室７２とを有する。
　ロード・アンロード室７１は、第一成膜装置６０において処理された光電変換装置の第一中間品１０ａをＩＩＮ層成膜反応室７２に搬入する。ロード・アンロード室７１は、基板がロード・アンロード室７１に搬入された後に内部圧力を減圧したり、基板をロード・アンロード室７１から搬出する際に内部圧力を減圧から大気圧に戻したりする。
　ＩＩＮ層成膜反応室７２においては、第二光電変換ユニット４のｉ層４２，バリア層４５，及びｎ層４３が同じ成膜反応室においてこの順番で積層される。また、このような成膜反応室には、複数の基板が一括に搬送され、複数の基板の各々にｉ層４２，バリア層４５，及びｎ層４３が順に成膜反応室の中で形成される（バッチ処理）。従って、ＩＩＮ層成膜反応室７２における成膜処理は、複数の基板に対して同時に行われる。
　図３に示すＣ地点において、図２Ｃに示すように、第一光電変換ユニット３上に、第二光電変換ユニット４が設けられた光電変換装置１０の第二中間品１０ｂが配置される。 The second film forming apparatus 70 in the manufacturing system includes a load / unload chamber 71 (L / UL) and an IIN layer film formation reaction chamber 72 connected to the load / unload chamber 71.
The load / unload chamber 71 carries the first intermediate product 10 a of the photoelectric conversion apparatus processed in the first film formation apparatus 60 into the IIN layer film formation reaction chamber 72. The load / unload chamber 71 reduces the internal pressure after the substrate is loaded into the load / unload chamber 71, or returns the internal pressure from the reduced pressure to the atmospheric pressure when the substrate is unloaded from the load / unload chamber 71. Or
In the IIN layer deposition reaction chamber 72, the i layer 42, the barrier layer 45, and the n layer 43 of the second photoelectric conversion unit 4 are stacked in this order in the same deposition reaction chamber. Further, in such a film formation reaction chamber, a plurality of substrates are collectively conveyed, and an i layer 42, a barrier layer 45, and an n layer 43 are sequentially formed in each of the plurality of substrates in the film formation reaction chamber. (Batch processing). Therefore, the film formation process in the IIN layer film formation reaction chamber 72 is performed simultaneously on a plurality of substrates.
At the point C shown in FIG. 3, as shown in FIG. 2C, the second intermediate product 10 b of the photoelectric conversion device 10 in which the second photoelectric conversion unit 4 is provided is disposed on the first photoelectric conversion unit 3.
　また、図３に示すインライン型の第一成膜装置６０においては、２つの基板に対して同時に成膜処理が行われる。Ｉ層成膜反応室６３は、４つの反応室６３ａ，６３ｂ，６３ｃ，６３ｄによって構成されている。
　また、図３において、バッチ型の第二成膜装置７０においては、６つの基板に対して同時に成膜処理が行われる。 In addition, in the inline-type first film forming apparatus 60 shown in FIG. 3, film forming processes are simultaneously performed on two substrates. The I-layer film formation reaction chamber 63 includes four reaction chambers 63a, 63b, 63c, and 63d.
In FIG. 3, in the batch-type second film forming apparatus 70, film forming processes are simultaneously performed on six substrates.
　以上のような光電変換装置の製造方法によれば、非晶質光電変換装置である第一光電変換ユニット３のｎ層３３上に結晶質光電変換装置である第二光電変換ユニット４のｐ層４１が予め形成され、ｐ層４１上に第二光電変換ユニット４のｉ層４２，バリア層４５，及びｎ層４３が形成される。このように成膜することにより、第二光電変換ユニット４のｉ層４２の結晶化率分布を容易にコントロールすることができる。
　特に、第一実施形態においては、同じ成膜室（ＩＩＮ層成膜反応室７２）にて、第二光電変換ユニット４のｉ層４２とｎ層４３との間に、バリア層４５が形成されるので、良好な特性を有する光電変換装置１０を得ることができる。 According to the manufacturing method of the photoelectric conversion device as described above, the p layer of the second photoelectric conversion unit 4 which is a crystalline photoelectric conversion device is formed on the n layer 33 of the first photoelectric conversion unit 3 which is an amorphous photoelectric conversion device. 41 is formed in advance, and the i layer 42, the barrier layer 45, and the n layer 43 of the second photoelectric conversion unit 4 are formed on the p layer 41. By forming the film in this manner, the crystallization rate distribution of the i layer 42 of the second photoelectric conversion unit 4 can be easily controlled.
In particular, in the first embodiment, the barrier layer 45 is formed between the i layer 42 and the n layer 43 of the second photoelectric conversion unit 4 in the same film formation chamber (IIN layer film formation reaction chamber 72). Therefore, the photoelectric conversion device 10 having good characteristics can be obtained.
　また、第一実施形態においては、大気中に露呈されたｐ層４１上に、第二光電変換ユニット４を構成するｉ層４２，バリア層４５，及びｎ層４３が形成されている。この場合、ｉ層４２を形成する前に、大気中に露呈されたｐ層４１を、ＯＨラジカルを含有する雰囲気においてプラズマに曝すことが望ましい（ＯＨラジカルプラズマ処理）。また、ｉ層４２を形成する前に、大気中に露呈されたｐ層４１を、水素ガスを含む雰囲気においてプラズマに曝すことが望ましい（水素プラズマ処理）。
　ＯＨラジカルプラズマ処理としては、ＯＨラジカルプラズマ処理室を予め準備し、第二光電変換ユニット４のｐ層４１が形成された基板をこのプラズマ処理室に搬送し、ｐ層４１をプラズマに曝す方法が採用される。また、ＯＨラジカルプラズマ処理の後には、第二光電変換ユニット４を構成するｉ層４２，バリア層４５，及びｎ層４３がＯＨラジカルプラズマ処理室とは異なる反応室で成膜される。
　一方、ＯＨラジカルプラズマ処理としては、ＯＨラジカルプラズマ処理と、第二光電変換ユニット４を構成するｉ層４２，バリア層４５，及びｎ層４３を形成する処理とを連続して同じ反応室内において行なってもよい。 In the first embodiment, the i layer 42, the barrier layer 45, and the n layer 43 constituting the second photoelectric conversion unit 4 are formed on the p layer 41 exposed to the atmosphere. In this case, before forming the i layer 42, it is desirable to expose the p layer 41 exposed to the atmosphere to plasma in an atmosphere containing OH radicals (OH radical plasma treatment). In addition, before forming the i layer 42, it is desirable to expose the p layer 41 exposed in the atmosphere to plasma in an atmosphere containing hydrogen gas (hydrogen plasma treatment).
As the OH radical plasma treatment, there is a method in which an OH radical plasma treatment chamber is prepared in advance, the substrate on which the p layer 41 of the second photoelectric conversion unit 4 is formed is transferred to the plasma treatment chamber, and the p layer 41 is exposed to plasma. Adopted. Further, after the OH radical plasma treatment, the i layer 42, the barrier layer 45, and the n layer 43 constituting the second photoelectric conversion unit 4 are formed in a reaction chamber different from the OH radical plasma treatment chamber.
On the other hand, as the OH radical plasma treatment, the OH radical plasma treatment and the treatment for forming the i layer 42, the barrier layer 45, and the n layer 43 constituting the second photoelectric conversion unit 4 are continuously performed in the same reaction chamber. May be.
　ここで、同じ処理室において、ＯＨラジカルプラズマ処理と、第二光電変換ユニット４のｉ層４２，バリア層４５，及びｎ層４３を形成する処理とを連続して行う場合、各層を成膜する前にＯＨラジカルを含むプラズマに成膜室の内壁を曝すことにより、反応室内に残留する不純物ガスＰＨ３を分解して除去することが可能である。
　従って、第二光電変換ユニット４のｉ層４２，バリア層４５，及びｎ層４３の成膜工程を同じ処理室内で繰り返して行なった場合であっても、良好な不純物プロファイルが得られ、良好な発電効率を有する積層薄膜からなる光電変換装置１０を得ることができる。 Here, when the OH radical plasma treatment and the treatment for forming the i layer 42, the barrier layer 45, and the n layer 43 of the second photoelectric conversion unit 4 are continuously performed in the same treatment chamber, the respective layers are formed. By previously exposing the inner wall of the film formation chamber to plasma containing OH radicals, the impurity gas PH 3 remaining in the reaction chamber can be decomposed and removed.
Therefore, even when the film formation process of the i layer 42, the barrier layer 45, and the n layer 43 of the second photoelectric conversion unit 4 is repeatedly performed in the same processing chamber, a good impurity profile is obtained and a good condition is obtained. A photoelectric conversion device 10 made of a laminated thin film having power generation efficiency can be obtained.
　また、第二光電変換ユニット４のｐ層４１に対して施すＯＨラジカルプラズマ処理においては、プロセスガスとして、ＣＯ２、ＣＨ２Ｏ２又はＨ２ＯとＨ２とからなる混合ガスを用いることが望ましい。
　即ち、ＯＨラジカル含有プラズマを生成するには、（ＣＯ２＋Ｈ２）、（ＣＨ２Ｏ２＋Ｈ２）、又は（Ｈ２Ｏ＋Ｈ２）を処理室内に流入させた状態で、処理室内の電極間に、例えば、１３．５ＭＨｚ，２７ＭＨｚ，４０ＭＨｚ等の高周波を印加することにより有効に生成することができる。
　このＯＨラジカル含有プラズマの生成において、（ＨＣＯＯＣＨ３＋Ｈ２）、（ＣＨ３ＯＨ＋Ｈ２）等のアルコール類、ギ酸エステル類等の酸素を含有する炭化水素類を用いてもよい。ただし、Ｃ不純物の量が増加するという問題を有する系においては、（ＣＯ２＋Ｈ２）、（ＣＨ２Ｏ２＋Ｈ２）ないしは（Ｈ２Ｏ＋Ｈ２）を使用することが好ましい。 In the OH radical plasma treatment applied to the p layer 41 of the second photoelectric conversion unit 4, CO 2 , CH 2 O 2, or a mixed gas composed of H 2 O and H 2 is used as a process gas. desirable.
That is, in order to generate OH radical-containing plasma, (CO 2 + H 2 ), (CH 2 O 2 + H 2 ), or (H 2 O + H 2 ) is allowed to flow between the electrodes in the processing chamber while flowing into the processing chamber. For example, it can be effectively generated by applying a high frequency such as 13.5 MHz, 27 MHz, or 40 MHz.
In the generation of the OH radical-containing plasma, alcohols such as (HCOOCH 3 + H 2 ) and (CH 3 OH + H 2 ), and hydrocarbons containing oxygen such as formate esters may be used. However, in a system having a problem that the amount of C impurity increases, it is preferable to use (CO 2 + H 2 ), (CH 2 O 2 + H 2 ) or (H 2 O + H 2 ).
　このＯＨラジカル含有プラズマの生成においてプラズマ生成ガスとしてＣＯ２を用いる際には、系にＨ２の存在が必要である。しかしながら、（ＣＨ２Ｏ２＋Ｈ２）、（Ｈ２Ｏ＋Ｈ２）の他、（ＨＣＯＯＣＨ３＋Ｈ２）、（ＣＨ３ＯＨ＋Ｈ２）等のアルコール類、ギ酸エステル類等の酸素を含有する炭化水素類を使用する際は、必ずしも系にＨ２が存在していることが必要でない。 When CO 2 is used as a plasma generation gas in the generation of this OH radical-containing plasma, the presence of H 2 is necessary in the system. However, in addition to (CH 2 O 2 + H 2 ), (H 2 O + H 2 ), alcohols such as (HCOOCH 3 + H 2 ) and (CH 3 OH + H 2 ), and hydrocarbons containing oxygen such as formate esters when using is not always necessary that the H 2 is present in the system.
　このようにＯＨラジカルプラズマ処理を施すと、Ｏラジカル処理に比べて穏やかな反応が生じる。このため、下層にダメージを与えることがなく、第一光電変換ユニット３のｐ層３１及びｉ層３２上に形成された微結晶相が非晶質結晶相に分散したｎ層３３が得られる。これによって、ｎ層３３上に形成されたｐ層４１の表面を活性させる効果が得られる。
　従って、第二光電変換ユニット４のｐ層４１の表面を活性化させることが可能であり、ｐ層４１上に積層される第二光電変換ユニット４のｉ層４２及びｎ層４３の結晶を有効に生成することができる。従って、大面積の基板に第二光電変換ユニット４を形成する場合であっても、均一な結晶化率分布を得ることが可能となる。
　ＯＨラジカルプラズマ処理の代わりに、水素プラズマ処理を行ってもＯＨラジカルプラズマ処理と同様の効果を得ることができる。 When the OH radical plasma treatment is performed in this way, a mild reaction occurs as compared with the O radical treatment. For this reason, the n layer 33 in which the microcrystalline phase formed on the p layer 31 and the i layer 32 of the first photoelectric conversion unit 3 is dispersed in the amorphous crystalline phase is obtained without damaging the lower layer. As a result, an effect of activating the surface of the p layer 41 formed on the n layer 33 is obtained.
Therefore, the surface of the p layer 41 of the second photoelectric conversion unit 4 can be activated, and the crystals of the i layer 42 and the n layer 43 of the second photoelectric conversion unit 4 stacked on the p layer 41 are effective. Can be generated. Therefore, even when the second photoelectric conversion unit 4 is formed on a large-area substrate, a uniform crystallization rate distribution can be obtained.
Even if the hydrogen plasma treatment is performed instead of the OH radical plasma treatment, the same effect as the OH radical plasma treatment can be obtained.
　また、結晶質のｎ層３３と第二光電変換ユニット４のｐ層４１としては、非晶質のアモルファスシリコン層に微結晶シリコンが分散された層が採用されてもよい。また、非晶質のアモルファス酸化シリコン層（ａ－ＳｉＯ）に微結晶シリコンが分散された層が採用されてもよい。
　しかし、大面積の基板に形成される膜に必要な均一な結晶化分布率を得るためには、即ち、結晶質光電変換層のｉ層とｎ層の結晶成長核の生成による均一な結晶化分布率を得るためには、非晶質のアモルファス酸化シリコン層に微結晶シリコンが分散された層を採用することが好ましい。 Further, as the crystalline n layer 33 and the p layer 41 of the second photoelectric conversion unit 4, a layer in which microcrystalline silicon is dispersed in an amorphous silicon layer may be employed. Alternatively, a layer in which microcrystalline silicon is dispersed in an amorphous silicon oxide layer (a-SiO) may be employed.
However, in order to obtain a uniform crystallization distribution rate necessary for a film formed on a large-area substrate, that is, uniform crystallization by generating crystal growth nuclei of the crystalline photoelectric conversion layer i and n layers. In order to obtain a distribution ratio, it is preferable to employ a layer in which microcrystalline silicon is dispersed in an amorphous silicon oxide layer.
　このように、非晶質のアモルファス酸化シリコン層（ａ－ＳｉＯ）に微結晶シリコンが分散された層においては、アモルファスシリコン半導体層よりも低い屈折率が得られるように調整することが可能である。この層を波長選択反射膜として機能させ、短波長光をトップセル側に閉じ込めることによって変換効率を向上させることが可能である。
　また、この光を閉じ込める効果の有無に関わらず、非晶質のアモルファス酸化シリコン層（ａ－ＳｉＯ）に微結晶シリコンが分散された層においては、ＯＨラジカルプラズマ処理によって第二光電変換ユニット４のｉ層４２とｎ層４３の結晶成長核が有効に生成される。従って、大面積の基板においても均一な結晶化率分布を得ることが可能となる。 As described above, in a layer in which microcrystalline silicon is dispersed in an amorphous amorphous silicon oxide layer (a-SiO), the refractive index can be adjusted to be lower than that of an amorphous silicon semiconductor layer. . It is possible to improve conversion efficiency by making this layer function as a wavelength selective reflection film and confining short wavelength light on the top cell side.
Regardless of the effect of confining this light, in the layer in which microcrystalline silicon is dispersed in the amorphous silicon oxide layer (a-SiO), the second photoelectric conversion unit 4 is subjected to OH radical plasma treatment. Crystal growth nuclei of the i layer 42 and the n layer 43 are effectively generated. Therefore, a uniform crystallization rate distribution can be obtained even on a large-area substrate.
　また、第一実施形態においては、第一光電変換ユニット３を構成するｎ層３３として、結晶質のシリコン系薄膜を形成してもよい。
　即ち、非晶質の第一光電変換ユニット３のｐ層３１及びｉ層３２上に、結晶質のｎ層３３及び結晶質の第二光電変換ユニット４のｐ層４１を形成する。
　この際、ｐ層３１及びｉ層３２上に形成される結晶質のｎ層３３及び第二光電変換ユニット４のｐ層４１は、ｐ層３１及びｉ層３２が形成された後、大気雰囲気に曝すことなく、連続して形成されることが望ましい。 In the first embodiment, a crystalline silicon-based thin film may be formed as the n layer 33 constituting the first photoelectric conversion unit 3.
That is, the crystalline n layer 33 and the p layer 41 of the crystalline second photoelectric conversion unit 4 are formed on the p layer 31 and the i layer 32 of the amorphous first photoelectric conversion unit 3.
At this time, the crystalline n layer 33 formed on the p layer 31 and the i layer 32 and the p layer 41 of the second photoelectric conversion unit 4 are formed in the atmosphere after the p layer 31 and the i layer 32 are formed. It is desirable to form continuously without exposing.
　一方、第一光電変換ユニット３のｐ層３１、ｉ層３２、及びｎ層３３が形成された後に第一光電変換ユニット３を大気雰囲気に曝し、その後に反応室で第二光電変換ユニット４のｐ層４１、ｉ層４２、及びｎ層４３を形成する方法が知られている。この方法においては、基板が大気雰囲気に曝される時間，温度，雰囲気等に起因して、第一光電変換ユニット３のｉ層３２が劣化し、素子性能が低下する。
　これに対し、第一実施形態においては、第一光電変換ユニット３のｐ層３１及びｉ層３２を形成した後、大気雰囲気に曝すことなく、結晶質のｎ層３３及び第二光電変換ユニット４のｐ層４１が連続して形成される。 On the other hand, after the p layer 31, i layer 32, and n layer 33 of the first photoelectric conversion unit 3 are formed, the first photoelectric conversion unit 3 is exposed to the air atmosphere, and then the second photoelectric conversion unit 4 of the reaction chamber is exposed. A method of forming the p layer 41, the i layer 42, and the n layer 43 is known. In this method, the i-layer 32 of the first photoelectric conversion unit 3 deteriorates due to the time, temperature, atmosphere, etc., the substrate is exposed to the air atmosphere, and the device performance is degraded.
In contrast, in the first embodiment, after the p layer 31 and the i layer 32 of the first photoelectric conversion unit 3 are formed, the crystalline n layer 33 and the second photoelectric conversion unit 4 are not exposed to the air atmosphere. The p layer 41 is continuously formed.
　上述したように、結晶質のｎ層３３及び第二光電変換ユニット４のｐ層４１が形成された基板に個別の反応室においてＯＨラジカルプラズマ処理を行うことにより、ｐ層４１の表面が活性化され、結晶核が生成される。引き続いて、結晶質の第二光電変換ユニット４のｉ層４２をｐ層４１上に積層することにより、大面積に均一な結晶化率分布を有し、良好な発電効率を有する積層薄膜からなる光電変換装置１０Ａ（１０）を得ることができる。また、このようなＯＨラジカルプラズマ処理は、ｉ層４２が形成される反応室と同じ反応室において行われてもよい。 As described above, the surface of the p layer 41 is activated by performing an OH radical plasma treatment in a separate reaction chamber on the substrate on which the crystalline n layer 33 and the p layer 41 of the second photoelectric conversion unit 4 are formed. As a result, crystal nuclei are generated. Subsequently, the i-layer 42 of the crystalline second photoelectric conversion unit 4 is laminated on the p-layer 41, thereby comprising a laminated thin film having a uniform crystallization rate distribution over a large area and good power generation efficiency. A photoelectric conversion device 10A (10) can be obtained. Such OH radical plasma treatment may be performed in the same reaction chamber as the reaction chamber in which the i layer 42 is formed.
＜第二実施形態＞
　次に、本発明の第二実施形態について説明する。
　なお、以下の説明においては、第一実施形態と同一部材には同一符号を付して、その説明は省略または簡略化する。第二実施形態においては、上述した第一実施形態とは異なる構成又は方法について主に説明する。
　図４は、第二実施形態にかかる製造方法において製造された光電変換装置１０の層構成を示す断面図である。 <Second embodiment>
Next, a second embodiment of the present invention will be described.
In the following description, the same members as those in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted or simplified. In the second embodiment, a configuration or method different from the first embodiment described above will be mainly described.
FIG. 4 is a cross-sectional view showing a layer configuration of the photoelectric conversion device 10 manufactured by the manufacturing method according to the second embodiment.
　上述した第一実施形態においては、タンデム構造を有する光電変換装置について説明したが、本発明は、タンデム構造に限定されず、シングル構造を有する光電変換装置についても適用可能である。
　図４に示すように、第二実施形態の光電変換装置１０Ｂ（１０）においては、透明導電膜が形成された基板１が用いられており、この透明導電膜２は、基板１の第１面１ａ上に形成されている。透明導電膜２上にはｐｉｎ型の第三光電変換ユニット８が形成されている。第三光電変換ユニット８においては、ｐ型半導体層８１（ｐ層、第三ｐ型半導体層），実質的に真性なｉ型半導体層８２（ｉ層、第三ｉ型半導体層），ｎ型半導体層８３（ｎ層、第三ｎ型半導体層）が順に積層されている。 In the first embodiment described above, the photoelectric conversion device having a tandem structure has been described. However, the present invention is not limited to the tandem structure, and can also be applied to a photoelectric conversion device having a single structure.
As shown in FIG. 4, in the photoelectric conversion device 10 </ b> B (10) of the second embodiment, a substrate 1 on which a transparent conductive film is formed is used, and the transparent conductive film 2 is the first surface of the substrate 1. It is formed on 1a. A pin-type third photoelectric conversion unit 8 is formed on the transparent conductive film 2. In the third photoelectric conversion unit 8, a p-type semiconductor layer 81 (p layer, third p-type semiconductor layer), a substantially intrinsic i-type semiconductor layer 82 (i layer, third i-type semiconductor layer), n-type Semiconductor layers 83 (n layer and third n-type semiconductor layer) are sequentially stacked.
　光電変換装置１０Ｂ（１０）においては、第三光電変換ユニット８を構成するｐ層８１，ｉ層８２，ｎ層８３は結晶質のシリコン系薄膜からなる。また、ｉ層８２とｎ層８３との間に、アモルファスシリコン系薄膜からなるｉ層がバリア層８５として配置されている。 In the photoelectric conversion device 10B (10), the p layer 81, the i layer 82, and the n layer 83 constituting the third photoelectric conversion unit 8 are made of a crystalline silicon-based thin film. Further, an i layer made of an amorphous silicon thin film is disposed as a barrier layer 85 between the i layer 82 and the n layer 83.
　この光電変換装置１０Ｂ（１０）においても、上記のようにバリア層８５が設けられているので、ｎ層８３に向けて逆流した正孔（ホール）は、バリア層８５によってｐ層８１に向けて反射され、短絡電流（Ｊｓｃ）を向上させることができる。
　また、バリア層８５が設けられているので、微結晶セルのバンドギャップが増加し、開放電圧（Ｖｏｃ）を向上させることができる。
　このようにバリア層８５をｉ層８２とｎ層８３との間に挿入することにより、バリア層の機能によってＶｏｃ及びＪｓｃの両方を向上させることができ、その結果、光電変換装置１０Ｂ（１０）の光電変換効率が向上する。 Also in this photoelectric conversion device 10B (10), since the barrier layer 85 is provided as described above, holes that have flowed back toward the n layer 83 are directed toward the p layer 81 by the barrier layer 85. Reflected and the short circuit current (Jsc) can be improved.
In addition, since the barrier layer 85 is provided, the band gap of the microcrystalline cell can be increased and the open circuit voltage (Voc) can be improved.
By inserting the barrier layer 85 between the i layer 82 and the n layer 83 in this way, both Voc and Jsc can be improved by the function of the barrier layer, and as a result, the photoelectric conversion device 10B (10). The photoelectric conversion efficiency is improved.
　光電変換装置１０Ｂ（１０）の製造方法は、第三光電変換ユニット８を構成するｐ層８１及びｉ層８２を順に形成するステップ、第三光電変換ユニット８を構成するｉ層上８２に、バリア層８５を形成するステップ、及びバリア層８５上に、第三光電変換ユニット８を構成するｎ層８３を形成するステップを含む。
　第三光電変換ユニット８を構成するｐ層８１，ｉ層８２，バリア層８５，及びｎ層８３の各々を形成する方法は、上述した第一実施形態における第二光電変換ユニット４を構成するｐ層４１，ｉ層４２，バリア層４５，及びｎ層４３を形成する方法と同様である。
　上述したように得られた光電変換装置１０Ｂ（１０）においては、バリア層８５の機能によってＶｏｃ及びＪｓｃの両方を向上させることができ、光電変換効率が向上する。その結果、第二実施形態の製造方法においては光電変換効率が向上した光電変換装置１０Ｂ（１０）を簡便に製造することが可能である。 The manufacturing method of the photoelectric conversion device 10 </ b> B (10) includes a step of sequentially forming a p layer 81 and an i layer 82 constituting the third photoelectric conversion unit 8, and a barrier on the i layer 82 constituting the third photoelectric conversion unit 8. Forming a layer 85, and forming an n layer 83 constituting the third photoelectric conversion unit 8 on the barrier layer 85.
The method of forming each of the p layer 81, the i layer 82, the barrier layer 85, and the n layer 83 constituting the third photoelectric conversion unit 8 is the p constituting the second photoelectric conversion unit 4 in the first embodiment described above. This is the same as the method of forming the layer 41, the i layer 42, the barrier layer 45, and the n layer 43.
In the photoelectric conversion device 10B (10) obtained as described above, both Voc and Jsc can be improved by the function of the barrier layer 85, and the photoelectric conversion efficiency is improved. As a result, in the manufacturing method of the second embodiment, it is possible to easily manufacture the photoelectric conversion device 10B (10) with improved photoelectric conversion efficiency.
＜第三実施形態＞
　次に、本発明の第三実施形態について説明する。
　なお、以下の説明においては、第一実施形態と同一部材には同一符号を付して、その説明は省略または簡略化する。第三実施形態においては、上述した第一実施形態とは異なる構成又は方法について主に説明する。
　図５は、第三実施形態にかかる製造方法によって製造された光電変換装置１０Ｃ（１０）の層構成を示す断面図である。 <Third embodiment>
Next, a third embodiment of the present invention will be described.
In the following description, the same members as those in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted or simplified. In the third embodiment, a configuration or method different from the first embodiment described above will be mainly described.
FIG. 5 is a cross-sectional view showing a layer configuration of a photoelectric conversion device 10C (10) manufactured by the manufacturing method according to the third embodiment.
　上述した第一実施形態及び第二実施形態においてはタンデム構造又はシングル構造を有する光電変換装置について説明したが、本発明は、これらの構造に限定されず、トリプル構造を有する光電変換装置についても適用可能である。
　図５に示すように、光電変換装置１０Ｃ（１０）においては、透明導電膜が形成された基板１が用いられており、この透明導電膜２は、基板１の第１面１ａ上に形成されている。透明導電膜２上には、第四光電変換ユニット１１０，第五光電変換ユニット１２０，及び第六光電変換ユニット１３０が順に重ねて設けられている。第四光電変換ユニット１１０，第五光電変換ユニット１２０，及び第六光電変換ユニット１３０は、ｐ型半導体層，実質的に真性なｉ型半導体層，及びｎ型半導体層が積層されているｐｉｎ型の半導体積層構造を有する。 In the first embodiment and the second embodiment described above, the photoelectric conversion device having a tandem structure or a single structure has been described. However, the present invention is not limited to these structures, and is also applicable to a photoelectric conversion device having a triple structure. Is possible.
As shown in FIG. 5, the photoelectric conversion device 10 </ b> C (10) uses a substrate 1 on which a transparent conductive film is formed. The transparent conductive film 2 is formed on the first surface 1 a of the substrate 1. ing. On the transparent conductive film 2, a fourth photoelectric conversion unit 110, a fifth photoelectric conversion unit 120, and a sixth photoelectric conversion unit 130 are sequentially stacked. The fourth photoelectric conversion unit 110, the fifth photoelectric conversion unit 120, and the sixth photoelectric conversion unit 130 are a pin type in which a p-type semiconductor layer, a substantially intrinsic i-type semiconductor layer, and an n-type semiconductor layer are stacked. It has a semiconductor laminated structure.
　第四光電変換ユニット１１０は、ｐ型半導体層１１１（ｐ層、第四ｐ型半導体層），実質的に真性なｉ型半導体層１１２（ｉ層、非晶質シリコン層、第四ｉ型半導体層），ｎ型半導体層１１３（ｎ層、第四ｎ型半導体層）が積層されたｐｉｎ構造を有している。即ち、ｐ層１１１，ｉ層１１２，及びｎ層１１３を、この順に積層することにより第四光電変換ユニット１１０が形成されている。この第四光電変換ユニット１１０は、例えば、アモルファス（非晶質）シリコン系材料によって構成されている。
　第四光電変換ユニット１１０においては、ｐ層１１１の厚さが例えば８０Å、ｉ層１１２の厚さが例えば１０００Å、ｎ層１１３の厚さが例えば３００Åである。
　第四光電変換ユニット１１０を構成するｐ層１１１，ｉ層１１２，及びｎ層１１３は、複数のプラズマＣＶＤ反応室において形成される。即ち、互いに異なる複数のプラズマＣＶＤ反応室の各々においては、第四光電変換ユニット１１０を構成する一つの層が形成される。 The fourth photoelectric conversion unit 110 includes a p-type semiconductor layer 111 (p layer, fourth p-type semiconductor layer), a substantially intrinsic i-type semiconductor layer 112 (i layer, amorphous silicon layer, fourth i-type semiconductor). Layer) and an n-type semiconductor layer 113 (n-layer, fourth n-type semiconductor layer) are stacked. That is, the fourth photoelectric conversion unit 110 is formed by stacking the p layer 111, the i layer 112, and the n layer 113 in this order. The fourth photoelectric conversion unit 110 is made of, for example, an amorphous (amorphous) silicon-based material.
In the fourth photoelectric conversion unit 110, the thickness of the p layer 111 is, for example, 80 mm, the thickness of the i layer 112 is, for example, 1000 mm, and the thickness of the n layer 113 is, for example, 300 mm.
The p layer 111, the i layer 112, and the n layer 113 constituting the fourth photoelectric conversion unit 110 are formed in a plurality of plasma CVD reaction chambers. That is, in each of a plurality of plasma CVD reaction chambers different from each other, one layer constituting the fourth photoelectric conversion unit 110 is formed.
　第五光電変換ユニット１２０は、ｐ型半導体層１２１（ｐ層、第五ｐ型半導体層），実質的に真性なｉ型半導体層１２２（ｉ層、結晶質シリコン層、第五ｉ型半導体層），ｎ型半導体層１２３（ｎ層、第五ｎ型半導体層）が積層されたｐｉｎ構造を有している。即ち、ｐ層１２１，ｉ層１２２，及びｎ層１２３を、この順に積層することにより第五光電変換ユニット１２０が形成されている。
　この第五光電変換ユニット１２０は、結晶質を含むシリコン系材料によって構成されている。特に、第五光電変換ユニット１２０のｉ層１２２は、アモルファスのシリコンゲルマニウム系薄膜からなることが好ましい。
　第二光電変換ユニットは、ｐ層１２１の厚さが例えば２００Å、ｉ層１２２の厚さが例えば１２０００Å、ｎ層１２３の厚さが例えば３００Åである。 The fifth photoelectric conversion unit 120 includes a p-type semiconductor layer 121 (p layer, fifth p-type semiconductor layer), a substantially intrinsic i-type semiconductor layer 122 (i layer, crystalline silicon layer, fifth i-type semiconductor layer). ), An n-type semiconductor layer 123 (n layer, fifth n-type semiconductor layer) is stacked. That is, the fifth photoelectric conversion unit 120 is formed by stacking the p layer 121, the i layer 122, and the n layer 123 in this order.
The fifth photoelectric conversion unit 120 is made of a silicon-based material containing a crystalline material. In particular, the i layer 122 of the fifth photoelectric conversion unit 120 is preferably made of an amorphous silicon germanium-based thin film.
In the second photoelectric conversion unit, the thickness of the p layer 121 is 200 mm, the thickness of the i layer 122 is 12000 mm, for example, and the thickness of the n layer 123 is 300 mm, for example.
　第六光電変換ユニット１３０は、ｐ型半導体層１３１（ｐ層、第六ｐ型半導体層）、実質的に真性なｉ型半導体層１３２（ｉ層、結晶質シリコン層、第六ｉ型半導体層）、及びｎ型半導体層１３３（ｎ層、第六ｎ型半導体層）が積層されたｐｉｎ構造を有している。即ち、ｐ層１３１，ｉ層１３２，及びｎ層１３３を、この順に積層することにより第六光電変換ユニット１３０が形成されている。この第六光電変換ユニット１３０は、結晶質を含むシリコン系材料によって構成されている。
　特に、第六光電変換ユニット１３０のｉ層１３２は、微結晶のシリコンゲルマニウム系薄膜（μｃ－ＳｉＧｅ）からなることが好ましい。
　第六光電変換ユニット１３０においては、ｐ層１３１の厚さが例えば２００Å、ｉ層１３２の厚さが例えば１５０００Å、ｎ層１３３の厚さが例えば３００Åである。 The sixth photoelectric conversion unit 130 includes a p-type semiconductor layer 131 (p layer, sixth p-type semiconductor layer), a substantially intrinsic i-type semiconductor layer 132 (i layer, crystalline silicon layer, sixth i-type semiconductor layer). ) And an n-type semiconductor layer 133 (n-layer, sixth n-type semiconductor layer) are stacked. That is, the sixth photoelectric conversion unit 130 is formed by stacking the p layer 131, the i layer 132, and the n layer 133 in this order. The sixth photoelectric conversion unit 130 is made of a silicon-based material containing a crystalline material.
In particular, the i layer 132 of the sixth photoelectric conversion unit 130 is preferably made of a microcrystalline silicon germanium-based thin film (μc-SiGe).
In the sixth photoelectric conversion unit 130, the thickness of the p layer 131 is 200 mm, the thickness of the i layer 132 is 15000 mm, for example, and the thickness of the n layer 133 is 300 mm, for example.
　特に、第三実施形態の光電変換装置１０Ｃ（１０）の第六光電変換ユニット１３０においては、ｐ層１３１，ｉ層１３２，及びｎ層１３３が結晶質のシリコン系薄膜からなり、ｉ層１３２とｎ層１３３との間に、アモルファスシリコン系薄膜からなるｉ型半導体層がバリア層１３５として配置されている。 In particular, in the sixth photoelectric conversion unit 130 of the photoelectric conversion device 10C (10) of the third embodiment, the p layer 131, the i layer 132, and the n layer 133 are made of a crystalline silicon thin film, Between the n layer 133, an i-type semiconductor layer made of an amorphous silicon thin film is disposed as a barrier layer 135.
　この光電変換装置１０Ｃ（１０）においても、上記のようにバリア層１３５が設けられているので、ｎ層１３３に向けて逆流した正孔（ホール）は、バリア層１３５によってｐ層１３１に向けて反射され、短絡電流（Ｊｓｃ）を向上させることができる。
　また、バリア層１３５が設けられているので、微結晶セルのバンドギャップが増加し、開放電圧（Ｖｏｃ）を向上させることができる。
　このようにバリア層１３５をｉ層１３２とｎ層１３３との間に挿入することにより、バリア層の機能によってＶｏｃ及びＪｓｃの両方を向上させることができ、その結果、光電変換装置１０Ｃ（１０）の光電変換効率が向上する。 Also in this photoelectric conversion device 10C (10), since the barrier layer 135 is provided as described above, the holes that flow backward toward the n layer 133 are directed toward the p layer 131 by the barrier layer 135. Reflected and the short circuit current (Jsc) can be improved.
In addition, since the barrier layer 135 is provided, the band gap of the microcrystalline cell can be increased and the open-circuit voltage (Voc) can be improved.
By inserting the barrier layer 135 between the i layer 132 and the n layer 133 in this way, both Voc and Jsc can be improved by the function of the barrier layer. As a result, the photoelectric conversion device 10C (10) The photoelectric conversion efficiency is improved.
　バリア層１３５の厚さは、例えば１０～２００Åの範囲であることが好ましく、例えば、５０Åである。バリア層１３５の厚さが０～２００Åの範囲である場合に、光電変換効率が増加する効果が確認されている。
　バリア層１３５の厚さが５０Å以上においてＪｓｃは低下するが、その一方でＶｏｃ、曲線因子（ＦＦ）が増加する。これによって、トリプル構造を有する光電変換装置全体における光電変換効率は向上する。 The thickness of the barrier layer 135 is preferably in the range of 10 to 200 mm, for example, 50 mm. It has been confirmed that the photoelectric conversion efficiency is increased when the thickness of the barrier layer 135 is in the range of 0 to 200 mm.
When the thickness of the barrier layer 135 is 50 mm or more, Jsc decreases, while Voc and fill factor (FF) increase. Thereby, the photoelectric conversion efficiency in the whole photoelectric conversion device having a triple structure is improved.
　次に、以上のような構成を有する光電変換装置１０Ｃ（１０）を製造するための製造方法を説明する。第三実施形態の光電変換装置１０Ｃ（１０）の製造方法は、第四光電変換ユニット１１０を構成するｐ層１１１，ｉ層１１２，及びｎ層１１３を順に形成するステップ、第四光電変換ユニット１１０のｎ層上１１３に、第五光電変換ユニット１２０を構成するｐ層１２１，ｉ層１２２，及びｎ層１２３を順に形成するステップ、第五光電変換ユニット１２０のｎ層１２３上に、第六光電変換ユニット１３０を構成するｐ層１３１及びｉ層１３２を順に形成するステップ、第六光電変換ユニット１３０を構成するｉ層１３２上に、バリア層１３５を形成するステップ、バリア層１３５上に第六光電変換ユニット１３０を構成するｎ層１３３を形成するステップを含む。 Next, a manufacturing method for manufacturing the photoelectric conversion device 10C (10) having the above configuration will be described. The manufacturing method of the photoelectric conversion device 10C (10) of the third embodiment includes a step of sequentially forming the p layer 111, the i layer 112, and the n layer 113 constituting the fourth photoelectric conversion unit 110, and the fourth photoelectric conversion unit 110. Forming a p-layer 121, an i-layer 122, and an n-layer 123 constituting the fifth photoelectric conversion unit 120 in this order on the n-layer 113, and a sixth photoelectric conversion on the n-layer 123 of the fifth photoelectric conversion unit 120. A step of sequentially forming a p layer 131 and an i layer 132 constituting the conversion unit 130, a step of forming a barrier layer 135 on the i layer 132 constituting the sixth photoelectric conversion unit 130, and a sixth photoelectric layer on the barrier layer 135. Forming an n layer 133 constituting the conversion unit 130.
　従って、第三実施形態の光電変換装置の製造方法によって得られる光電変換装置１０においては、上述したバリア層の機能によりＶｏｃ及びＪｓｃの両方を増加させることができ、第六光電変換ユニット１３０における発電効率が向上する。
　その結果、第三実施形態の光電変換装置の製造方法によれば、光電変換効率が向上したトリプル構造を有する光電変換装置を簡便に製造できる。
　以下、トリプル構造を有する光電変換装置の製造方法について順に説明する。 Therefore, in the photoelectric conversion device 10 obtained by the method for manufacturing the photoelectric conversion device of the third embodiment, both Voc and Jsc can be increased by the function of the barrier layer described above, and the power generation in the sixth photoelectric conversion unit 130 is performed. Efficiency is improved.
As a result, according to the method for manufacturing a photoelectric conversion device of the third embodiment, a photoelectric conversion device having a triple structure with improved photoelectric conversion efficiency can be easily manufactured.
Hereinafter, a method for manufacturing a photoelectric conversion device having a triple structure will be described in order.
　まず、透明導電膜２が成膜された絶縁性透明基板１を準備する。その後、ｐ層１１１，ｉ層１１２，及びｎ層１１３が透明導電膜２上に形成される。
　ここで、ｐ層１１１，ｉ層１１２，及びｎ層１１３が形成される複数のプラズマＣＶＤ反応室は互いに異なる。また、一つのプラズマＣＶＤ反応室において、ｐ層１１１，ｉ層１１２，及びｎ層１１３の一つの層が形成され、一列に連結された複数のプラズマＣＶＤ反応室によってｐ層１１１，ｉ層１１２，及びｎ層１１３が順次に形成される。 First, an insulating transparent substrate 1 on which a transparent conductive film 2 is formed is prepared. Thereafter, the p layer 111, the i layer 112, and the n layer 113 are formed on the transparent conductive film 2.
Here, a plurality of plasma CVD reaction chambers in which the p layer 111, the i layer 112, and the n layer 113 are formed are different from each other. In addition, one layer of the p layer 111, the i layer 112, and the n layer 113 is formed in one plasma CVD reaction chamber, and the p layer 111, the i layer 112, And the n layer 113 are sequentially formed.
　ｐ層１１１は、個別の反応室内においてプラズマＣＶＤ法を用いて形成される。例えば、基板温度が１８０～２００℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が７０～１２０Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が３００ｓｃｃｍ、水素（Ｈ２）が２３００ｓｃｃｍ、希釈ガスとして水素が用いられたジボラン（Ｂ２Ｈ６／Ｈ２）が１８０ｓｃｃｍ、メタン（ＣＨ４）が５００ｓｃｃｍに設定された条件で、アモルファスシリコンカーバイド（ａ－ＳｉＣ）からなるｐ層１１１を成膜することができる。 The p layer 111 is formed using a plasma CVD method in a separate reaction chamber. For example, the substrate temperature is set to 180 to 200 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 70 to 120 Pa, monosilane (SiH 4 ) is 300 sccm, hydrogen (H 2 ) as the reaction gas flow rate. ) Is 2300 sccm, diborane (B 2 H 6 / H 2 ) using hydrogen as a diluent gas is set to 180 sccm, and methane (CH 4 ) is set to 500 sccm, and p composed of amorphous silicon carbide (a-SiC). The layer 111 can be formed.
　ｉ層１１２は、個別の反応室内においてプラズマＣＶＤ法を用いて形成される。例えば、基板温度が１８０～２００℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が７０～１２０Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１２００ｓｃｃｍに設定された条件で、アモルファスシリコンからなるｉ層１１２を成膜することができる。 The i layer 112 is formed using a plasma CVD method in a separate reaction chamber. For example, the substrate temperature is set to 180 to 200 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 70 to 120 Pa, and monosilane (SiH 4 ) is set to 1200 sccm as the reaction gas flow rate. Thus, the i layer 112 made of amorphous silicon can be formed.
　ｎ層１１３は、個別の反応室内においてプラズマＣＶＤ法を用いて形成される。例えば、基板温度が１８０～２００℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が５００～９００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１８０ｓｃｃｍ、水素（Ｈ２）が２７０００ｓｃｃｍ、希釈ガスとして水素が用いられたホスフィン（ＰＨ３／Ｈ２）が２００ｓｃｃｍに設定された条件で、微結晶シリコンからなるｎ層１１３を成膜することができる。 The n layer 113 is formed using a plasma CVD method in a separate reaction chamber. For example, the substrate temperature is set to 180 to 200 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 500 to 900 Pa, monosilane (SiH 4 ) is 180 sccm, hydrogen (H 2 ) as the reaction gas flow rate. ) Is 27000 sccm, and the phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas is set to 200 sccm, the n layer 113 made of microcrystalline silicon can be formed.
　引き続き、第四光電変換ユニット１１０のｎ層１１３上に、第五光電変換ユニット１２０を構成するｐ層１２１，ｉ層１２２，及びｎ層１２３と、第六光電変換ユニット１３０を構成するｐ層１３１とを順次積層する。
　ここで、ｐ層１２１，ｉ層１２２，ｎ層１２３，及びｐ層１３１が形成される複数のプラズマＣＶＤ反応室は互いに異なる。また、一つのプラズマＣＶＤ反応室において、ｐ層３１，ｉ層３２，ｎ層３３，及びｐ層４１の一つの層が形成され、一列に連結された複数のプラズマＣＶＤ反応室によってｐ層１２１，ｉ層１２２，ｎ層１２３，及びｐ層１３１が順次に形成される。 Subsequently, on the n layer 113 of the fourth photoelectric conversion unit 110, the p layer 121, the i layer 122, and the n layer 123 that constitute the fifth photoelectric conversion unit 120, and the p layer 131 that constitutes the sixth photoelectric conversion unit 130. Are sequentially stacked.
Here, a plurality of plasma CVD reaction chambers in which the p layer 121, the i layer 122, the n layer 123, and the p layer 131 are formed are different from each other. Further, in one plasma CVD reaction chamber, one layer of the p layer 31, the i layer 32, the n layer 33, and the p layer 41 is formed, and a plurality of plasma CVD reaction chambers connected in a row form the p layer 121, An i layer 122, an n layer 123, and a p layer 131 are sequentially formed.
　ｐ層１２１は、個別の反応室内においてプラズマＣＶＤ法を用いて形成される。例えば、基板温度が１８０～２００℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が５００～９００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１００ｓｃｃｍ、水素（Ｈ２）が２５０００ｓｃｃｍ、希釈ガスとして水素が用いられたジボラン（Ｂ２Ｈ６／Ｈ２）が５０ｓｃｃｍに設定された条件で、微結晶シリコンからなるｐ層１２１を成膜することができる。 The p layer 121 is formed using a plasma CVD method in a separate reaction chamber. For example, the substrate temperature is set to 180 to 200 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 500 to 900 Pa, monosilane (SiH 4 ) is set to 100 sccm, hydrogen (H 2 ) as the reaction gas flow rate. ) Is set to 25000 sccm, and diborane (B 2 H 6 / H 2 ) using hydrogen as a diluent gas is set to 50 sccm, the p-layer 121 made of microcrystalline silicon can be formed.
　ｉ層１２２は、個別の反応室内においてプラズマＣＶＤ法を用いて形成される。例えば、基板温度が１８０～２００℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が８０Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が７００ｓｃｃｍ、モノゲルマン（ＧｅＨ４）が５００ｓｃｃｍに設定された条件で、微結晶シリコンゲルマニウム（μｃ－ＳｉＧｅ）からなるｉ層１２２を成膜することができる。 The i layer 122 is formed using a plasma CVD method in a separate reaction chamber. For example, the substrate temperature is set to 180 to 200 ° C., the power supply frequency is set to 13.56 MHz, the pressure in the reaction chamber is set to 80 Pa, monosilane (SiH 4 ) is 700 sccm, and monogermane (GeH 4 ) as the reaction gas flow rate. The i layer 122 made of microcrystalline silicon germanium (μc-SiGe) can be formed under the condition that is set to 500 sccm.
　ｎ層１２３は、個別の反応室内においてプラズマＣＶＤ法を用いて形成される。例えば、基板温度が１８０～２００℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が５００～９００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１８０ｓｃｃｍ、水素（Ｈ２）が２７０００ｓｃｃｍ、希釈ガスとして水素が用いられたホスフィン（ＰＨ３／Ｈ２）が２００ｓｃｃｍに設定された条件で、微結晶シリコンのｎ層１２３を成膜することができる。 The n layer 123 is formed using a plasma CVD method in a separate reaction chamber. For example, the substrate temperature is set to 180 to 200 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 500 to 900 Pa, monosilane (SiH 4 ) is 180 sccm, hydrogen (H 2 ) as the reaction gas flow rate. ) Is set to 27000 sccm, and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas is set to 200 sccm, and the n-layer 123 of microcrystalline silicon can be formed.
　ｐ層１３１は、個別の反応室内においてプラズマＣＶＤ法を用いて形成される。例えば、基板温度が１８０～２００℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が５００～９００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１００ｓｃｃｍ、水素（Ｈ２）が２５０００ｓｃｃｍ、希釈ガスとして水素が用いられたジボラン（Ｂ２Ｈ６／Ｈ２）が５０ｓｃｃｍに設定された条件で、微結晶シリコンのｐ層１３１を成膜することができる。 The p layer 131 is formed using a plasma CVD method in a separate reaction chamber. For example, the substrate temperature is set to 180 to 200 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 500 to 900 Pa, monosilane (SiH 4 ) is set to 100 sccm, hydrogen (H 2 ) as the reaction gas flow rate. ) Is 25000 sccm, and diborane (B 2 H 6 / H 2 ) using hydrogen as a diluent gas is set to 50 sccm, and the p-layer 131 of microcrystalline silicon can be formed.
　次に、上記のようにｐ層１２１，ｉ層１２２，ｎ層１２３，及びｐ層１３１が形成された基板１を反応室から取り出し、ｐ層１３１を大気中に露呈させる。
　引き続き、大気中に露呈されたｐ層１３１上に、第六光電変換ユニット１３０を構成するｉ層１３２，バリア層１３５，ｎ層１３３が単数のプラズマＣＶＤ反応室内で形成される。 Next, the substrate 1 on which the p layer 121, the i layer 122, the n layer 123, and the p layer 131 are formed as described above is taken out of the reaction chamber, and the p layer 131 is exposed to the atmosphere.
Subsequently, the i layer 132, the barrier layer 135, and the n layer 133 constituting the sixth photoelectric conversion unit 130 are formed on the p layer 131 exposed in the atmosphere in a single plasma CVD reaction chamber.
　ｉ層１３２は、ｎ層１３３が形成される反応室と同じ反応室内においてプラズマＣＶＤ法を用いて形成される。例えば、基板温度が１７０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が１６００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１８００ｓｃｃｍ、水素（Ｈ２）が１８０００ｓｃｃｍに設定された条件で、微結晶シリコンからなるｉ層１３２を成膜することができる。 The i layer 132 is formed using a plasma CVD method in the same reaction chamber as that in which the n layer 133 is formed. For example, the substrate temperature is set to 170 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 1600 Pa, and the reaction gas flow rates are 1800 sccm for monosilane (SiH 4 ) and 18000 sccm for hydrogen (H 2 ). Under the set conditions, the i layer 132 made of microcrystalline silicon can be formed.
　第六光電変換ユニット１３０のｉ層１３２を、微結晶のシリコンゲルマニウム（μｃ－ＳｉＧｅ）系薄膜によって形成する場合にについて説明する。ｉ層１３２は、ｎ層１３３が形成される反応室と同じ反応室内においてプラズマＣＶＤ法を用いて形成される。例えば、基板温度が１７０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が１６００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１５００ｓｃｃｍ、モノゲルマン（ＧｅＨ４）が３００ｓｃｃｍ、水素（Ｈ２）が１８００００ｓｃｃｍに設定された条件で、微結晶シリコンゲルマニウム（μｃ－ＳｉＧｅ）からなるｉ層１３２を成膜することができる。 The case where the i layer 132 of the sixth photoelectric conversion unit 130 is formed of a microcrystalline silicon germanium (μc-SiGe) -based thin film will be described. The i layer 132 is formed using a plasma CVD method in the same reaction chamber as that in which the n layer 133 is formed. For example, the substrate temperature is set to 170 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 1600 Pa, the reaction gas flow rate is 1500 sccm for monosilane (SiH 4 ), and 300 sccm for monogermane (GeH 4 ). The i layer 132 made of microcrystalline silicon germanium (μc-SiGe) can be formed under the condition that hydrogen (H 2 ) is set to 180000 sccm.
　バリア層１３５は、ｉ層１３２が形成される反応室と同じ反応室内においてプラズマＣＶＤ法を用いて形成される。例えば、基板温度が１７０～１９０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が１２００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が４３００ｓｃｃｍに設定された条件で、アモルファスシリコンからなるバリア層１３５（ｉ型半導体層）を成膜することができる。 The barrier layer 135 is formed using a plasma CVD method in the same reaction chamber as that in which the i layer 132 is formed. For example, under the conditions where the substrate temperature is set to 170 to 190 ° C., the power supply frequency is set to 13.56 MHz, the pressure in the reaction chamber is set to 1200 Pa, and monosilane (SiH 4 ) is set to 4300 sccm as the reaction gas flow rate, A barrier layer 135 (i-type semiconductor layer) made of amorphous silicon can be formed.
　ｎ層１３３は、ｉ層１３２が形成される反応室と同じ反応室内においてプラズマＣＶＤ法を用いて形成される。例えば、基板温度が１７０～１９０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が１２００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が７２０ｓｃｃｍ、水素（Ｈ２）が１０８０００ｓｃｃｍ、希釈ガスとして水素が用いられたホスフィン（ＰＨ３／Ｈ２）が７２０ｓｃｃｍに設定された条件で、微結晶シリコンのｎ層１３３を成膜することができる。 The n layer 133 is formed by plasma CVD in the same reaction chamber as that in which the i layer 132 is formed. For example, the substrate temperature is set to 170 to 190 ° C., the power supply frequency is set to 13.56 MHz, the pressure in the reaction chamber is set to 1200 Pa, monosilane (SiH 4 ) is 720 sccm, and hydrogen (H 2 ) is used as the reaction gas flow rate. The n-layer 133 of microcrystalline silicon can be formed under the conditions of 108000 sccm and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas at 720 sccm.
　次に、この光電変換装置１０Ｃ（１０）の製造システムを図６に基づいて説明する。
　図６に示すように、第三実施形態における光電変換装置１０の製造システムは、いわゆるインライン型の第三成膜装置１６０及び第四成膜装置１７０と、ｐ層１３１を大気中に露呈させる暴露装置１９０と、いわゆるバッチ型の第五成膜装置１８０とが順に配置された構成を有する。
　インライン型の第三成膜装置１６０は、チャンバと呼ばれる複数の成膜反応室が直線状に連結して配置された構成を有する。第三成膜装置１６０においては、第四光電変換ユニット３のｐ層１１１，ｉ層１１２，及びｎ層１１３の各層が別々に形成される。複数の成膜反応室が一列に連結されているので、複数の成膜反応室の順番に応じてｐ層１１１，ｉ層１１２，及びｎ層１１３からなる３層が基板１上に積層される。
　インライン型の第四成膜装置１７０は、チャンバと呼ばれる複数の成膜反応室が直線状に連結して配置された構成を有する。第四成膜装置１７０においては、第五光電変換ユニット３のｐ層１２１，ｉ層１２２，ｎ層１２３，及び第六光電変換ユニット１３０のｐ層１３１の各層が別々に形成される。複数の成膜反応室が一列に連結されているので、複数の成膜反応室の順番に応じてｐ層１２１，ｉ層１２２，ｎ層１２３，及びｐ層１３１からなる４層が基板１上に積層される。
　暴露装置１９０は、第四成膜装置１７０において処理された基板を大気に曝し、その後、基板を第五成膜装置１８０へ移動させる。
　第五成膜装置１８０においては、第六光電変換ユニット１３０におけるｉ層１３２，バリア層１３５，及びｎ層１３３が同じ成膜反応室においてこの順番で積層される。また、このような成膜反応室には、複数の基板が一括に搬送され、複数の基板の各々にｉ層１３２，バリア層１３５，及びｎ層１３３が順に成膜反応室の中で形成される（バッチ処理）。 Next, a manufacturing system of the photoelectric conversion device 10C (10) will be described with reference to FIG.
As shown in FIG. 6, the manufacturing system of the photoelectric conversion device 10 in the third embodiment is an exposure that exposes the so-called in-line third film forming device 160 and fourth film forming device 170 and the p layer 131 to the atmosphere. An apparatus 190 and a so-called batch-type fifth film forming apparatus 180 are arranged in order.
The in-line type third film forming apparatus 160 has a configuration in which a plurality of film forming reaction chambers called chambers are linearly connected. In the third film forming apparatus 160, each of the p layer 111, the i layer 112, and the n layer 113 of the fourth photoelectric conversion unit 3 is formed separately. Since the plurality of film formation reaction chambers are connected in a row, three layers including the p layer 111, the i layer 112, and the n layer 113 are stacked on the substrate 1 in accordance with the order of the plurality of film formation reaction chambers. .
The in-line type fourth film forming apparatus 170 has a configuration in which a plurality of film forming reaction chambers called chambers are linearly connected. In the fourth film forming apparatus 170, the p layer 121, the i layer 122, the n layer 123 of the fifth photoelectric conversion unit 3, and the p layer 131 of the sixth photoelectric conversion unit 130 are formed separately. Since a plurality of film formation reaction chambers are connected in a row, four layers including a p layer 121, an i layer 122, an n layer 123, and a p layer 131 are formed on the substrate 1 in accordance with the order of the plurality of film formation reaction chambers. Is laminated.
The exposure apparatus 190 exposes the substrate processed in the fourth film forming apparatus 170 to the atmosphere, and then moves the substrate to the fifth film forming apparatus 180.
In the fifth film forming apparatus 180, the i layer 132, the barrier layer 135, and the n layer 133 in the sixth photoelectric conversion unit 130 are stacked in this order in the same film forming reaction chamber. In addition, a plurality of substrates are collectively transferred into such a deposition reaction chamber, and an i layer 132, a barrier layer 135, and an n layer 133 are sequentially formed in each of the plurality of substrates in the deposition reaction chamber. (Batch processing).
　製造システムにおける第三成膜装置１６０においては、基板が最初に搬入され、内部圧力を減圧する真空ポンプが接続されたロード室１６１（Ｌ：Ｌｏｒｄ）が配置されている。なお、ロード室１６１の後段に、成膜プロセスに応じて、基板温度を一定の温度に到達させるように基板を加熱する加熱チャンバが設けられてもよい。
　ロード室１６１には、ｐ層１１１を形成するＰ層成膜反応室１６２が接続されている。Ｐ層成膜反応室１６２には、ｉ層１１２を形成するＩ層成膜反応室１６３が接続されている。Ｉ層成膜反応室１６３には、ｎ層１１３を形成するＮ層成膜反応室１６４が接続されている。ロード室１６１とＮ層成膜反応室１６４との間には、上述した複数の反応室１６２，１６３が連続して直線状に配置されている。減圧雰囲気が維持された状態で、基板は、反応室１６２，１６３，１６４，１６５に順に搬送され、各反応室において成膜処理が行われる。
　この際、図６に示すＡ地点においては、透明導電膜２が成膜された絶縁性透明基板１が準備される。また、図６に示すＢ地点において、絶縁性透明基板１上に成膜された透明導電膜２上に、ｐ層１１１，ｉ層１１２，及びｎ層１１３が順に設けられた光電変換装置１０Ｃ（１０）の第一中間品が配置される。 In the third film forming apparatus 160 in the manufacturing system, a load chamber 161 (L: Lord) to which a substrate is first loaded and a vacuum pump for reducing the internal pressure is connected is disposed. Note that a heating chamber that heats the substrate so that the substrate temperature reaches a certain temperature may be provided in the subsequent stage of the load chamber 161 in accordance with the film forming process.
A P layer film formation reaction chamber 162 for forming the p layer 111 is connected to the load chamber 161. An I layer deposition reaction chamber 163 for forming the i layer 112 is connected to the P layer deposition reaction chamber 162. An N layer deposition reaction chamber 164 for forming the n layer 113 is connected to the I layer deposition reaction chamber 163. Between the load chamber 161 and the N layer deposition reaction chamber 164, the plurality of reaction chambers 162 and 163 described above are continuously arranged in a straight line. In a state where the reduced-pressure atmosphere is maintained, the substrate is sequentially transferred to the reaction chambers 162, 163, 164, and 165, and film formation is performed in each reaction chamber.
At this time, an insulating transparent substrate 1 on which a transparent conductive film 2 is formed is prepared at a point A shown in FIG. In addition, at a point B shown in FIG. 6, a photoelectric conversion device 10 </ b> C (a p-layer 111, an i-layer 112, and an n-layer 113 are sequentially provided on the transparent conductive film 2 formed on the insulating transparent substrate 1. The first intermediate product 10) is arranged.
　引き続き、第四成膜装置１７０においては、ｐ層１２１を形成するＰ層成膜反応室１７１がＮ層成膜反応室１６４に接続されている。Ｐ層成膜反応室１７１には、ｉ層１２２を形成するＩ層成膜反応室１７２が接続されている。Ｉ層成膜反応室１７２には、ｎ層１２３を形成するＮ層成膜反応室１７３が接続されている。Ｎ層成膜反応室１７３には、ｐ層１３１を形成するＰ層成膜反応室１７４が接続されている。Ｐ層成膜反応室１７４には、内部圧力を減圧から大気圧に戻し、基板を第四成膜装置１７０から搬出するアンロード室１７５（ＵＬ：Ｕｎｌｏｒｄ）が接続されている。Ｐ層成膜反応室１７１とアンロード室１７５との間に、上述した複数の反応室１７２，１７３，１７４，１７５が連続して直線状に配置されている。減圧雰囲気が維持された状態で、基板は、反応室１７１，１７２，１７３，１７４，１７５に順に搬送され、各反応室において成膜処理が行われる。
　この際、図６に示すＣ地点において、ｎ層１１３上に、第五光電変換ユニット１２０のｐ層１２１，ｉ層１２２，ｎ層１２３，及びｐ層１３１が順に設けられた光電変換装置１０Ｃ（１０）の第二中間品が配置される。 Subsequently, in the fourth film formation apparatus 170, the P layer film formation reaction chamber 171 for forming the p layer 121 is connected to the N layer film formation reaction chamber 164. An I-layer deposition reaction chamber 172 for forming the i layer 122 is connected to the P-layer deposition reaction chamber 171. An N layer deposition reaction chamber 173 for forming the n layer 123 is connected to the I layer deposition reaction chamber 172. A P layer deposition reaction chamber 174 for forming the p layer 131 is connected to the N layer deposition reaction chamber 173. Connected to the P layer deposition reaction chamber 174 is an unload chamber 175 (UL: United) that returns the internal pressure from reduced pressure to atmospheric pressure and carries the substrate out of the fourth film deposition apparatus 170. The plurality of reaction chambers 172, 173, 174, and 175 described above are continuously arranged in a straight line between the P layer deposition reaction chamber 171 and the unload chamber 175. In a state where the reduced-pressure atmosphere is maintained, the substrate is sequentially transferred to the reaction chambers 171, 172, 173, 174, and 175, and film formation is performed in each reaction chamber.
At this time, at the point C shown in FIG. 6, the photoelectric conversion device 10 </ b> C in which the p layer 121, the i layer 122, the n layer 123, and the p layer 131 of the fifth photoelectric conversion unit 120 are sequentially provided on the n layer 113. The second intermediate product 10) is arranged.
　また、製造システムにおける第五成膜装置１８０は、ロード・アンロード室１８１（Ｌ／ＵＬ）と、ロード・アンロード室１８１に接続されたＩＩＮ層成膜反応室１８２とを有する。
　ロード・アンロード室１８１は、第四成膜装置１７０において処理された光電変換装置の第二中間品をＩＩＮ層成膜反応室１８２に搬入する。ロード・アンロード室１８１は、基板がロード・アンロード室１８１に搬入された後に内部圧力を減圧したり、基板をロード・アンロード室１８１から搬出する際に内部圧力を減圧から大気圧に戻したりする。
　ＩＩＮ層成膜反応室１８２においては、第六光電変換ユニット１３０のｉ層１３２，バリア層１３５，及びｎ層１３３が同じ成膜反応室においてこの順番で積層される。また、このような成膜反応室には、複数の基板が一括に搬送され、複数の基板の各々にｉ層１３２，バリア層１３５，及びｎ層１３３が順に成膜反応室の中で形成される（バッチ処理）。従って、ＩＩＮ層成膜反応室１８２における成膜処理は、複数の基板に対して同時に行われる。
　図６に示すＤ地点において、第五光電変換ユニット１２０上に、第六光電変換ユニット１３０が設けられた光電変換装置１０の第三中間品が配置される。 The fifth film forming apparatus 180 in the manufacturing system includes a load / unload chamber 181 (L / UL) and an IIN layer film formation reaction chamber 182 connected to the load / unload chamber 181.
The load / unload chamber 181 carries the second intermediate product of the photoelectric conversion device processed in the fourth film formation apparatus 170 into the IIN layer film formation reaction chamber 182. The load / unload chamber 181 reduces the internal pressure after the substrate is loaded into the load / unload chamber 181 or returns the internal pressure from the reduced pressure to the atmospheric pressure when the substrate is unloaded from the load / unload chamber 181. Or
In the IIN layer deposition reaction chamber 182, the i layer 132, the barrier layer 135, and the n layer 133 of the sixth photoelectric conversion unit 130 are stacked in this order in the same deposition reaction chamber. In addition, a plurality of substrates are collectively transferred into such a deposition reaction chamber, and an i layer 132, a barrier layer 135, and an n layer 133 are sequentially formed in each of the plurality of substrates in the deposition reaction chamber. (Batch processing). Therefore, the film formation process in the IIN layer film formation reaction chamber 182 is performed simultaneously on a plurality of substrates.
At the point D shown in FIG. 6, the third intermediate product of the photoelectric conversion device 10 provided with the sixth photoelectric conversion unit 130 is disposed on the fifth photoelectric conversion unit 120.
　また、図６において、インライン型の第三成膜装置１６０及び第四成膜装置１７０においては、２つの基板に対して同時に成膜処理が行われる。Ｉ層成膜反応室１６３は、４つの反応室１６３ａ，１６３ｂ，１６３ｃ，１６３ｄによって構成されている。また、Ｉ層成膜反応室１７２は、４つの反応室１７２ａ，１７２ｂ，１７２ｃ，１７２ｄによって構成されている。
　また、図６に示すバッチ型の第五成膜装置１８０においては、６つの基板に対して同時に成膜処理が行われる。 In FIG. 6, in the in-line type third film forming apparatus 160 and the fourth film forming apparatus 170, film forming processing is simultaneously performed on two substrates. The I-layer deposition reaction chamber 163 includes four reaction chambers 163a, 163b, 163c, and 163d. The I-layer film formation reaction chamber 172 includes four reaction chambers 172a, 172b, 172c, and 172d.
In the batch-type fifth film forming apparatus 180 shown in FIG. 6, film forming processes are simultaneously performed on six substrates.
　以上のような光電変換装置の製造方法によれば、非晶質光電変換装置である第五光電変換ユニット１２０のｎ層１２３上に結晶質光電変換装置である第六光電変換ユニット１３０のｐ層１３１が予め形成され、ｐ層１３１上に第六光電変換ユニット１３０のｉ層１３２，バリア層１３５，及びｎ層１３３が形成される。このように成膜することにより、第六光電変換ユニット１３０のｉ層１３２の結晶化率分布を容易にコントロールすることができる。 According to the manufacturing method of the photoelectric conversion device as described above, the p layer of the sixth photoelectric conversion unit 130 which is a crystalline photoelectric conversion device is formed on the n layer 123 of the fifth photoelectric conversion unit 120 which is an amorphous photoelectric conversion device. 131 is formed in advance, and the i layer 132, the barrier layer 135, and the n layer 133 of the sixth photoelectric conversion unit 130 are formed on the p layer 131. By forming the film in this way, the crystallization rate distribution of the i layer 132 of the sixth photoelectric conversion unit 130 can be easily controlled.
　特に、第三実施形態においては、同じ成膜室（ＩＩＮ層成膜反応室１８２）にて、第六光電変換ユニット１３０のｉ層１３２とｎ層１３３との間に、バリア層１３５が形成されるので、良好な特性を有する光電変換装置１０Ｃ（１０）を得ることができる。 In particular, in the third embodiment, the barrier layer 135 is formed between the i layer 132 and the n layer 133 of the sixth photoelectric conversion unit 130 in the same film formation chamber (IIN layer film formation reaction chamber 182). Therefore, the photoelectric conversion device 10C (10) having favorable characteristics can be obtained.
　なお、大気中に露呈されたｐ層１３１上に、ｉ層１３２を形成する前に、大気中に露呈されたｐ層１３１に対して水素プラズマ処理を施すことが望ましい。
　大気中に露呈されたｐ層１３１に対して水素プラズマ処理を施すことで、下層にダメージを与えることがなく、第五光電変換ユニット１２０のｐ層１３１及びｉ層１３２上に形成された微結晶相が非晶質結晶相に分散したｎ層１３３が得られる。これによって、ｎ層１３３上に形成されたｐ層１３１の表面を活性させる効果が得られる。
　従って、第六光電変換ユニット１３０のｐ層１３１の表面を活性化させることが可能であり、ｐ層１３１上に積層される第六光電変換ユニット１３０のｉ層１３２の結晶を有効に生成することができる。従って、大面積の基板に第六光電変換ユニット１３０を形成する場合であっても、均一な結晶化率分布を得ることが可能となる。 In addition, before forming i layer 132 on p layer 131 exposed in the atmosphere, it is desirable to perform hydrogen plasma treatment on p layer 131 exposed in the atmosphere.
Microcrystals formed on the p layer 131 and the i layer 132 of the fifth photoelectric conversion unit 120 without damaging the lower layer by performing hydrogen plasma treatment on the p layer 131 exposed in the atmosphere. An n layer 133 in which phases are dispersed in an amorphous crystal phase is obtained. As a result, an effect of activating the surface of the p layer 131 formed on the n layer 133 is obtained.
Therefore, the surface of the p layer 131 of the sixth photoelectric conversion unit 130 can be activated, and the crystal of the i layer 132 of the sixth photoelectric conversion unit 130 stacked on the p layer 131 can be effectively generated. Can do. Therefore, even when the sixth photoelectric conversion unit 130 is formed on a large-area substrate, a uniform crystallization rate distribution can be obtained.
　上述したように得られた光電変換装置１０Ｃ（１０）においては、バリア層１３５の機能によってＶｏｃ及びＪｓｃの両方を向上させることができ、光電変換効率が向上する。その結果、第三実施形態の製造方法においては光電変換効率が向上した光電変換装置１０Ｃ（１０）を簡便に製造することが可能である。
　なお、図６に示した光電変換装置１０Ｃ（１０）の製造システムにおいては、第三成膜装置１６０によって処理された基板を大気に曝し、その後、基板を第四成膜装置１７０へ移動させる暴露装置（不図示）を必要に応じて設けてもよい。 In the photoelectric conversion device 10C (10) obtained as described above, both Voc and Jsc can be improved by the function of the barrier layer 135, and the photoelectric conversion efficiency is improved. As a result, in the manufacturing method of the third embodiment, it is possible to easily manufacture the photoelectric conversion device 10C (10) with improved photoelectric conversion efficiency.
In the manufacturing system of the photoelectric conversion device 10C (10) shown in FIG. 6, the substrate processed by the third film forming device 160 is exposed to the atmosphere, and then the substrate is moved to the fourth film forming device 170. A device (not shown) may be provided as necessary.
　次に、本発明に係る光電変換装置の製造方法より製造された光電変換装置について、以下のような実験を行なった結果を説明する。各実施例により製造された光電変換装置及びその製造条件を以下に示す。
　また、実施例１及び比較例１においては、タンデム構造を有する光電変換装置を作製した。
　また、実施例２～実施例７及び比較例２においては、シングル構造を有する光電変換装置を作製した。
　また、実施例８～実施例９及び比較例３～比較例４においては、トリプル構造を有する光電変換装置を作製した。
　また、何れの実施例及び比較例においては、大きさが１１００ｍｍ×１４００ｍｍの基板を用いて光電変換装置を製造した。 Next, the result of conducting the following experiment on the photoelectric conversion device manufactured by the method for manufacturing a photoelectric conversion device according to the present invention will be described. The photoelectric conversion device manufactured by each example and its manufacturing conditions are shown below.
In Example 1 and Comparative Example 1, a photoelectric conversion device having a tandem structure was manufactured.
In Examples 2 to 7 and Comparative Example 2, photoelectric conversion devices having a single structure were manufactured.
In Examples 8 to 9 and Comparative Examples 3 to 4, photoelectric conversion devices having a triple structure were manufactured.
Moreover, in any Example and Comparative Example, a photoelectric conversion device was manufactured using a substrate having a size of 1100 mm × 1400 mm.
＜実施例１＞
　実施例１においては、基板上に第一光電変換ユニットが形成され、第一光電変換ユニット上に第二光電変換ユニットが形成された構造を有する光電変換装置を作製した。具体的に、実施例１においては、第一光電変換ユニットを構成する非晶質のアモルファスシリコン系薄膜からなるｐ層，バッファ層，非晶質のアモルファスシリコン系薄膜からなるｉ層，ｉ層上に形成され微結晶シリコンを含むｎ層，及び第二光電変換ユニットを構成する微結晶シリコンを含むｐ層を、互いに異なる複数の成膜室を用いて基板上に順次に積層した。その後、第二光電変換ユニットのｐ層を大気中に暴露した。次に、第二光電変換ユニットのｐ層に対してプロセスガスとして水素（Ｈ２）を用いて水素プラズマ処理を施した。その後、第二光電変換ユニットを構成する微結晶シリコンからなるｉ層，非晶質のアモルファスシリコン系薄膜からなるｉ層（バリア層），及び微結晶シリコンからなるｎ層を形成した。 <Example 1>
In Example 1, a photoelectric conversion device having a structure in which a first photoelectric conversion unit was formed on a substrate and a second photoelectric conversion unit was formed on the first photoelectric conversion unit was produced. Specifically, in Example 1, a p-layer made of an amorphous amorphous silicon-based thin film constituting the first photoelectric conversion unit, a buffer layer, an i-layer made of an amorphous amorphous silicon-based thin film, and an i-layer An n layer containing microcrystalline silicon and a p layer containing microcrystalline silicon constituting the second photoelectric conversion unit were sequentially stacked on the substrate using a plurality of different deposition chambers. Thereafter, the p layer of the second photoelectric conversion unit was exposed to the atmosphere. Next, hydrogen plasma treatment was performed on the p layer of the second photoelectric conversion unit using hydrogen (H 2 ) as a process gas. Thereafter, an i layer made of microcrystalline silicon, an i layer (barrier layer) made of an amorphous amorphous silicon thin film, and an n layer made of microcrystalline silicon constituting the second photoelectric conversion unit were formed.
　実施例１においては、第一光電変換ユニットのｐ層，ｉ層，ｎ層，及び第二光電変換ユニットのｐ層は、個別の反応室内においてプラズマＣＶＤ法を用いて成膜した。第二光電変換ユニットのｉ層，ｎ層，及び第二光電変換ユニットのｉ層上に形成されたバリア層（ｉ層）は、同じ成膜室内においてプラズマＣＶＤ法を用いて成膜した。
　第一光電変換ユニットのｐ層は、基板温度が１９０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が１１０Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が３００ｓｃｃｍ、水素（Ｈ２）が２３００ｓｃｃｍ、希釈ガスとして水素が用いられたジボラン（Ｂ２Ｈ６／Ｈ２）が１８０ｓｃｃｍ、メタン（ＣＨ４）が５００ｓｃｃｍに設定された条件で、８０Åの膜厚に成膜した。
　また、バッファ層は、基板温度が１９０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が１１０Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が３００ｓｃｃｍ、水素（Ｈ２）が２３００ｓｃｃｍ、メタン（ＣＨ４）が１００ｓｃｃｍに設定された条件で、６０Åの膜厚に成膜した。 In Example 1, the p layer, i layer, n layer of the first photoelectric conversion unit, and the p layer of the second photoelectric conversion unit were formed using a plasma CVD method in individual reaction chambers. The i layer and the n layer of the second photoelectric conversion unit and the barrier layer (i layer) formed on the i layer of the second photoelectric conversion unit were formed using the plasma CVD method in the same film formation chamber.
In the p layer of the first photoelectric conversion unit, the substrate temperature is set to 190 ° C., the power supply frequency is set to 13.56 MHz, the pressure in the reaction chamber is set to 110 Pa, and monosilane (SiH 4 ) is 300 sccm as a reaction gas flow rate. The film is formed to a thickness of 80 mm under the conditions that hydrogen (H 2 ) is set to 2300 sccm, diborane (B 2 H 6 / H 2 ) using hydrogen as a diluent gas is set to 180 sccm, and methane (CH 4 ) is set to 500 sccm. did.
In the buffer layer, the substrate temperature is set to 190 ° C., the power supply frequency is set to 13.56 MHz, the pressure in the reaction chamber is set to 110 Pa, monosilane (SiH 4 ) is 300 sccm, hydrogen (H 2 ) as the reaction gas flow rate. ) Was set to 2300 sccm and methane (CH 4 ) was set to 100 sccm.
　また、第一光電変換ユニットのｉ層は、基板温度が１９０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が８０Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１２００ｓｃｃｍに設定された条件で、１８００Åの膜厚に成膜した。
　更に、第一光電変換ユニットのｎ層は、基板温度が１８０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が７００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１８０ｓｃｃｍ、水素（Ｈ２）が２７０００ｓｃｃｍ、希釈ガスとして水素が用いられたホスフィン（ＰＨ３／Ｈ２）が２００ｓｃｃｍに設定された条件で、１００Åの膜厚に成膜した。 In the i layer of the first photoelectric conversion unit, the substrate temperature is set to 190 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 80 Pa, and monosilane (SiH 4 ) is used as the reaction gas flow rate. The film was formed to a thickness of 1800 mm under the condition set to 1200 sccm.
Further, the n layer of the first photoelectric conversion unit has a substrate temperature set to 180 ° C., a power supply frequency set to 13.56 MHz, a reaction chamber pressure set to 700 Pa, and monosilane (SiH 4 ) as a reaction gas flow rate. The film was formed to a thickness of 100 で under the conditions of 180 sccm, hydrogen (H 2 ) of 27000 sccm, and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas at 200 sccm.
　次に、第二光電変換ユニットのｐ層は、基板温度が１８０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が７００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１００ｓｃｃｍ、水素（Ｈ２）が２５０００ｓｃｃｍ、希釈ガスとして水素が用いられたジボラン（Ｂ２Ｈ６／Ｈ２）が５０ｓｃｃｍに設定された条件で、１５０Åの膜厚に成膜した。
　また、ここで第二光電変換ユニットのｐ層を大気中に露呈させた。このｐ層に対して、基板温度が１９０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が７００Ｐａ、プロセスガスとしてＨ２が１０００ｓｃｃｍに設定された条件で、プラズマ処理を施した。即ち、プラズマ状態のＨ２ガスをｐ層に曝した。 Next, in the p layer of the second photoelectric conversion unit, the substrate temperature is set to 180 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 700 Pa, and monosilane (SiH 4 ) is set as the reaction gas flow rate. The film was formed to a thickness of 150 mm under the conditions of 100 sccm, hydrogen (H 2 ) 25000 sccm, and diborane (B 2 H 6 / H 2 ) using hydrogen as a diluent gas at 50 sccm.
Moreover, the p layer of the second photoelectric conversion unit was exposed to the atmosphere here. For this p layer, plasma treatment was performed under the conditions that the substrate temperature was set to 190 ° C., the power supply frequency was set to 13.56 MHz, the pressure in the reaction chamber was set to 700 Pa, and H 2 was set to 1000 sccm as the process gas. did. That is, H 2 gas in a plasma state was exposed to the p layer.
　引き続き、第二光電変換ユニットのｉ層は、基板温度が１７０℃に設定され、印加ＲＦ電力が５５０Ｗに設定され、反応室内圧力が１２００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が４０ｓｃｃｍ、水素（Ｈ２）が２８００ｓｃｃｍに設定された条件で、１５０００Åの膜厚に成膜した。このときの成膜速度は２６２Å／分であった。
　また、第二光電変換ユニットのバリア層は、基板温度が１７０℃に設定され、印加ＲＦ電力が４０Ｗに設定され、反応室内圧力が４０Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が３００ｓｃｃｍに設定された条件で、５０Åの膜厚に成膜した。このときの成膜速度は１４１Å／分であった。
　そして、第二光電変換ユニットのｎ層は、基板温度が１７０℃に設定され、印加ＲＦ電力が１０００Ｗに設定され、反応室内圧力が８００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が２０ｓｃｃｍ、水素（Ｈ２）が２０００ｓｃｃｍ、希釈ガスとして水素が用いられたホスフィン（ＰＨ３／Ｈ２）が１５ｓｃｃｍに設定された条件で、３００Åの膜厚に成膜した。このときの成膜速度は１７４Å／分であった。 Subsequently, in the i layer of the second photoelectric conversion unit, the substrate temperature is set to 170 ° C., the applied RF power is set to 550 W, the pressure in the reaction chamber is set to 1200 Pa, and monosilane (SiH 4 ) is 40 sccm as the reaction gas flow rate. Under the conditions where hydrogen (H 2 ) was set to 2800 sccm, a film having a thickness of 15000 mm was formed. At this time, the film formation rate was 262 Km / min.
In the barrier layer of the second photoelectric conversion unit, the substrate temperature is set to 170 ° C., the applied RF power is set to 40 W, the reaction chamber pressure is set to 40 Pa, and monosilane (SiH 4 ) is 300 sccm as the reaction gas flow rate. The film was formed to a film thickness of 50 mm under the conditions set as above. The film formation rate at this time was 141 Å / min.
In the n layer of the second photoelectric conversion unit, the substrate temperature is set to 170 ° C., the applied RF power is set to 1000 W, the reaction chamber pressure is set to 800 Pa, and monosilane (SiH 4 ) is 20 sccm as the reaction gas flow rate. A film having a thickness of 300 mm was formed under the conditions where hydrogen (H 2 ) was set to 2000 sccm and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas was set to 15 sccm. At this time, the film formation rate was 174 Å / min.
＜比較例１＞
　比較例１においては、第二光電変換ユニットのｉ層とｎ層との間にバリア層を形成しておらず、実施例１と同様にしてタンデム構造を有する光電変換装置を作製した。具体的に、第一光電変換ユニットを構成するｐ層，バッファ層，ｉ層，ｉ層上に形成されるｎ層，及び第二光電変換ユニットを構成するｐ層を、互いに異なる複数の成膜室を用いて基板上に順次に積層した。その後、第二光電変換ユニットのｐ層を大気中に暴露した。次に、第二光電変換ユニットのｐ層に対して水素プラズマ処理を施した。その後、第二光電変換ユニットを構成するｉ層，ｎ層を形成した。 <Comparative Example 1>
In Comparative Example 1, a barrier layer was not formed between the i layer and the n layer of the second photoelectric conversion unit, and a photoelectric conversion device having a tandem structure was produced in the same manner as in Example 1. Specifically, the p layer, the buffer layer, the i layer, the n layer formed on the i layer, and the p layer constituting the second photoelectric conversion unit constituting the first photoelectric conversion unit are formed into a plurality of different films. The layers were sequentially stacked on the substrate using a chamber. Thereafter, the p layer of the second photoelectric conversion unit was exposed to the atmosphere. Next, hydrogen plasma treatment was performed on the p layer of the second photoelectric conversion unit. Then, i layer and n layer which comprise a 2nd photoelectric conversion unit were formed.
＜実施例２＞
　実施例２においては、基板上に第三光電変換ユニットを構成する微結晶シリコンを含むｐ層，微結晶シリコンからなるｉ層，非晶質のアモルファスシリコン系薄膜からなるｉ層（バリア層），及び微結晶シリコンからなるｎ層が形成された構造を有する光電変換装置を作製した。
　実施例２においては、第三光電変換ユニットのｐ層，ｉ層，バリア層，及びｎ層は、同じ成膜室内においてプラズマＣＶＤ法を用いて成膜した。 <Example 2>
In Example 2, the p layer containing microcrystalline silicon constituting the third photoelectric conversion unit on the substrate, the i layer made of microcrystalline silicon, the i layer made of an amorphous silicon thin film (barrier layer), A photoelectric conversion device having a structure in which an n layer made of microcrystalline silicon was formed was manufactured.
In Example 2, the p layer, i layer, barrier layer, and n layer of the third photoelectric conversion unit were formed using the plasma CVD method in the same film formation chamber.
　第三光電変換ユニットのｐ層は、基板温度が１８０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が７００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１００ｓｃｃｍ、水素（Ｈ２）が２５０００ｓｃｃｍ、希釈ガスとして水素が用いられたジボラン（Ｂ２Ｈ６／Ｈ２）が５０ｓｃｃｍに設定された条件で、１５０Åの膜厚に成膜した。
　引き続き、第三光電変換ユニットのｉ層は、基板温度が１７０℃に設定され、印加ＲＦ電力が５５０Ｗに設定され、反応室内圧力が１２００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が４０ｓｃｃｍ、水素（Ｈ２）が２８００ｓｃｃｍに設定された条件で、１５０００Åの膜厚に成膜した。このときの成膜速度は２６２Å／分であった。 The p layer of the third photoelectric conversion unit has a substrate temperature set to 180 ° C., a power supply frequency set to 13.56 MHz, a reaction chamber pressure set to 700 Pa, and monosilane (SiH 4 ) as a reaction gas flow rate of 100 sccm, The film was formed to a thickness of 150 mm under the conditions that hydrogen (H 2 ) was set to 25000 sccm and diborane (B 2 H 6 / H 2 ) using hydrogen as a diluent gas was set to 50 sccm.
Subsequently, in the i layer of the third photoelectric conversion unit, the substrate temperature is set to 170 ° C., the applied RF power is set to 550 W, the reaction chamber pressure is set to 1200 Pa, and monosilane (SiH 4 ) is 40 sccm as the reaction gas flow rate. Under the conditions where hydrogen (H 2 ) was set to 2800 sccm, a film having a thickness of 15000 mm was formed. At this time, the film formation rate was 262 Km / min.
　また、第三光電変換ユニットのバリア層は、基板温度が１７０℃に設定され、印加ＲＦ電力が４０Ｗに設定され、反応室内圧力が４０Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が３００ｓｃｃｍに設定された条件で、１０Åの膜厚に成膜した。このときの成膜速度は１４１Å／分であった。
　そして、第三光電変換ユニットのｎ層は、基板温度が１７０℃に設定され、印加ＲＦ電力が１０００Ｗに設定され、反応室内圧力が８００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が２０ｓｃｃｍ、水素（Ｈ２）が２０００ｓｃｃｍ、希釈ガスとして水素が用いられたホスフィン（ＰＨ３／Ｈ２）が１５ｓｃｃｍに設定された条件で、３００Åの膜厚に成膜した。このときの成膜速度は１７４Å／分であった。 In the barrier layer of the third photoelectric conversion unit, the substrate temperature is set to 170 ° C., the applied RF power is set to 40 W, the reaction chamber pressure is set to 40 Pa, and monosilane (SiH 4 ) is 300 sccm as the reaction gas flow rate. The film was formed to a thickness of 10 mm under the conditions set as above. The film formation rate at this time was 141 Å / min.
In the n layer of the third photoelectric conversion unit, the substrate temperature is set to 170 ° C., the applied RF power is set to 1000 W, the reaction chamber pressure is set to 800 Pa, and monosilane (SiH 4 ) is 20 sccm as the reaction gas flow rate. A film having a thickness of 300 mm was formed under the conditions where hydrogen (H 2 ) was set to 2000 sccm and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas was set to 15 sccm. At this time, the film formation rate was 174 Å / min.
＜実施例３～実施例７＞
　実施例３～実施例７における光電変換装置は、バリア層の厚さを除いて、実施例２の構造と同じであるシングル構造を有し、微結晶型光電変換装置である。また、実施例３におけるバリア層の厚さは、２０Åである。実施例４におけるバリア層の厚さは、５０Åである。実施例５におけるバリア層の厚さは、１００Åである。実施例６におけるバリア層の厚さは、１５０Åである。実施例７におけるバリア層の厚さは、２００Åである。 <Example 3 to Example 7>
The photoelectric conversion devices in Examples 3 to 7 are microcrystalline photoelectric conversion devices having a single structure that is the same as the structure of Example 2 except for the thickness of the barrier layer. Moreover, the thickness of the barrier layer in Example 3 is 20 mm. The thickness of the barrier layer in Example 4 is 50 mm. The thickness of the barrier layer in Example 5 is 100 mm. The thickness of the barrier layer in Example 6 is 150 mm. The thickness of the barrier layer in Example 7 is 200 mm.
＜比較例２＞
　比較例２においては、第三光電変換ユニットのｉ層とｎ層との間にバリア層を形成しておらず、実施例２と同様にしてシングル構造を有する微結晶型の光電変換装置を作製した。即ち、基板上に微結晶シリコンを含むｐ層を形成し、その後、微結晶シリコンからなるｉ層、及び微結晶シリコンからなるｎ層を順次に形成することによって比較例２の光電変換装置が形成されている。 <Comparative Example 2>
In Comparative Example 2, a barrier layer was not formed between the i layer and the n layer of the third photoelectric conversion unit, and a microcrystalline photoelectric conversion device having a single structure was produced in the same manner as in Example 2. did. That is, a p-layer containing microcrystalline silicon is formed on a substrate, and then an i layer made of microcrystalline silicon and an n layer made of microcrystalline silicon are sequentially formed to form the photoelectric conversion device of Comparative Example 2. Has been.
＜実施例８＞
　実施例８においては、基板上に第四光電変換ユニットが形成され、第四光電変換ユニット上に、第五光電変換ユニットが形成され、第五光電変換ユニット上に第六光電変換ユニットが形成された構造を有する光電変換装置を作製した。具体的に、実施例８においては、第四光電変換ユニットを構成する非晶質のアモルファスシリコンカーバイド（ａ－ＳｉＣ）系薄膜からなるｐ層，バッファ層，非晶質のアモルファスシリコン系薄膜からなるｉ層，ｉ層上に形成され微結晶シリコンを含むｎ層を、互いに異なる複数の成膜室を用いて基板上に順次に積層した。その後、第四光電変換ユニットのｎ層を大気中に暴露した。次に、第四光電変換ユニットのｎ層に対してプロセスガスとして水素（Ｈ２）を用いて水素プラズマ処理を施した。その後、第五光電変換ユニットを構成するアモルファスシリコンゲルマニウム（ａ－ＳｉＧｅ）薄膜からなるｉ層，ｉ層上に形成され微結晶シリコンを含むｎ層，及び第六光電変換ユニットを構成する微結晶シリコンを含むｐ層を、互いに異なる複数の成膜室を用いて基板上に順次に積層した。その後、第六光電変換ユニットのｐ層を大気中に暴露した。次に、第六光電変換ユニットのｐ層に対してプロセスガスとして水素（Ｈ２）を用いて水素プラズマ処理を施した。その後、第六光電変換ユニットを構成する微結晶シリコン系薄膜からなるｉ層、非晶質のアモルファスシリコン系薄膜からなるｉ層（バリア層）、微結晶シリコンからなるｎ層を形成した。 <Example 8>
In Example 8, the fourth photoelectric conversion unit is formed on the substrate, the fifth photoelectric conversion unit is formed on the fourth photoelectric conversion unit, and the sixth photoelectric conversion unit is formed on the fifth photoelectric conversion unit. A photoelectric conversion device having the above structure was manufactured. Specifically, in Example 8, the fourth photoelectric conversion unit is composed of an amorphous amorphous silicon carbide (a-SiC) thin film, a p layer, a buffer layer, and an amorphous amorphous silicon thin film. An i layer and an n layer containing microcrystalline silicon formed on the i layer were sequentially stacked on the substrate using a plurality of different deposition chambers. Thereafter, the n layer of the fourth photoelectric conversion unit was exposed to the atmosphere. Next, hydrogen plasma treatment was performed on the n layer of the fourth photoelectric conversion unit using hydrogen (H 2 ) as a process gas. Thereafter, an i layer composed of an amorphous silicon germanium (a-SiGe) thin film constituting the fifth photoelectric conversion unit, an n layer formed on the i layer and containing microcrystalline silicon, and a microcrystalline silicon constituting the sixth photoelectric conversion unit The p layer containing was sequentially laminated on the substrate using a plurality of different film formation chambers. Thereafter, the p layer of the sixth photoelectric conversion unit was exposed to the atmosphere. Next, hydrogen plasma treatment was performed on the p layer of the sixth photoelectric conversion unit using hydrogen (H 2 ) as a process gas. Thereafter, an i layer composed of a microcrystalline silicon thin film, an i layer (barrier layer) composed of an amorphous amorphous silicon thin film, and an n layer composed of microcrystalline silicon constituting the sixth photoelectric conversion unit were formed.
　実施例８において、第四光電変換ユニットのｐ層，ｉ層，ｎ層，第五光電変換ユニットのｐ層，ｉ層，ｎ層，及び第六光電変換ユニットのｐ層は、互いに異なる複数の成膜室においてプラズマＣＶＤ法を用いて基板上に順次に積層した。第六光電変換ユニットのｉ層，非晶質のアモルファスシリコン系薄膜からなるｉ層（バリア層），及びｎ層は、同じ成膜室内においてプラズマＣＶＤ法を用いて成膜した。 In Example 8, the p layer, i layer, n layer of the fourth photoelectric conversion unit, the p layer, i layer, n layer of the fifth photoelectric conversion unit, and the p layer of the sixth photoelectric conversion unit are different from each other. The layers were sequentially stacked on the substrate using a plasma CVD method in a film formation chamber. The i layer of the sixth photoelectric conversion unit, the i layer (barrier layer) made of an amorphous amorphous silicon thin film, and the n layer were formed by plasma CVD in the same film formation chamber.
　第四光電変換ユニットのｐ層は、基板温度が１９０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が１１０Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が３００ｓｃｃｍ、水素（Ｈ２）が２３００ｓｃｃｍ、希釈ガスとして水素が用いられたジボラン（Ｂ２Ｈ６／Ｈ２）が１８０ｓｃｃｍ、メタン（ＣＨ４）が５００ｓｃｃｍに設定された条件で、８０Åの膜厚に成膜した。
　また、バッファ層は、基板温度が１９０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が１１０Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が３００ｓｃｃｍ、水素（Ｈ２）が２３００ｓｃｃｍ、メタン（ＣＨ４）が１００ｓｃｃｍに設定された条件で、６０Åの膜厚に成膜した。 In the p layer of the fourth photoelectric conversion unit, the substrate temperature is set to 190 ° C., the power supply frequency is set to 13.56 MHz, the pressure in the reaction chamber is set to 110 Pa, monosilane (SiH 4 ) is 300 sccm as a reaction gas flow rate, The film is formed to a thickness of 80 mm under the conditions that hydrogen (H 2 ) is set to 2300 sccm, diborane (B 2 H 6 / H 2 ) using hydrogen as a diluent gas is set to 180 sccm, and methane (CH 4 ) is set to 500 sccm. did.
In the buffer layer, the substrate temperature is set to 190 ° C., the power supply frequency is set to 13.56 MHz, the pressure in the reaction chamber is set to 110 Pa, monosilane (SiH 4 ) is 300 sccm, hydrogen (H 2 ) as the reaction gas flow rate. ) Was set to 2300 sccm and methane (CH 4 ) was set to 100 sccm.
　また、第四光電変換ユニットのｉ層は、基板温度が１９０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が８０Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１２００ｓｃｃｍに設定された条件で、１０００Åの膜厚に成膜した。 In the i layer of the fourth photoelectric conversion unit, the substrate temperature is set to 190 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 80 Pa, and monosilane (SiH 4 ) is used as the reaction gas flow rate. The film was formed to a thickness of 1000 mm under the condition set to 1200 sccm.
　更に、第四光電変換ユニットのｎ層は、基板温度が１８０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が７００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１８０ｓｃｃｍ、水素（Ｈ２）が２７０００ｓｃｃｍ、希釈ガスとして水素が用いられたホスフィン（ＰＨ３／Ｈ２）が２００ｓｃｃｍに設定された条件で、３００Åの膜厚に成膜した。
　また、ここで第四光電変換ユニットのｎ層を大気中に露呈させた。
　このｎ層に対して、基板温度が１９０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が７００Ｐａ、プロセスガスとしてＨ２が１０００ｓｃｃｍに設定された条件で、プラズマ処理を施した。 Further, in the n layer of the fourth photoelectric conversion unit, the substrate temperature is set to 180 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 700 Pa, and monosilane (SiH 4 ) is used as the reaction gas flow rate. A film having a thickness of 300 mm was formed under the conditions of 180 sccm, hydrogen (H 2 ) of 27000 sccm, and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas at 200 sccm.
In addition, the n layer of the fourth photoelectric conversion unit was exposed to the atmosphere here.
For this n layer, plasma treatment was performed under the conditions that the substrate temperature was set to 190 ° C., the power supply frequency was set to 13.56 MHz, the pressure in the reaction chamber was set to 700 Pa, and H 2 was set to 1000 sccm as the process gas. did.
　引き続き、第五光電変換ユニットのｐ層は、基板温度が１８０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が７００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１００ｓｃｃｍ、水素（Ｈ２）が２５０００ｓｃｃｍ、希釈ガスとして水素が用いられたジボラン（Ｂ２Ｈ６／Ｈ２）が５０ｓｃｃｍに設定された条件で、２００Åの膜厚に成膜した。 Subsequently, in the p layer of the fifth photoelectric conversion unit, the substrate temperature is set to 180 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 700 Pa, and monosilane (SiH 4 ) is used as the reaction gas flow rate. 100 sccm, hydrogen (H 2) is 25000Sccm, under conditions diborane hydrogen is used as the diluent gas (B 2 H 6 / H 2 ) was set to 50 sccm, and formed into a film having a thickness of 200 Å.
　また、第五光電変換ユニットのｉ層は、基板温度が１９０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が８０Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が７００ｓｃｃｍ、モノゲルマン（ＧｅＨ４）が５００ｓｃｃｍに設定された条件で、１２００Åの膜厚に成膜した。 In the i layer of the fifth photoelectric conversion unit, the substrate temperature is set to 190 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 80 Pa, and monosilane (SiH 4 ) is used as the reaction gas flow rate. The film was formed to a thickness of 1200 mm under the conditions that 700 sccm and monogermane (GeH 4 ) were set to 500 sccm.
　更に、第五光電変換ユニットのｎ層は、基板温度が１８０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が７００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１８０ｓｃｃｍ、水素（Ｈ２）が２７０００ｓｃｃｍ、希釈ガスとして水素が用いられたホスフィン（ＰＨ３／Ｈ２）が２００ｓｃｃｍに設定された条件で、３００Åの膜厚に成膜した。 Further, in the n layer of the fifth photoelectric conversion unit, the substrate temperature is set to 180 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 700 Pa, and monosilane (SiH 4 ) is used as the reaction gas flow rate. A film having a thickness of 300 mm was formed under the conditions of 180 sccm, hydrogen (H 2 ) of 27000 sccm, and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas at 200 sccm.
　次に、第六光電変換ユニットのｐ層は、基板温度が１８０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が７００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１００ｓｃｃｍ、水素（Ｈ２）が２５０００ｓｃｃｍ、希釈ガスとして水素が用いられたジボラン（Ｂ２Ｈ６／Ｈ２）が５０ｓｃｃｍに設定された条件で、２００Åの膜厚に成膜した。
　また、ここで第六光電変換ユニットのｐ層を大気中に露呈させた。
　このｐ層に対して、基板温度が１９０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が１２００Ｐａ、プロセスガスとしてＨ２が４０００ｓｃｃｍに設定された条件で、プラズマ処理を施した。 Next, in the p layer of the sixth photoelectric conversion unit, the substrate temperature is set to 180 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 700 Pa, and the reaction gas flow rate is monosilane (SiH 4 ). There 100 sccm, hydrogen (H 2) is 25000Sccm, under conditions diborane hydrogen is used as the diluent gas (B 2 H 6 / H 2 ) was set to 50 sccm, and formed into a film having a thickness of 200 Å.
Moreover, the p layer of the sixth photoelectric conversion unit was exposed to the atmosphere here.
For this p layer, is set to substrate temperature of 190 ° C., is set power frequency 13.56 MHz, the reaction chamber pressure is 1200 Pa, H 2 as a process gas in the conditions set in the 4000 sccm, facilities plasma treatment did.
　引き続き、第六光電変換ユニットのｉ層は、基板温度が１７０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が１６００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１８００ｓｃｃｍ、水素（Ｈ２）が１８００００ｓｃｃｍに設定された条件で、１５０００Åの膜厚に成膜した。 Subsequently, in the i layer of the sixth photoelectric conversion unit, the substrate temperature is set to 170 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 1600 Pa, and monosilane (SiH 4 ) is used as the reaction gas flow rate. The film was formed to a thickness of 15000 mm under the conditions of 1800 sccm and hydrogen (H 2 ) of 180000 sccm.
　また、第六光電変換ユニットのバリア層は、基板温度が１７０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が１２００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が４３００ｓｃｃｍに設定された条件で、１００Åの膜厚に成膜した。 The barrier layer of the sixth photoelectric conversion unit has a substrate temperature set at 170 ° C., a power supply frequency set at 13.56 MHz, a reaction chamber pressure set at 1200 Pa, and monosilane (SiH 4 ) as a reaction gas flow rate. The film was formed to a thickness of 100 mm under the condition set to 4300 sccm.
　そして、第六光電変換ユニットのｎ層は、基板温度が１７０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が１２００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が７２０ｓｃｃｍ、水素（Ｈ２）が１０８０００ｓｃｃｍ、希釈ガスとして水素が用いられたホスフィン（ＰＨ３／Ｈ２）が７２０ｓｃｃｍに設定された条件で、３００Åの膜厚に成膜した。 In the n layer of the sixth photoelectric conversion unit, the substrate temperature is set to 170 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 1200 Pa, and monosilane (SiH 4 ) is used as the reaction gas flow rate. A film was formed to a thickness of 300 mm under the conditions of 720 sccm, hydrogen (H 2 ) of 108000 sccm, and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas at 720 sccm.
＜比較例３＞
　比較例３においては、第六光電変換ユニットのｉ層とｎ層との間にバリア層を形成しておらず、実施例８と同様にしてトリプル構造を有する光電変換装置を作製した。具体的に、第四光電変換ユニットを構成するｐ層，バッファ層，ｉ層，及びｉ層上に形成されるｎ層を、互いに異なる複数の成膜室を用いて基板上に順次に積層した。その後、第四光電変換ユニットのｎ層を大気中に暴露した。次に、第四光電変換ユニットのｎ層に対して水素プラズマ処理を施した。続いて、第五光電変換ユニットを構成するｐ層，ｉ層，ｎ層，及び第六光電変換ユニットを構成するｐ層を、互いに異なる複数の成膜室を用いて基板上に順次に積層した。その後、第六光電変換ユニットのｐ層を大気中に暴露した。次に、第六光電変換ユニットのｐ層に対して水素プラズマ処理を施した。その後、第六光電変換ユニットを構成するｉ層，ｎ層を形成した。 <Comparative Example 3>
In Comparative Example 3, a barrier layer was not formed between the i layer and the n layer of the sixth photoelectric conversion unit, and a photoelectric conversion device having a triple structure was produced in the same manner as in Example 8. Specifically, a p layer, a buffer layer, an i layer, and an n layer formed on the i layer constituting the fourth photoelectric conversion unit are sequentially stacked on the substrate using a plurality of different film forming chambers. . Thereafter, the n layer of the fourth photoelectric conversion unit was exposed to the atmosphere. Next, hydrogen plasma treatment was performed on the n layer of the fourth photoelectric conversion unit. Subsequently, the p-layer, i-layer, and n-layer constituting the fifth photoelectric conversion unit, and the p-layer constituting the sixth photoelectric conversion unit were sequentially stacked on the substrate using a plurality of different film formation chambers. . Thereafter, the p layer of the sixth photoelectric conversion unit was exposed to the atmosphere. Next, hydrogen plasma treatment was performed on the p layer of the sixth photoelectric conversion unit. Then, i layer and n layer which comprise a 6th photoelectric conversion unit were formed.
＜実施例９＞
　実施例９においては、基板上に第四光電変換ユニットが形成され、第四光電変換ユニット上に、第五光電変換ユニットが形成され、第五光電変換ユニット上に第六光電変換ユニットが形成された構造を有する光電変換装置を作製した。具体的に、実施例９においては、第四光電変換ユニットを構成する非晶質のアモルファスシリコンカーバイド（ａ－ＳｉＣ）系薄膜からなるｐ層，バッファ層，非晶質のアモルファスシリコン系薄膜からなるｉ層，ｉ層上に形成され微結晶シリコンを含むｎ層を、互いに異なる複数の成膜室を用いて基板上に順次に積層した。その後、第四光電変換ユニットのｎ層を大気中に暴露した。次に、第四光電変換ユニットのｎ層に対してプロセスガスとして水素（Ｈ２）を用いて水素プラズマ処理を施した。その後、第五光電変換ユニットを構成するアモルファスシリコンゲルマニウム（ａ－ＳｉＧｅ）薄膜からなるｉ層，ｉ層上に形成され微結晶シリコンを含むｎ層，及び第六光電変換ユニットを構成する微結晶シリコンを含むｐ層を、互いに異なる複数の成膜室を用いて基板上に順次に積層した。その後、第六光電変換ユニットのｐ層を大気中に暴露した。次に、第六光電変換ユニットのｐ層に対してプロセスガスとして水素（Ｈ２）を用いて水素プラズマ処理を施した。その後、第六光電変換ユニットを構成する微結晶シリコンゲルマニウム（ａ－ＳｉＧｅ）系薄膜からなるｉ層、非晶質のアモルファスシリコン系薄膜からなるｉ層（バリア層）、微結晶シリコンからなるｎ層を形成した。 <Example 9>
In Example 9, the fourth photoelectric conversion unit is formed on the substrate, the fifth photoelectric conversion unit is formed on the fourth photoelectric conversion unit, and the sixth photoelectric conversion unit is formed on the fifth photoelectric conversion unit. A photoelectric conversion device having the above structure was manufactured. Specifically, in Example 9, the fourth photoelectric conversion unit is composed of an amorphous amorphous silicon carbide (a-SiC) thin film, a p layer, a buffer layer, and an amorphous amorphous silicon thin film. An i layer and an n layer containing microcrystalline silicon formed on the i layer were sequentially stacked on the substrate using a plurality of different deposition chambers. Thereafter, the n layer of the fourth photoelectric conversion unit was exposed to the atmosphere. Next, hydrogen plasma treatment was performed on the n layer of the fourth photoelectric conversion unit using hydrogen (H 2 ) as a process gas. Thereafter, an i layer composed of an amorphous silicon germanium (a-SiGe) thin film constituting the fifth photoelectric conversion unit, an n layer formed on the i layer and containing microcrystalline silicon, and a microcrystalline silicon constituting the sixth photoelectric conversion unit The p layer containing was sequentially laminated on the substrate using a plurality of different film formation chambers. Thereafter, the p layer of the sixth photoelectric conversion unit was exposed to the atmosphere. Next, hydrogen plasma treatment was performed on the p layer of the sixth photoelectric conversion unit using hydrogen (H 2 ) as a process gas. Thereafter, an i layer composed of a microcrystalline silicon germanium (a-SiGe) thin film, an i layer (barrier layer) composed of an amorphous amorphous silicon thin film, and an n layer composed of microcrystalline silicon constituting the sixth photoelectric conversion unit. Formed.
　実施例９において、第四光電変換ユニットのｐ層，ｉ層，ｎ層，第五光電変換ユニットのｐ層，ｉ層，ｎ層，及び第六光電変換ユニットのｐ層は、互いに異なる複数の成膜室においてプラズマＣＶＤ法を用いて基板上に順次に積層した。第六光電変換ユニットのｉ層，非晶質のアモルファスシリコン系薄膜からなるｉ層（バリア層），及びｎ層は、同じ成膜室内においてプラズマＣＶＤ法を用いて成膜した。 In Example 9, the p layer, i layer, n layer of the fourth photoelectric conversion unit, the p layer, i layer, n layer of the fifth photoelectric conversion unit, and the p layer of the sixth photoelectric conversion unit are different from each other. The layers were sequentially stacked on the substrate using a plasma CVD method in a film formation chamber. The i layer of the sixth photoelectric conversion unit, the i layer (barrier layer) made of an amorphous amorphous silicon thin film, and the n layer were formed by plasma CVD in the same film formation chamber.
　第四光電変換ユニットのｐ層は、基板温度が１９０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が１１０Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が３００ｓｃｃｍ、水素（Ｈ２）が２３００ｓｃｃｍ、希釈ガスとして水素が用いられたジボラン（Ｂ２Ｈ６／Ｈ２）が１８０ｓｃｃｍ、メタン（ＣＨ４）が５００ｓｃｃｍに設定された条件で、８０Åの膜厚に成膜した。
　また、バッファ層は、基板温度が１９０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が１１０Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が３００ｓｃｃｍ、水素（Ｈ２）が２３００ｓｃｃｍ、メタン（ＣＨ４）が１００ｓｃｃｍに設定された条件で、６０Åの膜厚に成膜した。 In the p layer of the fourth photoelectric conversion unit, the substrate temperature is set to 190 ° C., the power supply frequency is set to 13.56 MHz, the pressure in the reaction chamber is set to 110 Pa, monosilane (SiH 4 ) is 300 sccm as a reaction gas flow rate, The film is formed to a thickness of 80 mm under the conditions that hydrogen (H 2 ) is set to 2300 sccm, diborane (B 2 H 6 / H 2 ) using hydrogen as a diluent gas is set to 180 sccm, and methane (CH 4 ) is set to 500 sccm. did.
In the buffer layer, the substrate temperature is set to 190 ° C., the power supply frequency is set to 13.56 MHz, the pressure in the reaction chamber is set to 110 Pa, monosilane (SiH 4 ) is 300 sccm, hydrogen (H 2 ) as the reaction gas flow rate. ) Was set to 2300 sccm and methane (CH 4 ) was set to 100 sccm.
　また、第四光電変換ユニットのｉ層は、基板温度が１９０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が８０Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１２００ｓｃｃｍに設定された条件で、１０００Åの膜厚に成膜した。 In the i layer of the fourth photoelectric conversion unit, the substrate temperature is set to 190 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 80 Pa, and monosilane (SiH 4 ) is used as the reaction gas flow rate. The film was formed to a thickness of 1000 mm under the condition set to 1200 sccm.
　更に、第四光電変換ユニットのｎ層は、基板温度が１８０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が７００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１８０ｓｃｃｍ、水素（Ｈ２）が２７０００ｓｃｃｍ、希釈ガスとして水素が用いられたホスフィン（ＰＨ３／Ｈ２）が２００ｓｃｃｍに設定された条件で、３００Åの膜厚に成膜した。
　また、ここで第四光電変換ユニットのｎ層を大気中に露呈させた。
　このｎ層に対して、基板温度が１９０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が７００Ｐａ、プロセスガスとしてＨ２が１０００ｓｃｃｍに設定された条件で、プラズマ処理を施した。 Further, in the n layer of the fourth photoelectric conversion unit, the substrate temperature is set to 180 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 700 Pa, and monosilane (SiH 4 ) is used as the reaction gas flow rate. A film having a thickness of 300 mm was formed under the conditions of 180 sccm, hydrogen (H 2 ) of 27000 sccm, and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas at 200 sccm.
In addition, the n layer of the fourth photoelectric conversion unit was exposed to the atmosphere here.
For this n layer, plasma treatment was performed under the conditions that the substrate temperature was set to 190 ° C., the power supply frequency was set to 13.56 MHz, the pressure in the reaction chamber was set to 700 Pa, and H 2 was set to 1000 sccm as the process gas. did.
　引き続き、第五光電変換ユニットのｐ層は、基板温度が１８０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が７００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１００ｓｃｃｍ、水素（Ｈ２）が２５０００ｓｃｃｍ、希釈ガスとして水素が用いられたジボラン（Ｂ２Ｈ６／Ｈ２）が５０ｓｃｃｍに設定された条件で、２００Åの膜厚に成膜した。 Subsequently, in the p layer of the fifth photoelectric conversion unit, the substrate temperature is set to 180 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 700 Pa, and monosilane (SiH 4 ) is used as the reaction gas flow rate. 100 sccm, hydrogen (H 2) is 25000Sccm, under conditions diborane hydrogen is used as the diluent gas (B 2 H 6 / H 2 ) was set to 50 sccm, and formed into a film having a thickness of 200 Å.
　また、第五光電変換ユニットのｉ層は、基板温度が１９０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が８０Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が７００ｓｃｃｍ、モノゲルマン（ＧｅＨ４）が５００ｓｃｃｍに設定された条件で、１２００Åの膜厚に成膜した。 In the i layer of the fifth photoelectric conversion unit, the substrate temperature is set to 190 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 80 Pa, and monosilane (SiH 4 ) is used as the reaction gas flow rate. The film was formed to a thickness of 1200 mm under the conditions that 700 sccm and monogermane (GeH 4 ) were set to 500 sccm.
　更に、第五光電変換ユニットのｎ層は、基板温度が１８０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が７００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１８０ｓｃｃｍ、水素（Ｈ２）が２７０００ｓｃｃｍ、希釈ガスとして水素が用いられたホスフィン（ＰＨ３／Ｈ２）が２００ｓｃｃｍに設定された条件で、３００Åの膜厚に成膜した。 Further, in the n layer of the fifth photoelectric conversion unit, the substrate temperature is set to 180 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 700 Pa, and monosilane (SiH 4 ) is used as the reaction gas flow rate. A film having a thickness of 300 mm was formed under the conditions of 180 sccm, hydrogen (H 2 ) of 27000 sccm, and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas at 200 sccm.
　次に、第六光電変換ユニットのｐ層は、基板温度が１８０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が７００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１００ｓｃｃｍ、水素（Ｈ２）が２５０００ｓｃｃｍ、希釈ガスとして水素が用いられたジボラン（Ｂ２Ｈ６／Ｈ２）が５０ｓｃｃｍに設定された条件で、２００Åの膜厚に成膜した。
　また、ここで第六光電変換ユニットのｐ層を大気中に露呈させた。
　このｐ層に対して、基板温度が１９０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が１２００Ｐａ、プロセスガスとしてＨ２が４０００ｓｃｃｍに設定された条件で、プラズマ処理を施した。 Next, in the p layer of the sixth photoelectric conversion unit, the substrate temperature is set to 180 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 700 Pa, and the reaction gas flow rate is monosilane (SiH 4 ). There 100 sccm, hydrogen (H 2) is 25000Sccm, under conditions diborane hydrogen is used as the diluent gas (B 2 H 6 / H 2 ) was set to 50 sccm, and formed into a film having a thickness of 200 Å.
Moreover, the p layer of the sixth photoelectric conversion unit was exposed to the atmosphere here.
For this p layer, is set to substrate temperature of 190 ° C., is set power frequency 13.56 MHz, the reaction chamber pressure is 1200 Pa, H 2 as a process gas in the conditions set in the 4000 sccm, facilities plasma treatment did.
　引き続き、第六光電変換ユニットのｉ層は、基板温度が１７０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が１６００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が１５００ｓｃｃｍ、モノゲルマン（ＧｅＨ４）が３００ｓｃｃｍ、水素（Ｈ２）が１８００００ｓｃｃｍに設定された条件で、９０００Åの膜厚に成膜した。 Subsequently, in the i layer of the sixth photoelectric conversion unit, the substrate temperature is set to 170 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 1600 Pa, and monosilane (SiH 4 ) is used as the reaction gas flow rate. A film having a thickness of 9000 mm was formed under the conditions of 1500 sccm, monogermane (GeH 4 ) of 300 sccm, and hydrogen (H 2 ) of 180,000 sccm.
　また、第六光電変換ユニットのバリア層は、基板温度が１７０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が１２００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が４３００ｓｃｃｍに設定された条件で、１００Åの膜厚に成膜した。 The barrier layer of the sixth photoelectric conversion unit has a substrate temperature set at 170 ° C., a power supply frequency set at 13.56 MHz, a reaction chamber pressure set at 1200 Pa, and monosilane (SiH 4 ) as a reaction gas flow rate. The film was formed to a thickness of 100 mm under the condition set to 4300 sccm.
　そして、第六光電変換ユニットのｎ層は、基板温度が１８０℃に設定され、電源周波数が１３．５６ＭＨｚに設定され、反応室内圧力が１２００Ｐａに設定され、反応ガス流量としてモノシラン（ＳｉＨ４）が７２０ｓｃｃｍ、水素（Ｈ２）が１０８０００ｓｃｃｍ、希釈ガスとして水素が用いられたホスフィン（ＰＨ３／Ｈ２）が７２０ｓｃｃｍに設定された条件で、３００Åの膜厚に成膜した。 In the n layer of the sixth photoelectric conversion unit, the substrate temperature is set to 180 ° C., the power supply frequency is set to 13.56 MHz, the reaction chamber pressure is set to 1200 Pa, and monosilane (SiH 4 ) is used as the reaction gas flow rate. A film was formed to a thickness of 300 mm under the conditions of 720 sccm, hydrogen (H 2 ) of 108000 sccm, and phosphine (PH 3 / H 2 ) using hydrogen as a diluent gas at 720 sccm.
＜比較例４＞
　比較例４においては、第六光電変換ユニットのｉ層とｎ層との間にバリア層を形成しておらず、実施例９と同様にしてトリプル構造を有する光電変換装置を作製した。具体的に、第四光電変換ユニットを構成するｐ層，バッファ層，ｉ層，及びｉ層上に形成されるｎ層を、互いに異なる複数の成膜室を用いて基板上に順次に積層した。その後、第四光電変換ユニットのｎ層を大気中に暴露した。次に、第四光電変換ユニットのｎ層に対して水素プラズマ処理を施した。続いて、第五光電変換ユニットを構成するｐ層，ｉ層，ｎ層，及び第六光電変換ユニットを構成するｐ層を、互いに異なる複数の成膜室を用いて基板上に順次に積層した。その後、第六光電変換ユニットのｐ層を大気中に暴露した。次に、第六光電変換ユニットのｐ層に対して水素プラズマ処理を施した。その後、第六光電変換ユニットを構成するｉ層，ｎ層を形成した。 <Comparative example 4>
In Comparative Example 4, a barrier layer was not formed between the i layer and the n layer of the sixth photoelectric conversion unit, and a photoelectric conversion device having a triple structure was produced in the same manner as in Example 9. Specifically, a p layer, a buffer layer, an i layer, and an n layer formed on the i layer constituting the fourth photoelectric conversion unit are sequentially stacked on the substrate using a plurality of different film forming chambers. . Thereafter, the n layer of the fourth photoelectric conversion unit was exposed to the atmosphere. Next, hydrogen plasma treatment was performed on the n layer of the fourth photoelectric conversion unit. Subsequently, the p-layer, i-layer, and n-layer constituting the fifth photoelectric conversion unit, and the p-layer constituting the sixth photoelectric conversion unit were sequentially stacked on the substrate using a plurality of different film formation chambers. . Thereafter, the p layer of the sixth photoelectric conversion unit was exposed to the atmosphere. Next, hydrogen plasma treatment was performed on the p layer of the sixth photoelectric conversion unit. Then, i layer and n layer which comprise a 6th photoelectric conversion unit were formed.
　まず、タンデム構造を有する光電変換装置に関する実験結果を表１に示す。
　実施例１及び比較例１の光電変換装置に、ＡＭ１．５の光を１００ｍＷ／ｃｍ２の光量で照射して２５℃で出力特性として光電変換効率（η）、短絡電流（Ｊｓｃ）、開放電圧（Ｖｏｃ）、曲線因子（ＦＦ）を測定した。
　その結果を表１に示す。
　また、実施例１及び比較例１の光電変換装置について、放電曲線を図７に、波長と発電効率との関係を図８に示す。 First, Table 1 shows experimental results regarding a photoelectric conversion device having a tandem structure.
The photoelectric conversion devices of Example 1 and Comparative Example 1 were irradiated with AM 1.5 light at a light amount of 100 mW / cm 2 and output characteristics at 25 ° C. as photoelectric characteristics (η), short-circuit current (Jsc), open-circuit voltage (Voc) and fill factor (FF) were measured.
The results are shown in Table 1.
Moreover, about the photoelectric conversion apparatus of Example 1 and the comparative example 1, a discharge curve is shown in FIG. 7, and the relationship between a wavelength and electric power generation efficiency is shown in FIG.
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
　表１，図７，及び図８に示されるように、アモルファスシリコン薄膜のｉ型半導体層であるバリア層が配置された本発明の光電変換装置（実施例１）においては、従来の光電変換装置（比較例１）に比べて、良好な特性を示しており、特に光電変換効率を１％近く向上させることができた。
　特に、図８に示すように、結晶質のシリコン系薄膜からなるｐｉｎ型の第二光電変換ユニットにおいて、長波長領域における発電効率が向上しており、光電変換装置全体における光電変換効率が向上できることがわかった。 As shown in Table 1, FIG. 7, and FIG. 8, in the photoelectric conversion device (Example 1) of the present invention in which the barrier layer which is an i-type semiconductor layer of an amorphous silicon thin film is arranged, the conventional photoelectric conversion device Compared with (Comparative Example 1), it showed better characteristics, and in particular, the photoelectric conversion efficiency could be improved by nearly 1%.
In particular, as shown in FIG. 8, in the pin-type second photoelectric conversion unit made of a crystalline silicon-based thin film, the power generation efficiency in the long wavelength region is improved, and the photoelectric conversion efficiency in the entire photoelectric conversion device can be improved. I understood.
　また、シングル構造を有する光電変換装置について、バリア層の厚さを変えた場合の、光電変換効率（η）、短絡電流（Ｊｓｃ）、開放電圧（Ｖｏｃ）、曲線因子（ＦＦ）の測定結果を表２に示す。
　図９～図１１の各々は、バリア層の厚さ（横軸）に対して、η、Ｊｓｃ、Ｖｏｃ（縦軸）がプロットされたグラフを示す。 For photoelectric conversion devices having a single structure, the measurement results of photoelectric conversion efficiency (η), short circuit current (Jsc), open circuit voltage (Voc), and fill factor (FF) when the thickness of the barrier layer is changed are shown. It shows in Table 2.
Each of FIGS. 9 to 11 is a graph in which η, Jsc, and Voc (vertical axis) are plotted with respect to the thickness of the barrier layer (horizontal axis).
Figure JPOXMLDOC01-appb-T000002
Figure JPOXMLDOC01-appb-T000002
　表２、図９～図１１に示されるように、バリア層の膜厚が１０～２００Åの範囲において、光電変換効率ηが増加する効果が確認されている。
　なお、バリア層の膜厚が５０Å以上においてＪｓｃは低下するが、Ｖｏｃ、ＦＦが増加する。これによって、ηが向上していることがわかる。
　光電変換効率ηは、バリア層の膜厚２００Å以上においてはほぼ一定となり、光電変換効率ηが更に向上することは確認されていない。
　バリア層の膜厚は、２００Å以上でもよいが、成膜の効率を考慮すれば、２００Å以下であることが好ましい。
　Ｊｓｃに基づいて光電変換装置を評価すれば、バリア層の膜厚が１０～２００Åであることが好ましく、２０～１００Åの範囲であることが特に好ましい。 As shown in Table 2 and FIGS. 9 to 11, the effect of increasing the photoelectric conversion efficiency η is confirmed when the thickness of the barrier layer is in the range of 10 to 200 mm.
Note that when the thickness of the barrier layer is 50 mm or more, Jsc decreases, but Voc and FF increase. This shows that η is improved.
The photoelectric conversion efficiency η is substantially constant when the thickness of the barrier layer is 200 mm or more, and it has not been confirmed that the photoelectric conversion efficiency η is further improved.
The thickness of the barrier layer may be 200 mm or more, but is preferably 200 mm or less in consideration of the film formation efficiency.
If the photoelectric conversion device is evaluated based on Jsc, the thickness of the barrier layer is preferably 10 to 200 mm, and particularly preferably 20 to 100 mm.
　次に、レーザーラマン顕微鏡で観測されたラマン散乱光の強度について説明する。ここで、微結晶からなるｉ層中に分散するアモルファス相に起因するラマン散乱光の強度をＩａで表し、微結晶からなるｉ層中に分散する微結晶相に起因するラマン散乱光の強度をＩｃで表した場合に、光電変換装置を構成して微結晶からなるｉ層における結晶化率をＩｃ／Ｉａで表す。結晶化率Ｉｃ／Ｉａと、光電変換装置のＪｓｃとの関係を図１２に示す。
　また、図１２において、実線は、本発明のバリア層が設けられた光電変換装置における結果を示しており、破線は、本発明のバリア層が設けられていない光電変換装置における結果を示している。
　図１２に示すように、微結晶からなるｉ層の結晶化率（Ｉｃ／Ｉａ）とは関係なく、バリア層が設けられている本発明の層構造によってＪｓｃを向上させることが可能であることがわかる。
　従って、微結晶層の作製条件を変えるとＩｃ／Ｉａが増加し、それに伴いＪｓｃも増加するが、バリア層が設けられた構造（微結晶層）のＩｃ／Ｉａと、バリア層が設けられていない構造のＩｃ／Ｉａとが同じであっても、バリア層が設けられた構造におけるＪｓｃを増加させることができる。また、Ｉｃ／Ｉａが変動しても、バリア層が設けられた構造におけるＪｓｃを増加させることができる。即ち、バリア層によって得られる効果（Ｊｓｃの増加）は、Ｉｃ／Ｉａの増加に関係していない。 Next, the intensity of Raman scattered light observed with a laser Raman microscope will be described. Here, the intensity of Raman scattered light caused by the amorphous phase dispersed in the i layer made of microcrystals is represented by Ia, and the intensity of Raman scattered light caused by the microcrystalline phase dispersed in the i layer made of microcrystals is expressed as Ia. When represented by Ic, the crystallization rate in the i layer composed of microcrystals constituting the photoelectric conversion device is represented by Ic / Ia. FIG. 12 shows the relationship between the crystallization ratio Ic / Ia and the Jsc of the photoelectric conversion device.
In FIG. 12, the solid line indicates the result in the photoelectric conversion device provided with the barrier layer of the present invention, and the broken line indicates the result in the photoelectric conversion device not provided with the barrier layer of the present invention. .
As shown in FIG. 12, Jsc can be improved by the layer structure of the present invention in which a barrier layer is provided regardless of the crystallization rate (Ic / Ia) of the i-layer made of microcrystals. I understand.
Therefore, Ic / Ia increases and Jsc increases as the microcrystalline layer manufacturing conditions are changed. However, Ic / Ia of the structure (microcrystalline layer) provided with the barrier layer and the barrier layer are provided. Even if the Ic / Ia of the structure without the same is the same, the Jsc in the structure with the barrier layer can be increased. Even if Ic / Ia varies, Jsc in the structure provided with the barrier layer can be increased. That is, the effect obtained by the barrier layer (increase in Jsc) is not related to the increase in Ic / Ia.
　次に、トリプル構造を有する光電変換装置に関する実験結果を示す。
　実施例８，実施例９，比較例３，及び比較例４の光電変換装置に、ＡＭ１．５の光を１００ｍＷ／ｃｍ２の光量で照射して２５℃で出力特性として光電変換効率（η）、短絡電流（Ｊｓｃ）、開放電圧（Ｖｏｃ）、曲線因子（ＦＦ）を測定した。その結果を表３に示す。
　また、実施例８，実施例９，比較例３，及び比較例４の光電変換装置について、波長と発電効率との関係を図１３～図１６に示す。 Next, experimental results regarding a photoelectric conversion device having a triple structure are shown.
The photoelectric conversion devices of Example 8, Example 9, Comparative Example 3, and Comparative Example 4 were irradiated with AM1.5 light at a light amount of 100 mW / cm 2 and photoelectric conversion efficiency (η) as output characteristics at 25 ° C. , Short circuit current (Jsc), open circuit voltage (Voc), fill factor (FF) were measured. The results are shown in Table 3.
In addition, for the photoelectric conversion devices of Example 8, Example 9, Comparative Example 3, and Comparative Example 4, the relationship between wavelength and power generation efficiency is shown in FIGS.
Figure JPOXMLDOC01-appb-T000003
Figure JPOXMLDOC01-appb-T000003
　表３、図１３～図１６に示されるように、アモルファス系薄膜のｉ型半導体層であるバリア層が配置された本発明の光電変換装置（実施例８及び実施例９）においては、従来の光電変換装置（比較例３及び比較例４）に比べて、良好な特性を示しており、特に光電変換効率を大きく向上させることができた。
　特に、図１５及び図１６に示すように、結晶質のシリコン系薄膜からなるｐｉｎ型の第六光電変換ユニットにおいて、長波長領域における発電効率が向上しており、光電変換装置全体としての光電変換効率が向上できることがわかった。 As shown in Table 3 and FIGS. 13 to 16, in the photoelectric conversion devices (Examples 8 and 9) of the present invention in which the barrier layer which is an i-type semiconductor layer of an amorphous thin film is disposed, Compared to the photoelectric conversion devices (Comparative Example 3 and Comparative Example 4), the characteristics were excellent, and in particular, the photoelectric conversion efficiency could be greatly improved.
In particular, as shown in FIGS. 15 and 16, in the pin-type sixth photoelectric conversion unit made of a crystalline silicon-based thin film, the power generation efficiency in the long wavelength region is improved, and the photoelectric conversion as the entire photoelectric conversion device It was found that the efficiency can be improved.
　以上、本発明の光電変換装置及び光電変換装置の製造方法について説明してきたが、本発明の技術範囲は、上記実施形態に限定されることなく、本発明の趣旨を逸脱しない範囲において種々の変更を加えることが可能である。 As described above, the photoelectric conversion device and the method for manufacturing the photoelectric conversion device of the present invention have been described. However, the technical scope of the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention. Can be added.
　本発明は、光電変換装置及び光電変換装置の製造方法に広く適用可能である。 The present invention is widely applicable to photoelectric conversion devices and methods for manufacturing photoelectric conversion devices.
　１　透明基板、２　透明導電膜、３　第一光電変換ユニット、４　第二光電変換ユニット、５　裏面電極、１０Ａ，１０Ｂ，１０Ｃ（１０）　光電変換装置、３１　ｐ型半導体層（ｐ層、第一ｐ型半導体層）、３２　ｉ型半導体層（ｉ層、非晶質シリコン層、第一ｉ型半導体層）、３３　ｎ型半導体層（ｎ層、第一ｎ型半導体層）、４１　ｐ型半導体層（ｐ層、第二ｐ型半導体層）、４２　ｉ型半導体層（ｉ層、結晶質シリコン層、第二ｉ型半導体層）、４３　ｎ型半導体層（ｎ層、第二ｎ型半導体層）、４５　バリア層（アモルファスシリコン系薄膜からなるｉ型半導体層）、８　第三光電変換ユニット、８１　ｐ型半導体層（ｐ層、第三ｐ型半導体層）、８２　ｉ型半導体層（ｉ層、第三ｉ型半導体層）、８３　ｎ型半導体層（ｎ層、第三ｎ型半導体層）、８５　バリア層（アモルファスシリコン系薄膜からなるｉ型半導体層）、６０　第一成膜装置、６１　ロード室室、６２　Ｐ層成膜反応室、６３（６３ａ，６３ｂ，６３ｃ，６３ｄ）　Ｉ層成膜反応室、６４　Ｎ層成膜反応室、６５　Ｐ層成膜反応室、６６　アンロード室、７０　第二成膜装置、７１　ロード・アンロード室、７２　ＩＩＮ層成膜反応室、８０　暴露装置。 DESCRIPTION OF SYMBOLS 1 Transparent substrate, 2 Transparent electrically conductive film, 3rd 1st photoelectric conversion unit, 4th 2nd photoelectric conversion unit, 5 back electrode, 10A, 10B, 10C (10) photoelectric conversion apparatus, 31 p-type semiconductor layer (p layer, 1st p-type semiconductor layer), 32 i-type semiconductor layer (i-layer, amorphous silicon layer, first i-type semiconductor layer), 33 n-type semiconductor layer (n-layer, first n-type semiconductor layer), 41 p-type semiconductor Layer (p layer, second p-type semiconductor layer), 42 i-type semiconductor layer (i layer, crystalline silicon layer, second i-type semiconductor layer), 43 n-type semiconductor layer (n layer, second n-type semiconductor layer) ), 45 barrier layer (i-type semiconductor layer made of amorphous silicon thin film), 8 third photoelectric conversion unit, 81 p-type semiconductor layer (p layer, third p-type semiconductor layer), 82 i-type semiconductor layer (i layer) , Third i-type semiconductor layer), 83 n-type semiconductor layer (n layer, 3 n-type semiconductor layer), 85 barrier layer (i-type semiconductor layer made of amorphous silicon thin film), 60 first film forming apparatus, 61 load chamber room, 62 P layer film forming reaction chamber, 63 (63a, 63b, 63c) 63d) I layer deposition reaction chamber, 64 N layer deposition reaction chamber, 65 P layer deposition reaction chamber, 66 unload chamber, 70 second deposition device, 71 load / unload chamber, 72 IIN layer deposition Reaction chamber, 80 exposure equipment.

Claims (10)

  1. 　光電変換装置であって、
    　基板と、
    　前記基板上に形成された透明導電膜と、
    　第一ｐ型半導体層，第一ｉ型半導体層，及び第一ｎ型半導体層を含み、前記透明導電膜上に形成された第一光電変換ユニットと、
    　結晶質のシリコン系薄膜である第二ｐ型半導体層，第二ｉ型半導体層，及び第二ｎ型半導体層と、前記第二ｉ型半導体層及び前記第二ｎ型半導体層の間に設けられたアモルファスシリコン系薄膜のｉ型半導体層であるバリア層とを含み、前記第一光電変換ユニット上に形成された第二光電変換ユニットと、
    　を含むことを特徴とする光電変換装置。     A photoelectric conversion device,
    A substrate,
    A transparent conductive film formed on the substrate;
    A first photoelectric conversion unit formed on the transparent conductive film, including a first p-type semiconductor layer, a first i-type semiconductor layer, and a first n-type semiconductor layer;
    Provided between the second p-type semiconductor layer, the second i-type semiconductor layer, and the second n-type semiconductor layer, which are crystalline silicon-based thin films, and between the second i-type semiconductor layer and the second n-type semiconductor layer A second photoelectric conversion unit formed on the first photoelectric conversion unit, including a barrier layer that is an i-type semiconductor layer of the amorphous silicon thin film formed;
    A photoelectric conversion device comprising:
  2. 　請求項１に記載の光電変換装置であって、
    　前記バリア層の厚さは、１０～２００Åの範囲であることを特徴とする光電変換装置。     The photoelectric conversion device according to claim 1,
    The photoelectric conversion device, wherein the thickness of the barrier layer is in the range of 10 to 200 mm.
  3. 　光電変換装置の製造方法であって、
    　透明導電膜が形成された基板を準備し、
    　前記透明導電膜上に、第一光電変換ユニットを構成する第一ｐ型半導体層，第一ｉ型半導体層，及び第一ｎ型半導体層を順に形成し、
    　前記第一ｎ型半導体層上に、第二光電変換ユニットを構成する結晶質のシリコン系薄膜である第二ｐ型半導体層，第二ｉ型半導体層を順に形成し、
    　前記第二ｉ型半導体層上に、アモルファスシリコン系薄膜のｉ型半導体層であるバリア層を形成し、
    　前記バリア層上に、前記第二光電変換ユニットを構成する結晶質のシリコン系薄膜である第二ｎ型半導体層を形成する
    　ことを特徴とする光電変換装置の製造方法。     A method for manufacturing a photoelectric conversion device, comprising:
    Prepare a substrate on which a transparent conductive film is formed,
    On the transparent conductive film, a first p-type semiconductor layer, a first i-type semiconductor layer, and a first n-type semiconductor layer constituting the first photoelectric conversion unit are sequentially formed.
    On the first n-type semiconductor layer, a second p-type semiconductor layer and a second i-type semiconductor layer, which are crystalline silicon-based thin films constituting the second photoelectric conversion unit, are sequentially formed.
    Forming a barrier layer which is an i-type semiconductor layer of an amorphous silicon thin film on the second i-type semiconductor layer;
    A method of manufacturing a photoelectric conversion device, comprising: forming a second n-type semiconductor layer that is a crystalline silicon-based thin film constituting the second photoelectric conversion unit on the barrier layer.
  4. 　光電変換装置であって、
    　基板と、
    　前記基板上に形成された透明導電膜と、
    　結晶質のシリコン系薄膜である第三ｐ型半導体層，第三ｉ型半導体層，及び第三ｎ型半導体層と、前記第三ｉ型半導体層及び前記第三ｎ型半導体層の間に設けられたアモルファスシリコン系薄膜のｉ型半導体層であるバリア層とを含み、前記透明導電膜上に形成された第三光電変換ユニットと、
    　を含むことを特徴とする光電変換装置。     A photoelectric conversion device,
    A substrate,
    A transparent conductive film formed on the substrate;
    Provided between the third p-type semiconductor layer, the third i-type semiconductor layer, and the third n-type semiconductor layer, which are crystalline silicon-based thin films, and the third i-type semiconductor layer and the third n-type semiconductor layer A third photoelectric conversion unit formed on the transparent conductive film, including a barrier layer that is an i-type semiconductor layer of the obtained amorphous silicon-based thin film,
    A photoelectric conversion device comprising:
  5. 　光電変換装置の製造方法であって、
    　透明導電膜が形成された基板を準備し、
    　前記透明導電膜上に、第三光電変換ユニットを構成する結晶質のシリコン系薄膜である第三ｐ型半導体層，第三ｉ型半導体層を順に形成し、
    　前記第三ｉ型半導体層上に、アモルファスシリコン系薄膜のｉ型半導体層であるバリア層を形成し、
    　前記バリア層上に、前記第三光電変換ユニットを構成する結晶質のシリコン系薄膜である第三ｎ型半導体層を形成する
    　ことを特徴とする光電変換装置の製造方法。     A method for manufacturing a photoelectric conversion device, comprising:
    Prepare a substrate on which a transparent conductive film is formed,
    On the transparent conductive film, a third p-type semiconductor layer and a third i-type semiconductor layer, which are crystalline silicon-based thin films constituting the third photoelectric conversion unit, are sequentially formed.
    Forming a barrier layer which is an i-type semiconductor layer of an amorphous silicon-based thin film on the third i-type semiconductor layer;
    A third n-type semiconductor layer, which is a crystalline silicon-based thin film that constitutes the third photoelectric conversion unit, is formed on the barrier layer.
  6. 　光電変換装置であって、
    　基板と、
    　前記基板上に形成された透明導電膜と、
    　第四ｐ型半導体層，第四ｉ型半導体層，及び第四ｎ型半導体層を含み、前記透明導電膜上に形成された第四光電変換ユニットと、
    　第五ｐ型半導体層，第五ｉ型半導体層，及び第五ｎ型半導体層を含み、前記第四光電変換ユニット上に形成された第五光電変換ユニットと、
    　結晶質のシリコン系薄膜である第六ｐ型半導体層，第六ｉ型半導体層，及び第六ｎ型半導体層と、前記第六ｉ型半導体層及び前記第六ｎ型半導体層の間に設けられたアモルファスシリコン系薄膜のｉ型半導体層であるバリア層とを含み、前記第五光電変換ユニット上に形成された第六光電変換ユニットと、
    　を含むことを特徴とする光電変換装置。     A photoelectric conversion device,
    A substrate,
    A transparent conductive film formed on the substrate;
    A fourth photoelectric conversion unit formed on the transparent conductive film, including a fourth p-type semiconductor layer, a fourth i-type semiconductor layer, and a fourth n-type semiconductor layer;
    A fifth photoelectric conversion unit including a fifth p-type semiconductor layer, a fifth i-type semiconductor layer, and a fifth n-type semiconductor layer, and formed on the fourth photoelectric conversion unit;
    Provided between the sixth p-type semiconductor layer, the sixth i-type semiconductor layer, and the sixth n-type semiconductor layer, which are crystalline silicon thin films, and between the sixth i-type semiconductor layer and the sixth n-type semiconductor layer A sixth photoelectric conversion unit formed on the fifth photoelectric conversion unit, including a barrier layer that is an i-type semiconductor layer of the formed amorphous silicon thin film,
    A photoelectric conversion device comprising:
  7. 　請求項６に記載の光電変換装置であって、
    　前記第五ｉ型半導体層は、アモルファスのシリコンゲルマニウム系薄膜であることを特徴とする光電変換装置。     The photoelectric conversion device according to claim 6,
    The fifth i-type semiconductor layer is an amorphous silicon germanium-based thin film.
  8. 　請求項６又は請求項７に記載の光電変換装置であって、
    　前記第六ｉ型半導体層は、微結晶のシリコンゲルマニウム系薄膜であることを特徴とする光電変換装置。     The photoelectric conversion device according to claim 6 or 7, wherein
    The sixth i-type semiconductor layer is a microcrystalline silicon germanium-based thin film.
  9. 　請求項６から請求項８のいずれか一項に記載の光電変換装置であって、
    　前記バリア層の厚さは、１０～２００Åの範囲であることを特徴とする光電変換装置。     A photoelectric conversion device according to any one of claims 6 to 8,
    The photoelectric conversion device, wherein the thickness of the barrier layer is in the range of 10 to 200 mm.
  10. 　光電変換装置の製造方法であって、
    　透明導電膜が形成された基板を準備し、
    　前記透明導電膜上に、第四光電変換ユニットを構成する第四ｐ型半導体層，第四ｉ型半導体層，及び第四ｎ型半導体層を順に形成し、
    　前記第四ｎ型半導体層上に、第五光電変換ユニットを構成する第五ｐ型半導体層，第五ｉ型半導体層，及び第五ｎ型半導体層を順に形成し、
    　前記第五ｎ型半導体層上に、第六光電変換ユニットを構成する結晶質のシリコン系薄膜である第六ｐ型半導体層，第六ｉ型半導体層を順に形成し、
    　前記第六ｉ型半導体層上に、アモルファスシリコン系薄膜のｉ型半導体層であるバリア層を形成し、
    　前記バリア層上に、前記第六光電変換ユニットを構成する結晶質のシリコン系薄膜である第六ｎ型半導体層を形成する
    　ことを特徴とする光電変換装置の製造方法。     A method for manufacturing a photoelectric conversion device, comprising:
    Prepare a substrate on which a transparent conductive film is formed,
    On the transparent conductive film, a fourth p-type semiconductor layer, a fourth i-type semiconductor layer, and a fourth n-type semiconductor layer constituting a fourth photoelectric conversion unit are sequentially formed.
    On the fourth n-type semiconductor layer, a fifth p-type semiconductor layer, a fifth i-type semiconductor layer, and a fifth n-type semiconductor layer constituting a fifth photoelectric conversion unit are sequentially formed.
    On the fifth n-type semiconductor layer, a sixth p-type semiconductor layer and a sixth i-type semiconductor layer, which are crystalline silicon-based thin films constituting the sixth photoelectric conversion unit, are sequentially formed.
    Forming a barrier layer that is an i-type semiconductor layer of an amorphous silicon-based thin film on the sixth i-type semiconductor layer;
    A method of manufacturing a photoelectric conversion device, comprising: forming a sixth n-type semiconductor layer which is a crystalline silicon-based thin film constituting the sixth photoelectric conversion unit on the barrier layer.
PCT/JP2010/003997 2009-06-18 2010-06-16 Photoelectric conversion device and method for producing photoelectric conversion device WO2010146846A1 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2009-145691 2009-06-18
JP2009145691 2009-06-18
JP2009229881 2009-10-01
JP2009-229881 2009-10-01

Publications (1)

Publication Number Publication Date
WO2010146846A1 true WO2010146846A1 (en) 2010-12-23

Family

ID=43356177

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2010/003997 WO2010146846A1 (en) 2009-06-18 2010-06-16 Photoelectric conversion device and method for producing photoelectric conversion device

Country Status (2)

Country Link
TW (1) TW201110380A (en)
WO (1) WO2010146846A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012057201A1 (en) * 2010-10-28 2012-05-03 株式会社アルバック Photoelectric conversion device and method for manufacturing photoelectric conversion device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1187742A (en) * 1997-09-01 1999-03-30 Kanegafuchi Chem Ind Co Ltd Silicon-based thin film photoelectric conversion device
JP2002198551A (en) * 2000-12-27 2002-07-12 Mitsubishi Heavy Ind Ltd Optical-to-electrical transducer element and device thereof using it as well as method for manufacturing the same
JP2002343991A (en) * 2001-05-16 2002-11-29 Fuji Electric Co Ltd Non-single crystal solar battery
JP2003051604A (en) * 2001-08-03 2003-02-21 Sanyo Electric Co Ltd Photovoltaic element

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1187742A (en) * 1997-09-01 1999-03-30 Kanegafuchi Chem Ind Co Ltd Silicon-based thin film photoelectric conversion device
JP2002198551A (en) * 2000-12-27 2002-07-12 Mitsubishi Heavy Ind Ltd Optical-to-electrical transducer element and device thereof using it as well as method for manufacturing the same
JP2002343991A (en) * 2001-05-16 2002-11-29 Fuji Electric Co Ltd Non-single crystal solar battery
JP2003051604A (en) * 2001-08-03 2003-02-21 Sanyo Electric Co Ltd Photovoltaic element

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
M. FONRODONA ET AL: "Control of doped layers in p-i-n microcrystalline solar cells fully deposited with HWCVD", JOURNAL OF NON-CRYSTALLINE SOLIDS, vol. 338-340, 15 June 2004 (2004-06-15), pages 659 - 662, XP004514673, DOI: doi:10.1016/j.jnoncrysol.2004.03.070 *
T.SODERSTROM ET AL.: "N/I buffer layer for substrate microcrystalline thin film silicon solar cell", JOURNAL OF APPLIED PHYSICS, vol. 104, no. 10, 15 November 2008 (2008-11-15), pages 104505, XP012116558, DOI: doi:10.1063/1.3021053 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012057201A1 (en) * 2010-10-28 2012-05-03 株式会社アルバック Photoelectric conversion device and method for manufacturing photoelectric conversion device

Also Published As

Publication number Publication date
TW201110380A (en) 2011-03-16

Similar Documents

Publication Publication Date Title
JP4940290B2 (en) Photoelectric conversion device and manufacturing method thereof
US20150136210A1 (en) Silicon-based solar cells with improved resistance to light-induced degradation
WO2011065343A1 (en) Photoelectric converter and method for producing same
TW201733150A (en) Method for manufacturing photoelectric conversion device
JP2010283161A (en) Solar cell and manufacturing method thereof
WO2010023991A1 (en) Method for producing photoelectric conversion device, photoelectric conversion device, and system for producing photoelectric conversion device
WO2010087198A1 (en) Method for manufacturing photoelectric conversion device, photoelectric conversion device, photoelectric conversion device manufacture system, and method for utilizing photoelectric conversion device manufacture system
JP5232362B2 (en) A manufacturing method of an integrated thin film photoelectric conversion device, and an integrated thin film photoelectric conversion device obtainable by the manufacturing method.
US8652871B2 (en) Method for depositing an amorphous silicon film for photovoltaic devices with reduced light-induced degradation for improved stabilized performance
JP2008283075A (en) Manufacturing method of photoelectric conversion device
WO2011001747A1 (en) Production method and production device for solar battery
US20130291933A1 (en) SiOx n-LAYER FOR MICROCRYSTALLINE PIN JUNCTION
WO2010146846A1 (en) Photoelectric conversion device and method for producing photoelectric conversion device
JP2011014618A (en) Solar cell and method of manufacturing the same
JP5373045B2 (en) Photoelectric conversion device
JP2010283162A (en) Solar cell and method for manufacturing the same
WO2011125878A1 (en) Photoelectric conversion device, and process for production of photoelectric conversion device
WO2011068197A1 (en) Photoelectric conversion device and manufacturing method for same
JP2004253417A (en) Method of manufacturing thin film solar cell
WO2012057201A1 (en) Photoelectric conversion device and method for manufacturing photoelectric conversion device
WO2010023948A1 (en) Photoelectric conversion device manufacturing method, photoelectric conversion device, and photoelectric conversion device manufacturing system
WO2013065538A1 (en) Photoelectric conversion device
JP2011035297A (en) Multilayer photovoltaic element and method for manufacturing multilayer photovoltaic element
WO2013080803A1 (en) Photovoltatic power device
JP2010177582A (en) Method for manufacturing photoelectric conversion device, photoelectric conversion device and manufacturing system of the photoelectric conversion device

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 10789225

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 10789225

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: JP