WO2010140725A1 - Method for forming a thin film metal conductive line - Google Patents

Method for forming a thin film metal conductive line Download PDF

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Publication number
WO2010140725A1
WO2010140725A1 PCT/KR2009/003017 KR2009003017W WO2010140725A1 WO 2010140725 A1 WO2010140725 A1 WO 2010140725A1 KR 2009003017 W KR2009003017 W KR 2009003017W WO 2010140725 A1 WO2010140725 A1 WO 2010140725A1
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Prior art keywords
layer
forming
photoresist
thin film
conductive line
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PCT/KR2009/003017
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French (fr)
Korean (ko)
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김상희
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(주)탑엔지니어링
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/7685—Barrier, adhesion or liner layers the layer covering a conductive structure
    • H01L21/76852—Barrier, adhesion or liner layers the layer covering a conductive structure the layer also covering the sidewalls of the conductive structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0272—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor

Definitions

  • the present invention relates to a method for forming a thin film metal conductive line, and more particularly, to effectively prevent under cut in manufacturing a high precision thin film metal conductive line required for a highly integrated, high frequency, high precision conductive line substrate.
  • a method for forming a thin film metal conductive line is a method for forming a thin film metal conductive line.
  • the conventional thin film metal conductive line is formed by the following method.
  • a seed metal layer is formed on a ceramic substrate which has been subjected to a pretreatment process.
  • the seed metal layer is formed of a seed metal, such as Ti, Pd, Cu, Al, Au, or the like, by DC magnetron sputtering. It is formed sequentially.
  • the thicknesses of Ti, Pd and Cu are about 2000 kPa, 60 kPa and 9000 kPa, Al is about 2000 kPa, and Au is about 500 kPa.
  • the thickness of these metal layers can vary depending on the application.
  • a photoresist film is coated on the substrate on which the seed metal layer is formed by using a photoresist laminator device, and a photoresist film of a part corresponding to the main metal layer pattern using a photolithography process, a photolithography method. Is removed (a of FIG. 1).
  • the main metal layer is plated on the portion where the photoresist film is removed, and the main metal layer has Cu, Ni, and Au of 10 to 15 ⁇ m, 1 to 3 ⁇ m, and 1 to 1, respectively, by using an electroplating method having excellent film forming speed. Plate at 1.5 ⁇ m (FIG. 1 b).
  • This etched undercut phenomenon occurs, making it difficult to form precise thin film metal conductive lines.
  • the protective film may be formed by an improved plating method. Formation is required.
  • An object of the present invention is to solve the problems of the prior art as described above, by effectively preventing the under-cut phenomenon when forming a thin metal conductive line, the electronic components are characterized by miniaturization, complexation, modularization and high frequency
  • the present invention provides a method for forming a thin film metal conductive line that is satisfactory and has excellent impedance characteristics.
  • a method of forming a thin film metal conductive line includes forming a seed metal layer on a surface of a substrate, forming a first photoresist layer on the surface of the seed metal layer, and forming a photo of a portion corresponding to a main metal layer pattern. Removing the resist film, forming a Cu plating layer using the first photoresist layer as a mask, and removing the first photoresist layer and forming a second photoresist layer at a predetermined interval from the Cu plating layer.
  • the etching may be performed by wet etching.
  • the substrate is characterized in that the substrate for a probe card or a multilayer wiring substrate used as a mobile communication component.
  • the predetermined interval is characterized in that 0.1 ⁇ 2 ⁇ m.
  • the method for forming a thin film metal conductive line comprises the steps of: forming a seed metal layer on the surface of the substrate, forming a photoresist layer on the surface of the seed metal layer and removing the photoresist film of the portion corresponding to the main metal layer pattern, Forming the main metal layer using the photoresist layer as a mask, and removing the exposed portion of the seed metal layer after removing the photoresist layer, wherein the removing is performed by ion beam treatment. It is characterized by.
  • FIG. 1 is a view showing a process of forming a conventional thin film metal conductive line.
  • FIG. 2 is a view illustrating a process of forming a thin film metal conductive line according to a first embodiment of the present invention.
  • FIG 3 is a view illustrating a process of forming a thin film metal conductive line according to a second exemplary embodiment of the present invention.
  • FIG. 2 is a view showing a process of forming a thin film metal conductive line according to the first embodiment of the present invention.
  • the Ti, Pd, Cu layer is formed on the surface of the substrate by electroless plating, chemical vapor deposition (CVD) or physical vapor deposition (PVD). Formed sequentially to form a seed metal layer (a of FIG. 2).
  • CVD chemical vapor deposition
  • PVD physical vapor deposition
  • the Cu plating process is performed as the main metal layer using the first photoresist layer (first PR) as a mask (Fig. 2C).
  • first photoresist layer (first PR) is removed (FIG. 2 d), and a photoresist film is applied to the surface of the seed metal layer on which the Cu plating layer is formed.
  • second photoresist layer (second PR) is formed through an exposure and development process at regular intervals from the plating layer, for example from 0.1 to 2 mu m (Fig. 2E).
  • Ni and Au are plated around the Cu plating layer, that is, between the upper surface of the Cu plating layer, the Cu plating layer, and the second photoresist layer (second PR) to form a Ni plating layer and an Au plating layer (FIG. 2F).
  • the main metal layer is formed.
  • the electroless plating method exhibits excellent gap filling characteristics and fast growth even in a wiring structure having a high aspect ratio, but has low electron mobility (EM) and complicated chemical reactions. It is difficult to control.
  • the electroplating method has a disadvantage that the chemical reaction is relatively simple, easy to handle, and excellent in electron mobility but low in gap peeling characteristics.
  • the present invention may employ a configuration in which a main metal layer is formed by electroplating but a magnetic field is applied to improve gap filling characteristics and growth rates.
  • the second photoresist layer (second PR) was removed (G of FIG. 2), and the seed metal layer exposed on the surface of the substrate by wet etching. After the removal, the undercut of the thin film metal conductive line pattern does not occur by the Ni plating layer surrounding the Cu plating layer (h of FIG. 2).
  • the Cu plating layer of the electroplated main metal layer is not exposed to the Cu etching solution during Cu etching of the seed metal layer, the undercut phenomenon of the Cu layer of the seed metal layer as well as the main metal layer directly below the main metal layer is prevented. Effectively prevented.
  • the method of forming the thin film metal conductive line according to the present invention sequentially forms Ti, Pd, and Cu layers by electroless plating, chemical vapor deposition (CVD) or physical vapor deposition (PVD) on a substrate.
  • CVD chemical vapor deposition
  • PVD physical vapor deposition
  • a photosensitive photoresist film is coated on the seed metal layer surface, a photoresist layer PR is formed through an exposure and development process, and a photoresist film of a portion corresponding to the main metal layer pattern is removed (b of FIG. 3).
  • Cu, Ni, and Au are plated as main metal layers, respectively, using the photoresist layer PR as a mask to form a Cu plating layer, a Ni plating layer, and an Au plating layer (Fig. 3C).
  • gases such as hydrogen, helium, nitrogen, argon, xenon, etc., depending on the material to be etched (gas state and ionic state) Can be used.
  • the ion beam of the gas (gas state and ion state) is accelerated to a maximum acceleration energy of 10KeV to 70KeV depending on the metal, and simultaneously a metal such as Cu, Pd, Ti or Al, Au, etc. is used in an ion sputtering plasma method. Since etching is performed, undercut generation can be suppressed.
  • the scheme of the second embodiment is effective for manufacturing a microwave application board.
  • the upper surface of the Cu plating layer, Cu in the production of a high-density substrate for forming a high-precision circuit such as a substrate for a probe card or a multilayer wiring board used as a mobile communication component By plating Ni and Au, respectively, between the plating layer and the second photoresist layer (second PR), an effect that the undercut phenomenon of the thin film metal conductive line can be prevented can be obtained.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

The present invention relates to a method for forming a thin film metal conductive line for effectively preventing the occurrence of undercuts in the manufacture of a high-precision thin film metal conductive line required for a highly-integrated, high-frequency, and high-precision conductive substrate. The method comprises the steps of: forming a seed metal layer on a substrate surface; forming a first photoresist layer on the seed metal layer surface, and removing a portion of a photoresist film corresponding to a main metal layer pattern; using the first photoresist layer as a mask to form a Cu plating layer; removing the first photoresist layer, and then forming a second photoresist layer at a certain distance from the Cu plating layer; using the second photoresist layer as a mask to form an Ni plating layer enclosing the Cu plating layer, and an Au plating layer; and removing the second photoresist layer, and performing etching to remove an exposed portion of the seed metal layer. According to the method for forming a thin film metal conductive line of the present invention, during the manufacture of high-precision substrates for configuring high-precision circuits such as substrates for probe cards and multilevel interconnect substrates used for mobile communication components, the effect of preventing the occurrence of undercuts in thin film metal conductive lines is achieved.

Description

[규칙 제26조에 의한 보정 16.11.2009]　박막 금속 전도선의 형성 방법[Correction 16.11.2009 by Rule 26] 방법 Formation method of thin metal conductive wire
본 발명은 박막 금속 전도선의 형성 방법에 관한 것으로서, 보다 상세하게는 고집적, 고주파, 고정밀의 전도선 기판에 요구되는 초정밀의 박막 금속 전도선을 제조함에 있어 언더 컷(under cut) 현상을 효과적으로 방지하는 박막 금속 전도선의 형성 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a thin film metal conductive line, and more particularly, to effectively prevent under cut in manufacturing a high precision thin film metal conductive line required for a highly integrated, high frequency, high precision conductive line substrate. A method for forming a thin film metal conductive line.
최근 이동 통신 기술의 발달로 이동 통신 기술 분야에서 사용되는 전자 부품들이 소형화, 복합화, 모듈화 및 고주파화가 가속되고 있다. 이러한 기술의 요구를 만족시키기 위해서 배선으로 사용되는 박막 금속 전도선의 정밀도는 더욱 높아져야 하는 실정이다. Recently, with the development of mobile communication technology, electronic components used in the field of mobile communication technology are accelerating in miniaturization, complexation, modularization, and high frequency. In order to satisfy the demands of the technology, the precision of the thin film metal conductive wires used as wiring has to be increased.
도 1은 종래의 박막 금속 전도선의 형성 과정을 나타낸 것이다. 종래 박막 금속 전도선은 다음과 같은 방법으로 형성되었다.1 illustrates a process of forming a conventional thin film metal conductive line. The conventional thin film metal conductive line is formed by the following method.
먼저 기판의 전 처리 공정을 거친 세라믹 기판에 시드 금속층을 형성하는 데, 상기 시드 금속층은 DC 마그네트론 스퍼터링(Magnetron Sputtering)에 의해 시드(Seed) 금속인 Ti, Pd 그리고 Cu 혹은 Al, Au 등의 층을 순차적으로 형성한 것이다. First, a seed metal layer is formed on a ceramic substrate which has been subjected to a pretreatment process. The seed metal layer is formed of a seed metal, such as Ti, Pd, Cu, Al, Au, or the like, by DC magnetron sputtering. It is formed sequentially.
여기서, 상기 Ti, Pd 그리고 Cu의 각각의 두께는 약 2000Å, 60Å 그리고 9000Å이며, Al은 약 2000Å, Au는 약 500Å 정도로 형성한다. 물론 이들 금속 층의 두께는 응용 분야에 따라서 달라질 수 있다. Here, the thicknesses of Ti, Pd and Cu are about 2000 kPa, 60 kPa and 9000 kPa, Al is about 2000 kPa, and Au is about 500 kPa. Of course, the thickness of these metal layers can vary depending on the application.
그리고 감광제 라미네이터(Laminator) 장비를 이용하여 시드 금속층이 형성된 기판 위에 포토레지스트 필름을 도포하고, 사진 식각법인 포토리소그래피(Photolithogrphy) 공정 기술을 이용하여 주(Main) 금속층 패턴에 해당하는 부분의 포토레지스트 필름을 제거한다(도 1의 a). Then, a photoresist film is coated on the substrate on which the seed metal layer is formed by using a photoresist laminator device, and a photoresist film of a part corresponding to the main metal layer pattern using a photolithography process, a photolithography method. Is removed (a of FIG. 1).
이후, 상기 포토레지스트 필름이 제거된 부분에 주 금속층을 도금하며, 상기 주 금속층은 성막 속도가 우수한 전기도금 방식을 이용하여 Cu, Ni, Au를 각각 10~15 ㎛, 1~3 ㎛, 1~1.5 ㎛로 도금한다(도 1의 b). Subsequently, the main metal layer is plated on the portion where the photoresist film is removed, and the main metal layer has Cu, Ni, and Au of 10 to 15 μm, 1 to 3 μm, and 1 to 1, respectively, by using an electroplating method having excellent film forming speed. Plate at 1.5 μm (FIG. 1 b).
그리고, 상기 주 금속층 주위에 남아있는 포토레지스트 필름을 스트립 장비 및 화공 약품 등을 이용하여 제거하고(도 1의 c), 습식 에칭 방식으로 기판 표면에 노출된 주 금속층과 시드 금속층을 순차적으로 식각한다(도 1의 d).Then, the photoresist film remaining around the main metal layer is removed using strip equipment and chemicals, etc. (c) of FIG. 1, and the main metal layer and the seed metal layer exposed to the surface of the substrate are sequentially etched by a wet etching method. (FIG. 1 d).
그러나, 전술한 바와 같이 박막 금속 전도선을 형성하면, 도 1의 d에서 알 수 있듯이 습식 에칭 방식으로 주 금속층과 시드 금속층을 순차적으로 식각할 때 전기도금 기술로 형성된 주 금속층의 구리(Cu) 도금층이 에칭되는 언더 컷 현상이 발생하게 되어 정밀한 박막 금속 전도선을 형성하기가 어렵다. However, as described above, when the thin metal conductive line is formed, the copper (Cu) plating layer of the main metal layer formed by the electroplating technique when the main metal layer and the seed metal layer are sequentially etched by the wet etching method as shown in FIG. This etched undercut phenomenon occurs, making it difficult to form precise thin film metal conductive lines.
특히 고정밀의 임피던스 배선 특성을 요구하는 프로브 카드(Probe card)용 기판이나 이동통신 부품으로 사용되는 다층 배선 기판인 경우, 전술한 언더 컷 현상에 의해 출력 특성에 치명적인 영향이 초래되어 고집적, 고정밀이 요구되는 다층 배선 기판을 구현하기 어려운 문제점이 있었다.In particular, in the case of a probe card substrate requiring high precision impedance wiring characteristics or a multilayer wiring substrate used as a mobile communication component, the undercut phenomenon causes a fatal effect on the output characteristics, requiring high integration and high precision. There was a problem that it is difficult to implement a multi-layer wiring board.
한편, 반도체 제조 공정에서 언더 컷 현상을 방지하기 위해 전해 도금 혹은 무전해 도금에 의해 전도선 패턴의 외표면에 도금을 수행하는 방법이 제시되고 있다. 그러나, 고집적, 고정밀이 요구되는 프로브 카드용 기판 등을 구현하기 위한 도금에 있어서는 미세한 폭의 갭 필링에서 완전한 바텀-업 필링(bottom-up filling)이 이루어지지 않을 경우, 전도선 패턴 내에 심(seam) 내지 보이드(void)가 형성된다. 이러한 심(seam) 또는 보이드(void)는 전도선의 단락 또는 보이드 내에 잔류하는 전해액의 영향으로 소자의 파괴가 발생할 가능성이 있어 고집적, 고정밀 기판의 박막 금속 전도선 형성에서는 보다 향상된 도금 방식에 의한 보호막의 형성이 요구되는 실정이다. On the other hand, in order to prevent the undercut phenomenon in the semiconductor manufacturing process has been proposed a method of plating on the outer surface of the conductive line pattern by electrolytic plating or electroless plating. However, in plating for realizing a highly integrated, high-precision probe card substrate or the like, a seam in the conduction pattern may not be achieved if full bottom-up filling is not performed in the gap filling of the fine width. ) And voids are formed. Such seams or voids may cause element breakage due to short circuits of the conductive lines or the influence of the electrolyte remaining in the voids. Thus, in the formation of thin metal conductive lines of highly integrated and high-precision substrates, the protective film may be formed by an improved plating method. Formation is required.
본 발명의 목적은 상술한 바와 같은 종래 기술의 문제점을 해결하기 위해 이루어진 것으로서, 박막 금속 전도선을 형성할 때 언더 컷 현상을 효과적으로 방지함으로써 전자 부품들이 소형화, 복합화, 모듈화 및 고주파화 등의 특성을 만족하고, 임피던스 특성이 우수한 박막 금속 전도선의 형성 방법을 제공하는 것이다.An object of the present invention is to solve the problems of the prior art as described above, by effectively preventing the under-cut phenomenon when forming a thin metal conductive line, the electronic components are characterized by miniaturization, complexation, modularization and high frequency The present invention provides a method for forming a thin film metal conductive line that is satisfactory and has excellent impedance characteristics.
상기 목적을 달성하기 위해 본 발명에 따른 박막 금속 전도선의 형성 방법은, 기판 표면에 시드 금속층을 형성하는 단계, 상기 시드 금속층 표면에 제1 포토레지스트층을 형성하고 주 금속층 패턴에 해당하는 부분의 포토레지스트 필름을 제거하는 단계, 상기 제1 포토레지스트층을 마스크로 하여 Cu 도금층을 형성하는 단계, 상기 제1 포토레지스트층을 제거한 후 상기 Cu 도금층과 일정 간격을 띄워 제2 포토레지스트층을 형성하는 단계, 상기 제2 포토레지스트층을 마스크로 하여 상기 Cu 도금층을 에워싸는 Ni 도금층과 Au 도금층을 형성하는 단계, 상기 제2 포토레지스트층을 제거하고 상기 시드 금속층의 노출되는 부위를 제거하기 위해 에칭하는 단계를 포함하는 것을 특징으로 한다.In order to achieve the above object, a method of forming a thin film metal conductive line according to the present invention includes forming a seed metal layer on a surface of a substrate, forming a first photoresist layer on the surface of the seed metal layer, and forming a photo of a portion corresponding to a main metal layer pattern. Removing the resist film, forming a Cu plating layer using the first photoresist layer as a mask, and removing the first photoresist layer and forming a second photoresist layer at a predetermined interval from the Cu plating layer. Forming a Ni plating layer and an Au plating layer surrounding the Cu plating layer using the second photoresist layer as a mask, and removing the second photoresist layer and etching to remove exposed portions of the seed metal layer. It is characterized by including.
또 본 발명에 따른 박막 금속 전도선의 형성 방법에 있어서, 상기 에칭하는 단계는 습식 에칭에 의해 실행되는 것을 특징으로 한다.In the method for forming a thin film metal conductive line according to the present invention, the etching may be performed by wet etching.
또 본 발명에 따른 박막 금속 전도선의 형성 방법에 있어서, 상기 기판은 프로브 카드용 기판 또는 이동통신 부품으로 사용되는 다층 배선 기판인 것을 특징으로 한다.In the method for forming a thin film metal conductive line according to the present invention, the substrate is characterized in that the substrate for a probe card or a multilayer wiring substrate used as a mobile communication component.
또 본 발명에 따른 박막 금속 전도선의 형성 방법에 있어서, 상기 일정 간격은 0.1~2㎛인 것을 특징으로 하는 한다.In the method for forming a thin film metal conductive line according to the present invention, the predetermined interval is characterized in that 0.1 ~ 2㎛.
또 본 발명에 따른 박막 금속 전도선의 형성 방법은, 기판 표면에 시드 금속층을 형성하는 단계, 상기 시드 금속층 표면에 포토레지스트층을 형성하고 주 금속층 패턴에 해당하는 부분의 포토레지스트 필름을 제거하는 단계, 상기 포토레지스트 층을 마스크로 하여 상기 주 금속층을 형성하는 단계, 상기 포토레지스트층을 제거한 후 상기 시드 금속층의 노출되는 부위를 제거하는 단계를 포함하며, 상기 제거하는 단계는 이온 빔 처리에 의해 실행되는 것을 특징으로 한다.In addition, the method for forming a thin film metal conductive line according to the present invention comprises the steps of: forming a seed metal layer on the surface of the substrate, forming a photoresist layer on the surface of the seed metal layer and removing the photoresist film of the portion corresponding to the main metal layer pattern, Forming the main metal layer using the photoresist layer as a mask, and removing the exposed portion of the seed metal layer after removing the photoresist layer, wherein the removing is performed by ion beam treatment. It is characterized by.
도 1은 종래의 박막 금속 전도선을 형성하는 과정을 나타내는 도면이다.1 is a view showing a process of forming a conventional thin film metal conductive line.
도 2는 본 발명의 제1 실시예에 따른 박막 금속 전도선을 형성하는 과정은 나타내는 도면이다.2 is a view illustrating a process of forming a thin film metal conductive line according to a first embodiment of the present invention.
도 3은 본 발명의 제2 실시예에 따른 박막 금속 전도선을 형성하는 과정은 나타내는 도면이다.3 is a view illustrating a process of forming a thin film metal conductive line according to a second exemplary embodiment of the present invention.
이하, 첨부한 도면을 바탕으로 본 발명에 따른 박막 금속 전도선의 형성 방법에 관한 바람직한 실시예에 대해 자세히 설명하도록 한다.Hereinafter, a preferred embodiment of a method for forming a thin film metal conductive line according to the present invention will be described in detail with reference to the accompanying drawings.
먼저 본 발명의 제1 실시예를 도 2를 참조하여 설명한다. 여기서, 도 2는 본 발명의 제1 실시예에 따른 박막 금속 전도선을 형성하는 과정을 나타내는 도면이다. First, the first embodiment of the present invention will be described with reference to FIG. 2 is a view showing a process of forming a thin film metal conductive line according to the first embodiment of the present invention.
본 발명에 따른 박막 금속 전도선의 형성 방법에 따르면, 도 2에 도시된 바와 같이 기판 표면에 무전해 도금, CVD(Chemical Vapor Deposition) 또는 PVD(Physical Vapor Deposition) 방식에 의해 Ti, Pd, Cu 층을 순차적으로 형성하여 시드 금속층을 형성시킨다(도 2의 a).According to the method of forming the thin film metal conductive line according to the present invention, as shown in FIG. 2, the Ti, Pd, Cu layer is formed on the surface of the substrate by electroless plating, chemical vapor deposition (CVD) or physical vapor deposition (PVD). Formed sequentially to form a seed metal layer (a of FIG. 2).
상기 시드 금속층 표면에 감광성의 포토레지스트 필름을 도포하고 노광 및 현상 공정을 거쳐 제1 포토레지스트층(제1 PR)을 형성하고, 주 금속층 패턴에 해당하는 부분의 포토레지스트 필름을 제거한다(도 2의 b). Applying a photosensitive photoresist film on the seed metal layer surface to form a first photoresist layer (first PR) through an exposure and development process, and remove the photoresist film of the portion corresponding to the main metal layer pattern (Fig. 2). B).
그 후, 상기 제1 포토레지스트층(제1 PR)을 마스크로 하여 주 금속 층으로서 Cu 도금 공정을 실행한다(도 2의 c).Thereafter, the Cu plating process is performed as the main metal layer using the first photoresist layer (first PR) as a mask (Fig. 2C).
상기 Cu 도금 공정에 의해 Cu 도금층을 형성한 후에 제1 포토레지스트층(제1 PR)을 제거하고(도 2의 d), 다시 Cu 도금층이 형성된 시드 금속층의 표면에 포토레지스트 필름을 도포하되 상기 Cu 도금층과 일정한 간격, 예를 들어 0.1~2㎛의 간격을 두고 노광 및 현상 공정을 거쳐 제2 포토레지스트층(제2 PR)을 형성한다(도 2의 e).After the Cu plating layer is formed by the Cu plating process, the first photoresist layer (first PR) is removed (FIG. 2 d), and a photoresist film is applied to the surface of the seed metal layer on which the Cu plating layer is formed. A second photoresist layer (second PR) is formed through an exposure and development process at regular intervals from the plating layer, for example from 0.1 to 2 mu m (Fig. 2E).
다음 상기 Cu 도금층 주위 즉, Cu 도금층의 상면, Cu 도금층과 제2 포토레지스트층(제2 PR) 사이에 Ni, Au를 각각 도금하여 Ni 도금층과 Au 도금층을 형성한다(도 2의 f). 이러한 공정에 의해 주 금속층이 형성된다. Next, Ni and Au are plated around the Cu plating layer, that is, between the upper surface of the Cu plating layer, the Cu plating layer, and the second photoresist layer (second PR) to form a Ni plating layer and an Au plating layer (FIG. 2F). By this process, the main metal layer is formed.
한편, 도금법에는 무전해 도금법과 전해 도금법이 있는데 무전해 도금법은 높은 종횡비를 갖는 배선 구조에서도 우수한 갭필링(gap filling) 특성과 고속 성장을 나타내지만, 전자 이동도(EM)가 낮고 화학 반응도 복잡하여 제어가 어렵다는 단점이 있다. 이에 대하여, 전해 도금법은 화학 반응이 비교적 간단하고 취급이 쉬우며 전자 이동도가 우수하지만 갭필링 특성이 낮다는 단점이 있다. On the other hand, there are electroless plating methods and electrolytic plating methods. The electroless plating method exhibits excellent gap filling characteristics and fast growth even in a wiring structure having a high aspect ratio, but has low electron mobility (EM) and complicated chemical reactions. It is difficult to control. On the other hand, the electroplating method has a disadvantage that the chemical reaction is relatively simple, easy to handle, and excellent in electron mobility but low in gap peeling characteristics.
이에 본 발명은 전해 도금에 의해 주 금속층을 형성하되 갭필링 특성과 성장 속도를 개선하기 위해 자기장을 인가하는 구성을 채용할 수도 있다.Accordingly, the present invention may employ a configuration in which a main metal layer is formed by electroplating but a magnetic field is applied to improve gap filling characteristics and growth rates.
이와 같은 방법에 의해 Cu 도금층 주위에 Ni 도금층과 Au 도금층을 각각 형성한 후 제2 포토레지스트층(제2 PR)을 제거하고(도 2의 g), 습식 에칭에 의해 기판 표면에 노출된 시드 금속층을 제거하면, Cu 도금층을 에워싸는 Ni 도금층에 의해 박막 금속 전도선 패턴의 언더 컷은 일어 나지 않게 된다(도 2의 h).By forming the Ni plating layer and the Au plating layer around the Cu plating layer by this method, the second photoresist layer (second PR) was removed (G of FIG. 2), and the seed metal layer exposed on the surface of the substrate by wet etching. After the removal, the undercut of the thin film metal conductive line pattern does not occur by the Ni plating layer surrounding the Cu plating layer (h of FIG. 2).
즉, 본 발명에 따르면 시드 금속층의 Cu 에칭시 전기도금된 주 금속층의 Cu 도금층이 Cu 에칭 용액에 노출되지 않으므로, 주 금속층은 물론 상기 주 금속층의 바로 밑에 있는 시드 금속층의 Cu 층의 언더 컷 현상이 효과적으로 방지된다.That is, according to the present invention, since the Cu plating layer of the electroplated main metal layer is not exposed to the Cu etching solution during Cu etching of the seed metal layer, the undercut phenomenon of the Cu layer of the seed metal layer as well as the main metal layer directly below the main metal layer is prevented. Effectively prevented.
다음에 본 발명에 따른 제2 실시예를 도 3에 따라 설명한다.Next, a second embodiment according to the present invention will be described with reference to FIG.
도 3에 도시된 바와 같이, 본 발명에 따른 박막 금속 전도선의 형성 방법은 기판상에 무전해 도금, CVD(Chemical Vapor Deposition) 또는 PVD(Physical Vapor Deposition) 방식에 의해 Ti, Pd, Cu 층을 순차적으로 형성하여 시드 금속층을 형성시킨다(도 3의 a).As shown in FIG. 3, the method of forming the thin film metal conductive line according to the present invention sequentially forms Ti, Pd, and Cu layers by electroless plating, chemical vapor deposition (CVD) or physical vapor deposition (PVD) on a substrate. To form a seed metal layer (FIG. 3A).
상기 시드 금속층 표면에 감광성의 포토레지스트 필름을 도포하고 노광 및 현상 공정을 거쳐 포토레지스트층(PR)을 형성하고, 주 금속층 패턴에 해당하는 부분의 포토레지스트 필름을 제거한다(도 3의 b). A photosensitive photoresist film is coated on the seed metal layer surface, a photoresist layer PR is formed through an exposure and development process, and a photoresist film of a portion corresponding to the main metal layer pattern is removed (b of FIG. 3).
그 후, 상기 포토레지스트층(PR)을 마스크로 하여 주 금속층으로서 Cu, Ni, Au를 각각 도금하여 Cu 도금층, Ni 도금층과 Au 도금층을 형성한다(도 3의 c).Thereafter, Cu, Ni, and Au are plated as main metal layers, respectively, using the photoresist layer PR as a mask to form a Cu plating layer, a Ni plating layer, and an Au plating layer (Fig. 3C).
이후, 포토레지스트층(PR)을 제거하고 습식 에칭 대신에 이온빔 처리(Ion Implantation) 방법으로 기판 표면에 노출된 시드 금속층을 제거하면, 박막 금속 전도선의 언더 컷은 일어 나지 않게 된다(도 3의 d).Subsequently, when the photoresist layer PR is removed and the seed metal layer exposed on the surface of the substrate is removed by ion implantation instead of wet etching, the undercut of the thin film metal conductive line does not occur (d in FIG. 3D). ).
상기 이온 빔 처리 방법에서는 Cu, Pd, Ti 혹은 Al, Au 등과 같은 시드 금속 층을 에칭할 때, 에칭하고자 하는 물질에 따라서 수소, 헬륨, 질소, 아르곤, 제논 등의 가스(기체 상태 및 이온 상태)를 사용할 수 있다. In the ion beam treatment method, when etching a seed metal layer such as Cu, Pd, Ti, or Al, Au, etc., gases such as hydrogen, helium, nitrogen, argon, xenon, etc., depending on the material to be etched (gas state and ionic state) Can be used.
즉, 상기 가스(기체 상태 및 이온 상태)의 이온빔을 금속에 따라서 최대 가속 에너지 10KeV ~ 70KeV로 가속하여 이온 스퍼터 플라즈마(Ion Sputtering Plasma) 방식으로 Cu, Pd, Ti 혹은 Al, Au 등의 금속을 동시에 에칭하므로, 언더 컷 발생을 억제할 수 있다. That is, the ion beam of the gas (gas state and ion state) is accelerated to a maximum acceleration energy of 10KeV to 70KeV depending on the metal, and simultaneously a metal such as Cu, Pd, Ti or Al, Au, etc. is used in an ion sputtering plasma method. Since etching is performed, undercut generation can be suppressed.
따라서 제2 실시예의 방식은 초고주파 응용 기판을 제조하는데 효과적이다. 또한 상기 제2 실시예의 기술을 적용할 경우, 고정밀의 전도선 기판의 공정 작업 시간 및 공정 프로세스(Process)의 수를 효과적으로 줄일 수 있는 장점이 있다.Therefore, the scheme of the second embodiment is effective for manufacturing a microwave application board. In addition, when applying the technique of the second embodiment, there is an advantage that can effectively reduce the process operation time and the number of process (Process) of the high-precision conductive substrate.
상술한 바와 같이, 본 발명에 따른 박막 금속 전도선의 형성 방법에 의하면, 프로브 카드용 기판 또는 이동통신 부품으로 사용되는 다층 배선 기판과 같은 고정밀 회로를 형성하는 고밀도 기판 제조시, Cu 도금층의 상면, Cu 도금층과 제2 포토레지스트층(제2 PR) 사이에 Ni, Au를 각각 도금함으로써 박막 금속 전도선의 언더 컷 현상을 방지할 수 있다는 효과가 얻어진다. As described above, according to the method for forming the thin film metal conductive line according to the present invention, the upper surface of the Cu plating layer, Cu in the production of a high-density substrate for forming a high-precision circuit such as a substrate for a probe card or a multilayer wiring board used as a mobile communication component By plating Ni and Au, respectively, between the plating layer and the second photoresist layer (second PR), an effect that the undercut phenomenon of the thin film metal conductive line can be prevented can be obtained.
또 본 발명에 따른 박막 금속 전도선의 형성 방법에 의하면, 주 금속층과 시드 금속층을 이온빔 처리 공정으로 처리함으로써 초고주파수 기판에서 요구하는 초정밀 전도선 구조를 용이하게 제작할 수 있다는 효과도 얻어진다.In addition, according to the method for forming a thin film metal conductive line according to the present invention, the effect of being able to easily manufacture the ultra-precision conductive wire structure required for an ultrahigh frequency substrate by treating the main metal layer and the seed metal layer by an ion beam treatment step.

Claims (6)

  1. 기판 표면에 시드 금속층을 형성하는 단계;Forming a seed metal layer on the substrate surface;
    상기 시드 금속층 표면에 제1 포토레지스트층을 형성하고 주 금속층 패턴에 해당하는 부분의 포토레지스트 필름을 제거하는 단계;Forming a first photoresist layer on the seed metal layer surface and removing a photoresist film of a portion corresponding to a main metal layer pattern;
    상기 제1 포토레지스트층을 마스크로 하여 Cu 도금층을 형성하는 단계;Forming a Cu plating layer using the first photoresist layer as a mask;
    상기 제1 포토레지스트층을 제거한 후 상기 Cu 도금층과 간격을 두고 제2 포토레지스트층을 형성하는 단계; Removing the first photoresist layer and forming a second photoresist layer at intervals from the Cu plating layer;
    상기 제2 포토레지스트층을 마스크로 하여 상기 Cu 도금층을 에워싸는 Ni 도금층과 Au 도금층을 형성하는 단계;Forming a Ni plating layer and an Au plating layer surrounding the Cu plating layer using the second photoresist layer as a mask;
    상기 제2 포토레지스트층을 제거하고 상기 시드 금속층의 노출되는 부위를 제거하기 위해 에칭하는 단계를 포함하는 것을 특징으로 하는 박막 금속 전도선의 형성 방법.Etching to remove the second photoresist layer and to remove exposed portions of the seed metal layer.
  2. 제1항에 있어서, The method of claim 1,
    상기 에칭하는 단계는 습식 에칭에 의해 실행되는 것을 특징으로 하는 박막 금속 전도선의 형성 방법.And said etching is performed by wet etching.
  3. 제1항 또는 제2항에 있어서, The method according to claim 1 or 2,
    상기 기판은 프로브 카드용 기판 또는 이동통신 부품으로 사용되는 다층 배선 기판인 것을 특징으로 하는 박막 금속 전도선의 형성 방법.The substrate is a method for forming a thin film metal conductive line, characterized in that the substrate for the probe card or a multi-layer wiring board used as a mobile communication component.
  4. 제3항에 있어서,The method of claim 3,
    상기 Cu 도금층과 제2 포토레지스트층 사이의 간격은 0.1~2㎛인 것을 특징으로 하는 박막 금속 전도선의 형성 방법.The spacing between the Cu plating layer and the second photoresist layer is a method of forming a thin film metal conductive line, characterized in that 0.1 ~ 2㎛.
  5. 기판 표면에 시드 금속층을 형성하는 단계;Forming a seed metal layer on the substrate surface;
    상기 시드 금속층 표면에 포토레지스트층을 형성하고 주 금속층 패턴에 해당하는 부분의 포토레지스트 필름을 제거하는 단계;Forming a photoresist layer on the seed metal layer surface and removing a photoresist film of a portion corresponding to a main metal layer pattern;
    상기 포토레지스트 층을 마스크로 하여 상기 주 금속층을 형성하는 단계;Forming the main metal layer using the photoresist layer as a mask;
    상기 포토레지스트층을 제거한 후 상기 시드 금속층의 노출되는 부위를 제거하는 단계를 포함하며,Removing the exposed portion of the seed metal layer after removing the photoresist layer,
    상기 제거하는 단계는 이온 빔 처리에 의해 실행되는 것을 특징으로 하는 박막 금속 전도선의 형성 방법.And said removing step is performed by ion beam treatment.
  6. 제5항에 있어서, The method of claim 5,
    상기 이온 빔 처리는 이온 스퍼터 플라즈마(Ion Sputtering Plasma) 방식인 것을 특징으로 하는 박막 금속 전도선의 형성 방법.The ion beam treatment is a method of forming a thin film metal conductive line, characterized in that the ion sputtering plasma (Ion Sputtering Plasma) method.
PCT/KR2009/003017 2009-06-05 2009-06-05 Method for forming a thin film metal conductive line WO2010140725A1 (en)

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