WO2004090958A1

WO2004090958A1 - Method of producing a hybrid device and hybrid device

Info

Publication number: WO2004090958A1
Application number: PCT/EP2003/004696
Authority: WO
Inventors: Ian Cayrefourcq
Original assignee: S.O.I.Tec Silicon On Insulator Technologies
Priority date: 2003-04-10
Filing date: 2003-04-10
Publication date: 2004-10-21
Also published as: AU2003224143A1

Abstract

A silicone on insulator device (10) comprising electronical structures (18, 20, 22;46) is assembled with a second device, in particular an electro-optical device or a thermo-optical device (24, 50). The assembling is made in such a manner such as to place the electronical structures as close as possible to functional portions in the elecro-optical or thermo-optical device. After the assembling step, the substrate (12) of the semiconductor device is at least partially removed. Thereby, one obtains a very compact, highly integrated device (28, 44, 60) in which the electronical structures present in the semiconductor device can control functional structures in the electro-optical or thermo-optical device.

Description

Method of producing a hybrid device and hybrid device

Field of the invention and technological background :

The invention relates to a method of producing hybrid devices or devices of the type comprising two substrates each one having components, for example either electronic or electrical and/or optical (for example thermo-optical) components.

In many such hybrid devices, a functional part has to be controlled by a driver part. The functional part for example comprises an electro-optical or thermo-optical device, and the driver part comprises a semiconductor device with electronic components therein.

Thus one example of a device concerned by the invention comprises an electro-optical or thermo-optical device representing a functional part and a semiconductor device representing a driver part. The invention also concerns a hybrid device comprising two semiconductor devices, each having electronic components formed therein, in particular two SOI devices.

In the past, many attempts have been made to integrate these different parts on a single device, for instance a single chip. The monolithic approach, however, is not as ideal as thought : such an approach often requires compromising between two completely different technologies, for example technologies for semiconductor devices and technologies for electro-optical or thermo-optical devices.

Therefore, new attempts have been started from the completely opposite side. The two parts have been fabricated independently of each other and have been combined. For example, both devices have been plugged on a motherboard. To the advanced technologies of combining two different devices also pertain flip-chip bonding and wire-bonding. However, these technologies do not provide for a hybrid device in which both parts are assembled in an optimum manner.

The same problem arises when making a hybrid device comprising two substrates or two semiconductor devices each one having electronic components.

Summary of the invention :

It is therefore an object of the present invention to provide a method of producing a hybrid device, for example with a first part being a semiconductor part and a second part comprising an electro- optical and/or a thermo-optical part and/or an electronic part. Both parts are very reliably assembled in a compact manner, thereby yielding a highly integrated device.

To this end, the present invention provides a method of producing a hybrid device, comprising the steps of:

a) providing a first device or wafer comprising a semiconductor substrate covered with an insulating layer, which is itself covered with at least one semiconductor layer, wherein in the semiconductor layer, electronic structures are provided,

b) providing a second device or wafer, in particular an electrical or electronic or electro-optical or thermo-optical device,

c) aligning both devices or wafer with respect to each other, wherein the top surfaces of both devices are facing each other,

d) assembling both devices or wafer,

e) at least partially thinning the substrate of the first device or wafer. The first device or wafer can be of the SOI type, for example comprising a silicon substrate, a dielectric layer and a mono-crystalline silicon layer on top of it. It can also be a semiconductor on insulator structure, comprising a layer of semiconductor material (for example: SiGe, InP, AsGa), a dielectric or an insulator layer and a semiconductor substrate. It can also be a bulk semiconductor substrate of InP, or AsGa or Si.

Various methods of thinning the substrate can be used. Furthermore, the layered structure of the semiconductor on insulator device allows for a very compact, highly integrated hybrid device or wafer.

Since both the first device and the second device or wafer are fabricated independently prior to the assembling step, different technologies that might be incompatible can be used for their production, and therefore the quality of both devices or wafers can be very high. Compromises which have to be developed when the monolithic approach is used, are no longer necessary whilst at the same time, a device or wafer is obtained which is practically as highly integrated as a monolithic device.

According to preferred embodiments of the present method, a dielectric layer is deposited onto at least one of the devices or wafers prior to the aligning step. The dielectric layer aids in assembling the two devices or wafers because it provides for a better adhesion of the two layers. Typical dielectric materials are SiO₂, Si3N_4/ AI₂O3, diamond, HfO₂, ZrO₂, La₂O₃ , Y₂O₃ and Lil\lbO₃

According to one embodiment, the dielectric layer is covered with a multi-layer structure comprising more than one single semiconductor layer, possibly separated from each other by dielectric layers.

In other words, in order to provide for more complicated electronic structures, the first device or wafer can comprise a multilayer structure on top of the insulating layer. For example, it can include a sequence of alternating semiconductor and insulator layers with electronic structures in the semiconductor layers.

It is advisable to planarize at least one of the devices, and/or to activate the surface of at least one of the devices or wafers prior to the aligning (and to the assembling) step in order to provide for a better bonding. The planarization can be done either by chemical and mechanical methods or by purely chemical methods. The surface activation can include an RCA-like process, plasma activation etc. Thus the activated surfaces can be more easily bonded.

According to one embodiment, the step of thinning or at least partially removing the substrate is performed by chemical etchback grinding. Alternatively, mechanical grinding or polishing can be used.

A still further alternative is to split the substrate at a weak layer thereof. The weak layer can be a portion of the substrate into which atoms or ions have been implanted or into which a porous layer of semiconductor material is formed.

In a semiconductor or insulating device of the kind used in the method according to the present invention, the semiconductor layer is for example a layer of mono-crystalline silicon in which the electronic structures have been provided The insulating layer comprises silicon oxyde, and the substrate comprises silicon. The silicon oxyde is, for example, a result of an oxydation of the upper portion of the substrate.

The second device can comprise at least one of the elements in the group consisting of optical or microoptical elements, for example at least one optical waveguide, and/or at least one photodiode, and/or at least one laser (such as a vertical cavity surface emitting laser, VCSEL), and/or at least one liquid cristal display device and/or thermooptical elements. Alternatively or in addition, it can also comprise electronic components or elements. The second device can be for example of the same type as the first device, for example a SOI device.

It is a further object of the present invention to provide for a device comprising a functional (electro-optical or thermo-optical) part and a driver part.

According to the present invention, a hybrid device comprises an electro-optical or thermo-optical device and a layered semiconductor structure bonded thereto or on top thereof.

According to another aspect, a hybrid device according to the invention comprises a first and a second semiconductor device bonded on said first device, each comprising a layered semiconductor structure.

The hybrid device according to the present invention has the advantage that electronic structures can be provided in the layered semiconductor structure, and that a very compact device is obtained. The electronic structures (and/or devices) can be provided in a semiconductor layer on top of which an insulating layer can also be provided.

The semiconductor structure is advantageously attached to the second electro-optical device via a direct bonding. Thereby, the attachment is very reliable.

Brief description of the drawings :

These and other features, objects, and advantages of the present invention will become apparent upon consideration of the following detained description of the invention when read in conjunction with the drawing in which: - figures 1A-1G show steps of a method of producing a hybrid device according to a first embodiment of the present invention,

- figure 2A-2G show steps of a method of producing a hybrid device according to a second embodiment of the present invention,

- figures 3A-3D show steps of a method of producing a hybrid device according to a third embodiment of the present invention in which a multi-layer structure is placed on an electro-optical device, and

- figures 4A-4G show steps of a method of producing a hybrid device of a fourth embodiment of the present invention.

Detailled description of preferred embodiments :

The method according to a first embodiment of the present invention starts with a first device 10 comprising a first semiconductor (for example silicon) substrate 12, a dielectric area or layer 14 (for example an oxide layer and in particular a silicon oxide SiO2), and a thin film or layer 16 of a second semiconductor material (for example mono-crystalline silicon). The thickness of substrate 12 may range from several hundreds to several thousands of nm. Layer 14 may be as thick as a few tens of nm to a few thousands of nm. For example, it may range from 10 nm to 50 nm or to 80 nm or to 100 nm or to 250 nm or to 500 nm or to 5000 nm.

Dielectric or insulating layer 14 can be chosen from Siθ₂, Si₃N₄,

AI₂O₃ diamond or any other dielectric material, for example of the high-K type (such as disclosed in the MRS Bulletin, March 2002, Vol.27,

No3, "Alternative Gate Dielectris for Microelectronics"), or of the low-K type.

As an example the first device or wafer 10 is of the SOI type. One method for fabricating such a device is disclosed in EP-0 905 767

Al. Such a silicon on insulator device comprises a silicon substrate 12 with a buried insulating layer 14 (for example an oxide layer) on top thereof, which is covered with a layer 16 of mono-crystalline silicon. The second semiconductor material is not limited to silicon, but could also be another semiconductor material, for example SiGe.

Electronic structures or devices are provided in layer 16. Figure IB shows a transistor comprising a source 18, drain 20 and gate 22. The transistor is shown by way of example only and layer 16 could comprise more complicated electronic devices. The electronic structure may also comprise very simple devices such as resistors which can for example heat an electro-optical device in the final hybrid device.

A dielectric layer 22 can be deposited onto first device 10 with the electronic structures therein (figure 1C). The dielectric material can be SiO₂, Si₃N₄, AI₂O₃, LiNbO_3/ diamond or any other dielectric material such as of the high-K type. Any deposition process can be used, for example of the CVD type. Alternatively a plurality of dielectric layers is formed. Such layers may form part of the device itself (they form for example one or more waveguides) or they may combine different properties; for example one layer is a thermal barrier, and another one is a diffusion barrier.

The surface of the SOI device 10 or the surface of the dielectric layer 22 can be planarised, for example by using MCP (mechanical - chemical polishing) methods. The surface may be activated using an RCA (surface activation) - like process or plasma activation.

A second device 24 or wafer is also provided, as illustrated on figure ID. It can be an electro-optical or a thermo-optical device or even another electronic device, for example another device as the first one, in particular of the SOI type. Both first and second devices 10, 24 have to be attached to each other.

In order to perform said attachment the two parts 10 and 24 are precisely aligned with respect to each other. The firms Karl Suss or EVG provide equipments which allow a precision of +/- 1 μm. Then, they are assembled by a wafer-bonding technique or by adherent contact, for example by molecular adhesion. According to the material, a normal or a high temperature, and a low or a high pressure are used. With regard to these techniques, see Q.Y. Tong and U.Gδsele "Semiconductor wafer bonding" (Science and Technology), Wiley Interscience Publications. A low temperature process will be preferred for hybrid devices having a large mismatch between both coefficients of thermal expansion. Another example of bonding method is anodic bonding, performed under an electrostatic field with a glass interface from which alcaline elements migrate. Still another example is eutectic bonding. (Ces deux exemples sont its dέcrits dans Tong et Gosele?). The resulting assembled device is shown in figure IE.

Substrate 12 is then thinned or a portion of the substrate 12 is then detached so as to obtain the device shown in figure IF in which a thin layer 12' of the substrate 12 is still present. Thinning can be made by chemical etch-back grinding or by mechanical methods such as polishing. Oxide layer 14 is used as a stopper.

In a further step, the rest 12' of the substrate 12 is removed in a finishing step, which is for example a further polishing step. Contacts 26 can be provided by using methods such as for example etching (with help of a photo-resist mask) and subsequent deposition of a conducting material (figure IG). A power source can be connected to the device through said contacts 26.

Thereby, the hybrid device 28 shown in figure IG is obtained. As can be clearly seen, the electronic structures present in layer 16 are placed very close to electro-optical or thermo-optical device 24. They are separated only by the small dielectric layer 22 when said layer is present. A hybrid device is thus formed, avoiding flip-chip or wire bonding.

Alternatively or in addition to contacts 26, side contacts can be provided. In another variant, surface roughness of both substrate 12 and layer 14 is controlled so that a weak bonding results at the interface between both. A weak bonding at said interface may also result from a controlled bonding energy. A simple mechanical treatment at the step illustrated on figure le results in a simple debonding step. Such a weak bonding may also be made at the interface between layers 14 and 16 or within layer 14 itself.

In the above example, first device or wafer 10 is of the SOI type or of the semiconductor on insulator type. Alternatively, said first device or wafer 10 could also be a bulk semiconductor wafer, for example an InP, or AsGa or Si bulk substrate or wafer. Electronic structures or devices can be provided therein as already disclosed above in connection with figure IB. An insulating layer 22 can be formed therein as in figure 1C, and both devices 10 and 24 can then be assembled as on figure IE. The same thinning methods can then be used as disclosed above in connection with figure IF or as explained above and contacts can be made as on figure IG or as already explained above.

Figures 2A to 2G show steps of a method according to another embodiment of the present invention.

These steps are practically the same as those described with respect to figures 1A to IG. The only difference is that the step of removing the substrate is performed in a different manner.

First device 10' initially comprises a weak layer 30 (figure 2A). Such a weak layer can be produced by implantation of hydrogen or helium as it is described in US patent 5,374,564 and in the article "Why can Smart Cut® change the future of microelectronics ?" by A . Auberton Herve and Michel Bruel in International Journal of High Speed Electronics and Systems, volume 10, number 1 (2000), p.131 to 146. Alternatively, layer 30 can be a porous layer as described in EP-

0 849 788A2 or in the paper by K.Sataguchi et al. "ELTRAN by splitting porous Si Layers", Proceedings of the 9^th Int. Symp. On Silicon-on-

Insulator Tech. And Devices, 99 -3, The Electrochemical Society, Seattle, p.117 - 121, 1999.

Due to the presence of weak layer 30, substrate 12 can be easily removed (at least most of it) by using the Smart-Cut splitting technique such as described in the above-mentioned article by A.XAuberton-Herve et al.

One therefore obtains a rest portion or layer 12'. Finally a hybrid device 28' is obtained which is very similar to that shown in figure IG.

The electronic devices in the semiconductor structure need not necessarily be provided in a single semiconductor layer 16. Rather, a plurality of such layers can be provided in the initial first, semiconductor device. In other words, in a variant, other layers of semiconductor material, possibly including further semiconductor devices, may be added on top of layer 16, for example by adding further semiconductor layers as illustrated on figure 3A. On this figure a semiconductor device 10" comprises a silicon substrate 12, a first insulating layer 14, a layer 16 of mono-crystalline silicon with electronic devices therein, a second insulating layer 32, a second layer 34 of mono-crystalline silicon with electronic devices therein, a third insulating layer 36 and a third layer 38 of mono-crystalline silicone with electronic devices therein. Several layers of semiconductor material can also be stacked without any insulating layer 14, 32, 36 between each other. As an example, the initial device 10" shown in figure 3A comprises three layers which include electronic structures and/or devices connected via wirings 40.

The device 42 shown in figure 3A is assembled with a second device 24 as shown on figure 3B. Said second device is for example an electronic device, for example of the SOI type, or an electro-optical or a thermo-optical device. Assembling is performed in the same manner as described with respect to figures 1C to IE, and one obtains a combined device which is shown in figure 3C. Thereafter, the substrate 12 is removed in a manner analogous to that described with respect to figures IE and IF. Alternatively, a weak layer can be initially provided in substrate 42 and the removal can be performed in a manner analogous to that described with respect to figures 2E and 2F.

Once again, in the finishing step, the rests of the substrate 12 are removed, and wirings 42 are provided in a manner similar to that described with respect to figure IG. The resulting hybrid device 44 comprises a second device 24 onto which an alternating structure of mono-crystalline semiconductor layers with electronic structures and/or devices and dielectric layers is placed or onto which a plurality of crystalline semiconductor layers with electronic structures and/or devices is placed. The resulting hybrid device 44 is very compact and highly integrated.

Figure 4A to figure 4G show the method according to another embodiment of the present invention. Most of the steps are very similar to those described with respect to figures 1A to IG. One starts with a semiconductor device 10 similar to device 10 of figure 1A, for example a silicon on insulator device (figure 4A). An electronic device 46 such as a transistor or electrodes or heaters is/are made by using techniques such as successive steps of etching and/or use of photoresists, and/or deposition of wirings. Finally a dielectric layer 48 is formed thereon. The device shown in figure 4C is assembled with an optical wave-guide device 50 comprising a substrate 52 made of silicon or of any other type of semiconductor material or of an oxyde such as silicon dioxyde, and further comprising an optical wave-guide 54 and possibly a semiconductor top layer 56. The two devices shown on figure 4C and figure 4D are assembled in a manner analogous to that described with respect to figures 1C and ID, and one obtains the device shown in figure 4E. Thereafter, a portion of the semiconductor substrate 12 or the whole substrate 12 is removed such as to obtain the device shown on figure 4F. After the finishing step and etching of contacts 58, the device 60 shown on figure 4G is obtained.

As it is clearly visible, the optical wave-guide 54 is placed very close to the electronic device 46, and the behaviour of the optical wave-guide can be controlled by sending control signals via the wirings 58.

The above description relates to the use of silicon as semi- conductor material. Other semiconductor materials (for example SiGe, SiC, AsGa, InP, GaN) can be used instead of silicon, and other semiconductor materials than silicon can be used as substrate 12.

As already mentionned above in connection with figures 1A - IG, other structures can be used instead of the SOI structure disclosed on figures 1A, 2A, 3A, 4A. For example, a bulk semiconductor substrate could be used, the semiconductor material being for example chosen among InP, AsGa or Si. All other steps, like the formation of electronic structures or devices therein, and of an insulating layer on top of said substrate, the assembly with a second device, the thinning step and the formation of contacts can be performed in the same way as disclosed above in connection with any embodiment or variant.

Claims

1) A method of producing a hybrid device (28, 44, 60), comprising the steps of:

a) providing a first semiconductor device (10) including a semiconductor substrate (12) wherein electronic components (18, 20, 22, 46) are provided in said device,

b) providing a second device (24, 50),

c) aligning both devices with respect to each other, wherein the top surfaces of both devices are facing each other,

d) assembling both devices,

e) at least partially thinning the substrate (12) of the first semiconductor device (10).

2) The method according to claim 1 , further comprising the step of depositing a dielectric layer (22, 48) onto at least one of the devices (10;24, 50) prior to the aligning step.

3) The method according to claim 2, wherein a dielectric layer is deposited onto both devices (10; 24, 50) prior to the aligning step.

4) The method according to claim 2 or 3, wherein at least one dielectric layer comprises a multi-layer structure.

5) The method according to one of claims 1 to 4, further comprising the steps of planarizing at least one of the devices and/or activating the surface of at least one of the devices prior to the aligning step. 6) The method according to one of the preceding claims, wherein the step of thinning the substrate (12) is performed by chemical etch back grinding or by mechanical polishing.

7) The method according to one of claims 1 to 5, wherein the step of thinning the substrate (12) is performed by splitting the substrate (12) along a weak layer (30) thereof.

8) The method according to claim 7, wherein the weak layer (30) is a portion of the substrate (12) into which ions or atoms have been implanted.

9) The method of claim 8, wherein hydrogen ions or helium ions or a mixture of hydrogen and helium ions are implanted.

10) The method of claim 7, wherein the weak layer (30) is a layer of porous semiconductor material.

11) The method of any of claims 1 - 10, said first semiconductor device comprising a bulk substrate (12).

12) The method of any of claims 1 - 10, said first semiconductor device further comprising an insulating layer (14) on top of said substrate (12), said insulating layer being covered with at least one semiconductor layer (16; 16, 34, 38) in which said eletronic components are provided.

13) The method of any of claims 1 - 5, said first semiconductor device further comprising an insulating layer (14) on top of said substrate, said insulating layer being covered with at least one semiconductor layer (16; 16, 34, 38), a weak bonding being formed at the interface between said substrate and said insulating layer, or between said insulating layer and said semiconductor layer, or within said insulating layer, the step of at least partially thinning the substrate comprising a debonding step along said interface. 14) The method according to one of the claims 1 - 10, wherein said first device (42) comprises an insulating layer (14), a multi-layer structure on top of said insulating layer, said multi-layer structure including a sequence of insulator (32, 36) layers and/or alternating semiconductor (16, 34, 38) layers with electronic structures therein.

15) The method according to one of claims 12 to 14, wherein said insulating layer (14) is made of a material chosen from silicon nitride, diamond, sapphire, silicone dioxide, hafnium oxide, zirconium oxide, alumina, lanthanum oxide and yttrium oxide.

16) The method according to one of the preceding claims, wherein said substrate (12) comprises silicon or SiGe or SiC or AsGa or InP or GaN as a semiconductor material.

17) The method according to one of the preceding claims, wherein said second device (24, 50) is an electro-optical or a thermo- optical device.

18) The method according to one of claims 1 - 16, wherein said second device (24, 50) is an electronic device.

19) The method according to claim 18, wherein said second device comprises a semiconductor substrate, with an insulating layer on top thereof which is covered with at least one semiconductor layer (16; 16, 34, 38), wherein in the semiconductor layer, electronic components (18, 20, 22, 46) are provided.

20) The method according to any of claims 1 - 16 wherein said second device (24, 50) comprises at least one optical wave-guide (54), and/or at least one photodiode, and/or at least one laser, for example a vertical cavity surface emitting laser, and/or at least one liquid crystal display device.

21 ) The method according to any of claims 1 to 20, wherein both devices are assembled by direct-bonding. 22) The method according to any of claims 1 to 20, wherein both devices are assembled by anodic bonding.

23) A hybrid device (28, 44, 60) comprising:

- a first device comprising an optical and/or an electro-optical and/or a thermo-optical device and

- a second device comprising a layered semiconductor structure bonded on said first device.

24) A hybrid device according to claim 23, wherein said first device (24, 50) comprises at least one optical wave-guide (54), and/or at least one photodiode, and/or at least one laser, for example a vertical cavity surface emitting laser, and/or at least one liquid crystal display device.

25) A hybrid device comprising a first semiconductor device and a second semiconductor device bonded on said first device, each comprising a layered semiconductor structure.

26) The hybrid device according to claim 25, wherein said first semiconductor device comprises at least one semiconductor layer having electronic structures and/or electronic devices therein.

27) The hybrid device according to any of claims 23 - 26, wherein said second semiconductor structure comprises at least one semiconductor layer (16) having electronic structures and/or devices (18, 22, 46) therein.

28) The hybrid device according to any of claims 23 to 27, wherein said first and second devices are bonded together via a dielectric layer (22, 48). 29) The hybrid device according to any of claims 23 to 28, wherein said semiconductor structure further comprises an insulating or a dielectric layer (14) over said semiconductor layer.

30) The hybrid device according to one of the claims 23 to 29, wherein said layered semiconductor structure comprises a control portion which is adapted to control a functional portion provided in the first device.

31) The hybrid device according to one of the claims 23 to 30, wherein said first and second devices are bonded together by molecular adhesion.