TWI582561B - Integrated circuit,method,and system for avs master slave - Google Patents

Description

Adaptive voltage adjustment master-slave integrated circuit, method and system [Reciprocal reference of related applications]

The disclosure of the priority of the U.S. Provisional Application Serial No. 61/640,934, entitled AVS Master Slave, filed on May 1, 2012, is hereby incorporated by reference.

The present invention relates to an adaptive voltage adjustment master.

The purpose of the prior art description provided herein is to present a general background of the present invention. The work of the inventors, the work described in this prior art section, and the description of the prior art in the various applications are not expressly and not implicitly admitted to the prior art of the present invention.

The different electronic devices receive one or more supply voltages from the voltage regulator, wherein the voltage regulators are external to the electronic device. In one example, an integrated circuit (IC) chip receives a supply voltage from an external voltage regulator. The integrated circuit chip provides a feedback signal to the voltage regulator based on the supply voltage input to the integrated circuit chip. The voltage regulator adjusts the supply voltage to the integrated circuit chip based on the feedback signal.

One aspect of this disclosure provides an integrated circuit (IC). The integrated circuit includes an input interface and a controller. The input interface receives the input signal to provide information for controlling the supply voltage based on the performance characteristics of the other integrated circuit. The controller is based on a combination of the input signal and the performance characteristics of the integrated circuit to generate an output signal that controls the supply voltage.

In one embodiment, the input interface receives input signals in digital form. In one example, the input interface receives an input signal to control the supply voltage of the integrated circuit to meet performance requirements. The controller generates a digital output signal based on the performance characteristics of the integrated circuit and the input signal to control the supply voltage, and provides an output signal to the third integrated circuit.

According to one aspect of the disclosure, the controller includes a feedback voltage generator that generates a feedback voltage signal that controls the voltage regulator to regulate the supply voltage of the integrated circuit and other integrated circuits. In one embodiment, the integrated circuit includes an output interface, wherein the output interface is capable of outputting an output signal in digital form and capable of outputting an analog form of the feedback voltage.

In one example, the integrated circuit includes a rate indicator that generates a signal indicative of the rate of the integrated circuit, and the controller generates an output signal based on the input signal and a signal indicative of the rate of the integrated circuit.

One aspect of this disclosure provides a method. The method includes receiving an input signal from another integrated circuit by an integrated circuit. The input signal provides information on controlling the supply voltage based on the performance characteristics of other integrated circuits. In addition, the method includes generating an output signal based on a combination of input signals and performance characteristics of the integrated circuit.

One aspect of this disclosure provides a system. The system includes a voltage regulator that regulates the supply voltage of a plurality of integrated circuits. In addition, the system includes a first integrated circuit and a second integrated circuit, wherein the first integrated circuit outputs a first signal for controlling the supply voltage based on a performance characteristic of the first integrated circuit, and the second integrated circuit receives the first signal and A second signal for controlling the supply voltage is generated based on a combination of the first signal and the performance characteristics of the second integrated circuit.

[this invention]

100‧‧‧ system

110‧‧‧Voltage regulator

120‧‧‧ Circuit Blocks

121‧‧‧Functional circuit

125‧‧‧Performance Monitoring Module

127‧‧‧ rate indicating circuit

130‧‧‧Adaptive Voltage Adjustment (AVS) Module

139‧‧‧Control signal

140‧‧‧ Circuit Blocks

141‧‧‧Functional circuit

145‧‧‧Performance Monitoring Module

147‧‧‧ rate indicator

150‧‧‧Adaptive Voltage Adjustment (AVS) Module

160‧‧‧ Circuit Blocks

161‧‧‧Functional circuit

165‧‧‧Performance Monitoring Module

167‧‧‧ rate indicator

170‧‧‧Adaptive Voltage Adjustment (AVS) Module

190‧‧‧Communication channel

200‧‧‧ system

210‧‧‧Voltage regulator

220‧‧‧Integrated circuit chip

221‧‧‧ functional circuit

225‧‧‧Performance Monitoring Module

227‧‧‧ rate indicator

230‧‧‧Adaptive Voltage Adjustment (AVS) Module

231‧‧‧Compensation generator

232‧‧‧Feedback voltage generator

239‧‧‧ analog feedback signal

240‧‧‧Integrated circuit chip

241‧‧‧Functional circuit

245‧‧‧Performance Monitoring Module

247‧‧‧ rate indicator

250‧‧‧Adaptive Voltage Adjustment (AVS) Module

251‧‧‧Compensation generator

252‧‧‧Feedback voltage generator

260‧‧‧Integrated circuit chip

261‧‧‧ functional circuit

265‧‧‧Performance Monitoring Module

267‧‧‧ rate indicator

270‧‧‧Adaptive Voltage Adjustment (AVS) Module

271‧‧‧Compensation generator

272‧‧‧Feedback voltage generator

291‧‧‧ signal

292‧‧‧ Signal

293‧‧‧ signal

300‧‧‧Form

310‧‧‧ first column

320‧‧‧ second column

330‧‧‧ third column

400‧‧‧ system

410‧‧‧Voltage regulator

420‧‧‧Integrated circuit chip

421‧‧‧ functional circuit

425‧‧‧Performance Monitoring Module

427‧‧‧ rate indicator

430‧‧‧Adaptable voltage adjustment module

431‧‧‧Compensation generator

432‧‧‧Voltage generator

439‧‧‧Reward signal

440‧‧‧Integrated circuit chip

441‧‧‧ functional circuit

445‧‧‧Performance Monitoring Module

447‧‧‧ rate indicator

450‧‧‧Adaptable voltage adjustment module

451‧‧‧Compensation generator

452‧‧‧Voltage generator

460‧‧‧Integrated circuit chip

461‧‧‧ functional circuit

465‧‧‧Performance Monitoring Module

467‧‧‧ rate indicator

470‧‧‧Adaptable voltage adjustment module

471‧‧‧Compensation generator

472‧‧‧Voltage generator

491‧‧‧ Signal

492‧‧‧ signal

493‧‧‧ signal

500‧‧‧Form

510‧‧‧ first column

520‧‧‧ second column

530‧‧‧third column

540‧‧‧ fourth column

600‧‧‧ Process

AVS-IN‧‧‧ input pin

AVS-OUT‧‧‧ output pin

FEEDBACK/AVS-OUT‧‧‧ output pin

MASTER‧‧‧Master signal

The embodiment of the present invention is described in detail with reference to the accompanying drawings, wherein like reference numerals refer to like elements, and wherein: FIG. 1 is a block diagram showing a system example 100 in accordance with an embodiment of the present disclosure.

2 is a block diagram showing a detailed system example 200 according to an embodiment of the present disclosure. Figure.

FIG. 3 illustrates a table 300 for generating control signals in system 200 in accordance with an embodiment of the present disclosure.

4 is a block diagram of another detailed system example 400 in accordance with an embodiment of the present disclosure.

FIG. 5 illustrates a table 500 for configuring pins or pads in system 400 in accordance with an embodiment of the present disclosure.

FIG. 6 is a flow chart depicting a process instance 600 in accordance with an embodiment of the present disclosure.

1 is a block diagram of a system example 100 in accordance with an embodiment of the present disclosure. System 100 includes a plurality of circuit blocks 120, 140, and 160 and a voltage regulator 110, wherein voltage regulator 110 provides voltages for supply of circuit blocks 120, 140, and 160. In an embodiment, as shown in Figure 1, the components are coupled to each other. One of the circuit blocks, such as circuit block 120, is configured as a master of adaptive voltage scaling (AVS); and the remaining circuit blocks, such as circuit blocks 140 and 160, are configured for adaptive voltage regulation. Dependent (slave). The master and the slave communicate via the communication channel 190. The master provides control signals to voltage regulator 110 based on information gathered from circuit blocks 120, 140, and 160.

In the example of FIG. 1, each of circuit blocks 120, 140, and 160 includes an adaptive voltage adjustment (AVS) that is a controller to determine a voltage demand and generate a control signal indicative of a voltage demand, such as an announcement on February 5, 2013. U.S. Patent No. 8,370,654, incorporated herein by reference.

In particular, circuit block 120 includes functional circuit 121, sex The module 125 and the adaptive voltage adjustment (AVS) module 130 can be monitored. The functional circuit 121 can be any suitable functional circuit such as a central processing unit (CPU), logic circuits, memory circuits, amplifier circuits, analog/digital converters, digital/analog converters, and the like.

The performance monitoring module 125 monitors one or more parameters indicative of the performance characteristics of the functional circuit 121. In one embodiment, performance monitoring module 125 monitors the voltage of circuit block 120 during operation. In another embodiment, the performance monitoring module 125 monitors the rate of the circuit block 120. In the embodiment of FIG. 1, the performance monitoring module 125 includes a rate indicating circuit 127 that is suitable for generating parameters indicative of the circuit rate, such as U.S. Patent No. 8,354,857, issued Jan. 15, 2013, incorporated herein by reference. reference.

The adaptive voltage adjustment (AVS) module 130 is a master controlled adaptive voltage adjustment (AVD) module based on parameters monitored by the performance monitoring module 125 and the remaining circuit blocks 140 and 160 provided via the communication channel 190. Information to generate control signal 139. In one embodiment, the monitored parameter is a function of the supplied supply voltage that can indicate the voltage requirements of circuit block 120, such as voltage range, minimum voltage, and the like to meet performance requirements. In addition, the information of the remaining circuit blocks 140 and 160 indicates the voltage requirements of the remaining circuit blocks 140 and 160. Adaptive Voltage Scaling (AVS) 130 generates control signal 139 to combine the voltage requirements of circuit block 120 with the voltage requirements of the remaining circuit blocks 140 and 160. Control signal 139 is then provided to voltage regulator 110 to regulate the supply voltages provided to circuit blocks 120, 140, and 160.

The circuit block 140 includes a functional circuit 141, a performance monitoring module 145, and an adaptive voltage adjustment (AVS) module 150. The functional circuit 141 can be any suitable functional circuit and can be the same as or different from the functional circuit 121.

The performance monitoring module 145 monitors one or more parameters indicative of the performance characteristics of the functional circuit 141. In one embodiment, performance monitoring module 145 monitors the voltage of circuit block 140 during operation. In another embodiment, the performance monitoring module 145 monitors the circuit rate of the circuit block 140. For example, the performance monitoring module 145 measures the delay of one or more inverters and uses the delay Late is an indicator of the circuit rate in circuit block 140.

In the embodiment of FIG. 1, the adaptive voltage adjustment module 150 is a dependent adaptive voltage adjustment module that determines the voltage demand based on the parameters monitored by the performance monitoring module 145 and provides information to the host via the communication channel 190. An adaptive voltage adjustment module, such as an adaptive voltage adjustment module 130.

Similarly, circuit block 160 includes a functional circuit 161, a performance monitoring module 165, and an adaptive voltage adjustment (AVS) module 170. Functional circuit 161 can be any suitable functional circuit and can be the same or different than functional circuit 121/141.

The performance monitoring module 165 monitors one or more parameters indicative of the performance characteristics of the functional circuit 161. In one embodiment, performance monitoring module 165 monitors the voltage of circuit block 160 during operation. In another embodiment, the performance monitoring module 165 monitors the rate of the circuit block 160.

In the embodiment of FIG. 1, the adaptive voltage adjustment module 170 is a dependent adaptive voltage adjustment module that determines the voltage demand based on parameters monitored by the performance monitoring module 165 and provides information to the host via the communication channel 190. An adaptive voltage adjustment module, such as an adaptive voltage adjustment module 130.

The communication channel 190 transmits voltage demand information from the dependent adaptive voltage adjustment modules (eg, the adaptive voltage adjustment modules 150, 170) to the adaptive voltage adjustment module 130. Communication channel 190 has any suitable structure, such as a chain, a mesh, or the like.

In an embodiment, during operation, the dependent adaptive voltage adjustment modules 150 and 170 respectively generate information indicating the voltage requirements of the circuit blocks 140 and 160, and provide information to the main control adaptive voltage adjustment module via the communication channel 190. 130. The master adaptive voltage adjustment module 130 receives the information and combines the voltage requirements of the information and circuit block 120 to generate the control signal 139. Control signal 139 is then provided to voltage regulator 110 to regulate the supply voltages provided to circuit blocks 120, 140, and 160.

According to one aspect of the disclosure, the control signal 139 is generated by causing the supply voltage provided by the voltage regulator 110 to meet the worst-case voltage requirement. For example, it is approximately equal to or greater than the maximum voltage among the minimum required voltages of circuit blocks 120, 140, and 160. In one embodiment, the circuit blocks 120, 140, and 160 are implemented as integrated circuit (IC) wafers 120, 140, and 160. In one embodiment, integrated circuit wafers 120, 140, and 160 and voltage regulator 110 are combined on a printed circuit board (PCB) of system 100. The integrated circuit wafers 120, 140, and 160 can be fabricated in different process situations and can have different device parameters. Moreover, in operation, integrated circuit wafers 120, 140, and 160 can have a thermal thermal condition that affects the performance of individual integrated circuit wafers. For example, in a predetermined timing, the integrated circuit wafer 120 actively operates and generates a large amount of heat such that the temperature of the wafer rises while the integrated circuit wafer 140 is idle for a majority of the time and has a relatively low temperature; In another sequence, the integrated circuit die 140 actively operates and generates a significant amount of heat, causing the wafer temperature to rise, while the integrated circuit die 120 is idle for most of the time and has a relatively low temperature. In one embodiment, the control signal 139 is dynamically generated such that the supply voltage meets the minimum voltage requirement of the slowest of the integrated circuit wafers 120, 140, and 160 such that the integrated circuit wafers 120, 140, and 160 satisfy the system 100. Rate requirement. In one arrangement, control signal 139 ensures that all integrated circuit wafers 120, 140, and 160 meet the minimum rate requirements for all of the wafers. However, in another aspect, the control signal 139 ensures that the supply voltage does not exceed the upper limit resulting in one or more wafers exceeding the maximum rate parameter (eg, wafer over-leakage), such as the applicant's review of the application on December 28, 2010. U.S. Patent Application Serial No. 12/979,724, incorporated herein by reference.

In accordance with one aspect of the present disclosure, system 100 uses a single voltage regulator to dynamically provide a supply voltage based on the weakest wafer in the connection chain to meet the rate requirements of system 100, as compared to systems using multiple voltage regulators, the system 100 can be implemented to have reduced weight, reduced size, and reduced cost.

It should be noted that, in one embodiment, circuit blocks 120, 140, and 160 are implemented on integrated circuit wafers, and voltage regulator 110 can be implemented on the same integrated circuit wafer or external to the integrated circuit.

2 is a block diagram showing a detailed system example 200 in accordance with an embodiment of the present disclosure. System 200 includes integrated circuit wafers 220, 240, and 260, voltage regulator 210, and communication channels, wherein the communication channels are formed by conductor elements to transmit, for example, signals 291, 292, and 293. The function of these signals will be described in the following paragraphs. As shown in Figure 2, these components are coupled to each other.

System 200 operates similar to system 100 described above. System 200 also includes certain elements that are equivalent or equivalent to those used in system 100; the description of these elements has been provided above and is omitted here for brevity.

In the embodiment of FIG. 2, adaptive voltage adjustment (AVS) modules 230, 250, and 270 are coupled to one another in a chain configuration. In particular, each adaptive voltage adjustment module is similarly configured to include a compensation generator and a feedback voltage generator. For example, the adaptive voltage adjustment module 230 includes a compensation generator 231 and a feedback voltage generator 232; the adaptive voltage adjustment module 250 includes a compensation generator 251 and a feedback voltage generator 252; and an adaptive voltage adjustment module 270 A compensation generator 271 and a feedback voltage generator 272 are included.

In one embodiment, the compensation generators 231, 251, and 271 operate in the digital domain to process voltage demand information and generate voltage compensation indicative of better voltage regulation, and the feedback voltage generators 232, 252, and 272 are combined with voltage compensation and The received voltage is used to generate a feedback signal in the form of an analog signal. It should be noted that in another embodiment, the adaptive voltage adjustment modules 230, 250, and 270 generate feedback signals in the form of digital signals.

In addition, the adaptive voltage adjustment modules 230, 250, and 270 are coupled to each other by a communication chain to generate a feedback signal 239 based on the voltage requirements of the integrated circuit chips 220, 240, and 260. The feedback signal 239 is provided to the voltage regulator 210 to regulate the supply voltages of the circuit blocks 220, 240, and 260.

In particular, in the embodiment of FIG. 2, the compensation generator 271 receives the value of the parameter monitored by the performance monitoring module 265, determines the voltage demand of the circuit block 260, and generates a signal 292 indicating the voltage demand. It should be noted that, in an embodiment, the compensation generator 271 receives a signal 293 indicating a voltage demand from a circuit block (not shown) below the chain, and the compensation generator 271 can be based. The value of the parameter monitored by the performance monitoring module 265 and the signal 293 gradually determine the voltage demand. In one embodiment, signal 293 and signal 292 are digital signals indicative of voltage requirements. The compensation generator 271 uses digital signal processing techniques to process the signal 293 and generate a signal 292.

In addition, the compensation generator 251 receives the value of the parameter monitored from the performance monitoring module 245 and the signal 292 indicating the accumulated voltage demand below the chain. The compensation generator 251 cumulatively determines the voltage demand based on the value of the parameter monitored by the performance monitoring module 245 and the signal 292, and generates a signal 291, wherein the signal 291 indicates that the function circuit 241 and the function circuit 261 meet the performance requirements (eg, rate). Demand, leakage demand and similar) required voltage requirements. In one embodiment, the compensation generator 251 uses digital signal processing techniques to process the value of the signal 292 and the monitored parameters and generate a signal 291.

The compensation generator 231 receives the value of the parameter monitored from the performance monitoring module 225 and the signal 291 indicating the accumulated voltage demand below the chain. The compensation generator 231 cumulatively determines the voltage demand based on the value of the parameter monitored by the performance monitoring module 225 and the signal 291, and generates voltage compensation. The voltage compensation is provided to the feedback voltage generator 232. The feedback voltage generator 232 combines the voltage compensation and the voltage received by the integrated circuit die 220 to generate a feedback signal 239. The feedback signal 239 is provided to the voltage regulator 210 to regulate the supply voltages of the integrated circuit wafers 220, 240, and 260. In an embodiment, the feedback signal is an analog signal. In another embodiment, the adaptive voltage adjustment module 230 suitably configures the feedback signal 239 to be a digital signal.

In accordance with one aspect of the present disclosure, the implementation of the adaptive voltage adjustment modules 230, 250, and 270 is based on an adaptive voltage adjustment intellectual property (IP) block that includes a compensation generator and a feedback voltage generator. The compensation generator processes the signals and information of the digital domain to generate voltage compensation, and the feedback voltage generator 232 generates the feedback signal 239 based on the voltage compensation.

In addition, each adaptive voltage adjustment block includes an input pin (or pad) AVS-IN and an output pin (or pad) AVS-OUT. By properly coupling the input pins and output pins of the adaptive voltage adjustment modules 230, 250 and 270, The adaptive voltage adjustment modules 230, 250, and 270 form an adaptive voltage adjustment chain to generate the feedback signal 239. In the embodiment of FIG. 2, the output pin AVS-OUT of the adaptive voltage adjustment module 270 is coupled to the input pin AVS-IN of the adaptive voltage adjustment module 250 via any suitable conductor element, and is adaptable. The output pin AVS-OUT of the voltage adjustment module 250 is coupled to the input pin AVS-IN of the adaptive voltage adjustment module 230 via any suitable conductor element.

It should be noted that, in FIG. 2, each of the adaptive voltage adjustment modules 230, 250, and 270 also includes a feedback pin for outputting the feedback signal 239. The feedback pin of the adaptive voltage adjustment module 230 is coupled to the input pin of the voltage regulator 210. In this embodiment, the feedback pins of the adaptive voltage adjustment modules 250 and 270 are unused.

It is noted that in another implementation, the feedback voltage generators 252 and 272 are suitably removed and the feedback pins of the adaptive voltage adjustment modules 250 and 270 are suitably removed.

FIG. 3 illustrates a table 300 for generating a control signal in accordance with an embodiment of the present disclosure. In this embodiment, the table 300 is implemented in response to the daisy chain of the communication channel 190. In this embodiment, the table 300 is a truth table for implementing the logic circuit in the compensation generator in the adaptive voltage adjustment module, for example, the compensation generators 231, 251 of the adaptive voltage adjustment modules 230, 240, and 260. And 271. In particular, in one embodiment, the table 300 is used to determine whether to provide a signal to cause the voltage regulator to maintain the current supply voltage or to modify the supply voltage.

In particular, table 300 includes a first column 310, a second column 320, and a third column 330. In each column, the first column 310 contains the binary value AVS-IN received from the input pin; the second column 320 contains the binary value of the local indicator determined based on the value of the parameter monitored from the local performance monitoring module; The three columns 330 contain the binary values AVS-OUT output from the output pins as a function of the binary values of the first column 310 and the second column 320 in the same column. For example, the local indicator indicates the local voltage demand of the integrated circuit chip.

In the embodiment of Figure 3, the binary value "0" indicates that the current state is maintained. The supply voltage, and the binary value "1" indicates an increase in the supply voltage. The truth table 300 can be implemented using OR logic. Then, when both the local indicator and the input value AVS-IN indicate that the current supply voltage is maintained, the output value AVS-OUT indicates that the current supply voltage is maintained; otherwise, the output value AVS-OUT Indicates to increase the supply voltage.

It is worth noting that the binary values can be defined differently to indicate different voltage requirements, such as increasing the supply voltage, reducing the supply voltage, and the like. It is also worth noting that the binary value can contain more than one bit to define the voltage demand. In one embodiment, the binary value contains 2 bits to define 3 different voltage requirements, such as increasing the supply voltage, maintaining the supply voltage, and reducing the supply voltage. In another embodiment, the binary value comprises a plurality of bits to indicate an increase or decrease in the supply voltage for different gradients.

4 is a block diagram of another detailed system example 400 in accordance with an embodiment of the present disclosure. System 400 includes integrated circuit chips 420, 440, and 460, a voltage regulator 410, and a communication channel, wherein the communication channel is formed by conductor elements to pass signals 491, 492, and 493. As shown in FIG. 4, the components are coupled to each other.

System 400 operates similar to system 200 described above. System 400 also includes certain elements that are equivalent or equivalent to those used in system 200; the description of these elements has been provided above and is omitted here for brevity.

In the embodiment of FIG. 4, the adaptive voltage adjustment modules 430, 450, and 470 are implemented based on an adaptive voltage adjustment intelligence block having a reduced pin. For example, each adaptive voltage adjustment module includes an input pin AVS-IN and an output pin FEEDBACK/AVS-OUT. As shown, each of the output pins FEEDBACK/AVS-OUT is coupled to the individual voltage generators 472, 452, and 432 to combine the voltage compensation and the received voltage to generate a feedback signal. The adaptive voltage adjustment modules 430, 450, and 470 form an adaptive voltage adjustment chain by appropriately coupling the input and output pins of the adaptive voltage adjustment modules 430, 450, and 470. In the embodiment of FIG. 4, the output pin FEEDBACK/AVS-OUT of the adaptive voltage adjustment module 470 is coupled to the input pin AVS-IN of the adaptive voltage adjustment module 450 via any suitable conductor element; Electricity The output pin FEEDBACK/AVS-OUT of the voltage adjustment module 450 is coupled to the input pin AVS-IN of the adaptive voltage adjustment module 430 via any suitable conductor element; the output pin of the adaptive voltage adjustment module 430 The FEEDBACK/AVS-OUT is coupled to the feedback pin of the voltage regulator 410.

In addition, the adaptive voltage adjustment block can use the output pin FEEDBACK/AVS-OUT as a digital pin to output the digital signal AVS-OUT or as an analog pin to output the feedback signal 439. In the embodiment of FIG. 4, the adaptive voltage adjustment modules 430, 450, and 470 each receive the master signal MASTER, and configure the output pins based on the master signal MASTER. For example, when the logic of the master signal MASTER is "1" (for example, in the case of the adaptive voltage adjustment module 430), the output pin is configured as an analog pin to output a feedback signal 439; when the master signal MASTER When the logic is 0 (for example, in the case of adaptive voltage adjustment modules 450 and 470), the output pin is configured as a digital pin to output a digital signal AVS-OUT. When the output pin is configured as a digital pin and the feedback signal 439 is digital, for example, in the compensation generators 451 and 471, an optional bypass circuit (not shown) is established to bypass the feedback signal 439. The feedback voltage generators 452 and 472. However, when the output pin is configured as an analog pin and the feedback signal 439 is analogous, such as in the compensation generator 431, the optional bypass circuit is not asserted to provide a feedback signal to the feedback voltage generator. In one embodiment, when the logic of the master signal MASTER for the adaptive voltage adjustment modules 450 and 470 is "0", the feedback voltage generators 452 and 472 are bypassed.

In one embodiment, the master signal MASTER is a static input signal and can be latched in the integrated circuit chip when the power is turned on.

FIG. 5 illustrates a table 500 for configuring a pin or pad in accordance with an embodiment of the present disclosure. The table 500 includes a first column 510, a second column 520, a third column 530, and a fourth column 540. In each column, the first column 510 contains the binary value received by the autonomous control signal MASTER; the second column 520 contains the binary value AVS-IN received from the input pin; the third column 530 indicates the self-output pin or pad. Output signal FEEDBACK/AVS-OUT; and fourth column 540 indicates an output pin or The form of the mat.

In the embodiment of FIG. 5, when the binary value of the master signal MASTER is "0", the output pin (or pad) outputs the digital output AVS-OUT. The digital output AVS-OUT depends on the local indicator and the input value AVS-IN. When the binary value of the master signal MASTER is "1", the output pin (or pad) outputs an analog feedback signal, and the analog signal is generated based on the local indicator and the input value AVS-IN.

FIG. 6 is a flow chart depicting a process instance 600 in accordance with an embodiment of the present disclosure. In this embodiment, the process 600 can be performed by an adaptive voltage adjustment module, such as each of the adaptive voltage adjustment modules 430, 450, and 470. The flow starts at S601 and proceeds to S610.

In S610, the adaptive voltage adjustment module receives the input signal AVS-IN from the input pin. The input signal AVS-IN indicates the cumulative voltage demand of the adaptive voltage adjustment module below the chain.

In S620, the adaptive voltage adjustment module combines information from the input signal AVS-IN with local indicators and generates a digital signal AVS-OUT. Therefore, the digital signal AVS-OUT indicates the cumulative voltage demand of the adaptive voltage adjustment module and the adaptive voltage adjustment module below the chain.

In S630, the adaptive voltage adjustment module is based on the main control signal MASTER shunt operation. When the logic of the master signal MASTER is "0", the flow proceeds to S640; otherwise, the flow proceeds to S650.

In S640, the output pin is configured as a digital pin to output a digital signal AVS-OUT. The flow then proceeds to S699 and terminates.

In S650, the adaptive voltage adjustment module module generates an analog feedback signal that controls the supply voltage.

In S660, the output pin is configured as an analog pin to output an analog feedback signal. In an embodiment, the analog feedback signal is provided to a voltage regulator to control the supply voltage. The flow then proceeds to S699 and terminates.

The aspects of the present disclosure have been described in connection with the specific embodiments, and the specific embodiments are set forth as examples, alternatives, modifications, and variations. Therefore, the embodiments listed herein mean Ming and not limit. Modifications may be made without violating the following claims.

110‧‧‧Voltage regulator

120‧‧‧ Circuit Blocks

121‧‧‧Functional circuit

125‧‧‧Performance Monitoring Module

127‧‧‧ rate indicating circuit

130‧‧‧Adaptable voltage adjustment

139‧‧‧Control signal

140‧‧‧ Circuit Blocks

141‧‧‧Functional circuit

145‧‧‧Performance Monitoring Module

147‧‧‧ rate indicator

150‧‧‧Adaptability voltage adjustment

160‧‧‧ Circuit Blocks

161‧‧‧Functional circuit

165‧‧‧Performance Monitoring Module

167‧‧‧ rate indicator

170‧‧‧Adaptability voltage adjustment

190‧‧‧Communication channel

Claims (18)

An integrated circuit comprising: an input interface for receiving an input signal, wherein the input signal provides information for controlling a supply voltage based on a performance characteristic of another integrated circuit; a controller based on the input signal and the integrated body a combination of one of the performance characteristics of the circuit to generate an output signal that controls the supply voltage; and a rate indicator to generate a signal indicative of a rate of the integrated circuit; wherein the controller is based on the input signal and the indication The signal at the rate of the body circuit produces the output signal. The circuit of claim 1, wherein the input interface receives the input signal in digital form. The circuit of claim 1, wherein the controller generates the output signal in a digital form of the control supply voltage based on the performance characteristic of the integrated circuit and the input signal, and provides the output signal to a further integrated circuit. The circuit of claim 1, wherein the input interface receives the input signal to control the supply voltage of the other integrated circuits to meet a performance requirement. The circuit of claim 1, wherein the controller further comprises: a feedback voltage generator that generates a feedback voltage signal to control a voltage regulator to adjust the supply voltage of the integrated circuit and the other integrated circuit. The circuit of claim 5, further comprising: an output interface, the output signal in the form of a digital digit and one of the feedback signals in an analog form. A method for adaptive voltage adjustment master-slave, comprising: Receiving an input signal from another integrated circuit by an integrated circuit, the input signal providing information based on a performance characteristic of the other integrated circuit to control a supply voltage; based on the input signal and one of the integrated circuits Combining performance characteristics to generate an output signal; generating a signal indicative of the rate of the integrated circuit; and generating the output signal based on the input signal and the signal indicative of the rate of the integrated circuit. The method of claim 7, wherein the receiving the input signal from the other integrated circuit by the integrated circuit further comprises: receiving the input signal in the form of a digit. The method of claim 7, wherein the generating the output signal based on the input signal and the performance characteristic of the integrated circuit further comprises: generating the output signal in a digital form; and transmitting the output signal to a further integrated circuit. The method of claim 7, wherein the receiving the input signal from the other integrated circuit by the integrated circuit further comprises: receiving the input signal to control a supply voltage of the other integrated circuit to meet a performance requirement. . The method of claim 7, further comprising: generating a feedback voltage signal to control a voltage regulator to adjust the supply voltage of the integrated circuit and the other integrated circuit. The method of claim 11, further comprising at least one of the following steps: Configuring an output interface to output the output signal in the form of a digit; and configuring the output interface to output the analog voltage signal in an analog form. An adaptive voltage-adjusting master-slave system includes: a voltage regulator that regulates a supply voltage of one of the plurality of integrated circuits; and a first integrated circuit that outputs the control based on a performance characteristic of the first integrated circuit a first signal of a voltage; a second integrated circuit receiving the first signal and generating a second signal for controlling the supply voltage based on a combination of the first signal and a performance characteristic of the second integrated circuit; a rate indicator generating a third signal indicating a rate of the first integrated circuit; wherein the second integrated circuit is based on the first signal and the third signal indicating the rate of the first integrated circuit The second signal is generated. The system of claim 13, wherein the second integrated circuit receives the input signal in digital form. The system of claim 13, wherein the second integrated circuit generates the output signal in a digital form that controls the supply voltage based on the input characteristic and the performance characteristic of the second integrated circuit, and provides the output signal to A third integrated circuit. The system of claim 13, wherein an input interface of the first integrated circuit receives the input signal to control the supply voltage of a further integrated circuit to meet a performance requirement. The system of claim 13, wherein the second integrated circuit comprises: A feedback voltage generator generates a feedback voltage signal to control a voltage regulator to adjust the supply voltage of the first integrated circuit and the second integrated circuit. The system of claim 17, wherein the second integrated circuit further comprises: an output interface, the output signal in the form of a digital digit and one of the feedback voltage signals in an analog form.