TWI405127B - Methods for managing id information of a chip - Google Patents

Abstract

A method for managing ID information of a chip. The method provides a readable/writable buffer in the chip, and provides an idle space as a chip information space in a basic I/O system (BIOS) memory. The method further stores ID information of the chip in the readable/writable buffer and, in the meantime, calls a first software system management interrupt (SMI). Triggered by the first software SMI, the BIOS firmware copies the content stored in the readable/writable buffer and reproduces it in the chip information space of the BIOS memory. Thus, before using the chip, the ID information of the chip can be restored based on the data stored in the chip information space of the BIOS memory.

Description

Management method of wafer identity information

The present invention relates to a method of storing and loading wafer identity (ID) information.

A typical network chip (such as a local area network (LAN) chip) or a transport interface chip (such as a 1394 chip) has its own unique identity (ID) information. Taking a LAN chip as an example, the identity information may be: physical address (PHY ID), physical address (MAC address), manufacturer information (vendor ID), and the like. Conventional techniques typically have a non-volatile memory configured for each wafer, for example, a programmable read-only memory (EEPROM) can be erased to store the identity information for each wafer. When the system is powered down, the identity information is stored in the corresponding non-volatile memory. After the system is powered on, the identity information is loaded from the non-volatile memory into the feature registers in each chip, so that the chips can provide their own identity information during operation.

FIG. 1 shows a method of storing and loading information about each wafer identity by a conventional motherboard 100 as an example. The motherboard 100 has a plurality of non-volatile memories, including, for example, an EEPROM 108 disposed for a LAN wafer 106 and an EEPROM 112 configured for a 1394 wafer 110. Even if there are other chips on the motherboard 100 that require identity information, the number of EEPROMs installed on the motherboard 100 will be more.

Taking LAN chip 106 as an example, LAN chip 106 includes a feature register 114 and provides an EEPROM access interface 116. The LAN driver/tool module 118 corresponding to the LAN chip 106 stores the identity information of the LAN chip 106 through the EEPROM access interface 116 to the EEPROM 108 dedicated to the LAN chip 106 when the motherboard 100 is shipped (such as an arrow). 120 and 122). After the motherboard 100 is powered up, the EEPROM access interface 116 reads the EEPROM 108 to obtain the identity information of the LAN wafer 106 (shown by arrow 124), and then loads the read content into the feature register 114 ( As indicated by arrow 126). Based on the values in the feature register 114, the active LAN chip 106 can provide its own identity information at any time.

Similarly, the storage and loading of 1394 wafer 110 identity information is also implemented in a similar technique. As indicated by the portion of the arrow in the figure, the identity information of the 1394 chip is stored by the 1394 driver/tool module 128 via the EEPROM access interface 130 to the EEPROM 112 of the dedicated 1394 chip 110. When the motherboard 100 is powered on, the EEPROM access interface 130 reads the EEPROM 112 to obtain the identity information of the 1394 chip, and loads it into the feature register 132 of the 1394 chip 110, so that the working 1394 chip 110 can be provided at any time. Its own identity information.

Observing the technique of FIG. 1, it can be found that the conventional motherboard 100 not only has to configure its own EEPROM (such as 108, 112) for its upper chips (such as 106, 110), and these chips (106, 110) must also be designed with EEPROM storage. The interface (such as 116, 130) is not only complicated in structure, but also costly.

The invention discloses a method for managing wafer identity information.

In one embodiment, the method includes: providing a readable and writable buffer for a chip; causing a BIOS memory to provide a wafer information storage space; and inputting the identity information of the chip to the readable and writable buffer of the chip; And calling a first system management interrupt to drive a BIOS firmware to copy the contents of the readable and writable buffer of the chip to the chip information storage space of the BIOS memory for subsequent use of the wafer The identity information is loaded inside the wafer.

In another embodiment, the method for managing the wafer identity information disclosed in the present disclosure includes: providing a readable and writable buffer for a chip; and causing a BIOS memory to provide a wafer information storage space for storing identity information of the wafer; And copying, by a BIOS firmware, the content of the chip information storage space of the BIOS memory to the readable and writable buffer of the chip, and filling the inside of the chip via the readable and writable buffer.

A number of embodiments and related illustrations are listed below to aid in understanding the invention.

The following content includes various embodiments of the invention, and is not intended to limit the scope of the invention. The actual scope of the invention should still be based on the description of the scope of the patent application.

The present invention discloses a technique for storing and loading wafer identity information. FIG. 2 illustrates a implementation architecture of the technology by taking a motherboard 200 as an example. The motherboard 200 includes a basic input/output system (BIOS) memory 204 (such as a BIOS ROM) and a plurality of wafers (LAN chip 206, 1394 wafer 210 shown). In addition to the image file 202 in which the BIOS firmware is recorded on the BIOS memory 204, the remaining free space is more planned as a "wafer information storage space" - for example, the LAN information storage space 240 planned for the LAN chip 206, or for the 1394 wafer 210 The planned 1394 information storage space 242, whether it is the LAN information storage space 240 or the 1394 information storage space 242, is a protected specific address space, which is not covered by the image file 202 of the BIOS firmware. In addition, the LAN chip 206 includes a readable and writable buffer 244 in addition to the feature register 214 disclosed in the prior art; and the 1394 chip 210 includes a readable register 232 disclosed in the prior art, and includes a readable Write buffer 246. 2 further shows a chip driver/tool module corresponding to each chip on the motherboard - a LAN driver/tool module 218 corresponding to the LAN chip 206, and a 1394 driver/tool module 228 corresponding to the 1394 chip 210. . In addition, Figure 2 shows that the architecture of the present application is more applicable to the BIOS firmware 248. The image file of BIOS firmware 248 is the image file 202 stored in BIOS memory 204.

FIG. 2 shows the storage and loading flow of the identity information of each chip by solid arrows, and shows a first system management interrupt (SMI) call disclosed in the present invention by a dashed arrow. The first SMI is the present invention. A specific system management interrupt, its function is detailed as follows. Further, FIG. 2 distinguishes the related art of the LAN wafer 206 from the 1394 wafer 210 by the thick and thin arrows.

This section refers to the bold arrow section and discusses an example of a LAN wafer 206. When the identity information of the LAN chip 206 needs to be updated at or after the motherboard 200 is shipped from the factory, the LAN driver/tool module 218 fills the identity information of the LAN chip 206 into the readable and writable buffer 244 of the LAN chip 206, and The LAN driver/tool module 218 is caused to call a first SMI to trigger a BIOS firmware 248 action (e.g., dashed arrow 250). After the first SMI is triggered, the BIOS firmware 248 reads and copies the LAN chip identity information temporarily stored in the LAN chip 206 readable and writable buffer 244 to the LAN information storage space 240 of the BIOS memory 204 to be used by the BIOS memory. The identity information of the non-volatile storage LAN wafer 206 of 204. When the motherboard 200 is powered on normally, the BIOS firmware 248 reads and copies the LAN wafer identity information stored in the LAN data storage space 240 in the BIOS memory 204 to the readable and writable buffer of the LAN chip 206 in its booting program. The 244 is further filled into the LAN chip 206 from the readable and writable buffer 244. For example, the feature register 214 in the LAN chip 206 can be filled in, so that the LAN chip 206 can provide its own identity information at any time during operation.

A similar technique can also be applied to the 1394 wafer 210. As shown by the thin arrow in FIG. 2, when the identity information of the 1394 chip 210 needs to be updated before or after the motherboard 200 is shipped, the identity information of the 1394 chip 210 can be input and temporarily stored in the 1394 by the 1394 driver/tool module 228. The wafer 210 can be read and written in the buffer 246, and the 1394 driver/tool module 228 issues another 1394 chip identity information temporarily stored in the readable and writable buffer 246 by the 1394 driver/tool module 228 as indicated by the dashed arrow. The 1394 information storage space 242 in the BIOS memory 204 is read and copied, so that the motherboard 200 can retain the identity information of the 1394 wafer 210 even if the power is turned off. When the motherboard 200 is powered on normally, the BIOS firmware 248 reads the identity information of the 1394 chip from the 1394 information storage space 242 in the BIOS memory 204 and copies it to the 1394 chip 210 in the boot program that is implemented. The buffer 246 is written to fill the 1394 wafer 210 by the readable and writable buffer 246. For example, the feature register 232 in the 1394 chip 210 can be filled to enable the 1394 chip 210 to provide its own identity information.

In addition, in addition to the applications of the above-described LAN wafer 206 and 1394 wafer 210, other wafers requiring identity information may also employ the above techniques.

Compared with the conventional technique of FIG. 1, the technique of FIG. 2 no longer configures a dedicated EEPROM for each wafer, but instead uses the free space of the BIOS memory 204 (eg, spaces 240, 242) to store the identity information of the wafer. Moreover, the act of accessing the free space (240, 242) of the BIOS memory 204 is implemented by the BIOS firmware 248. Since the BIOS firmware 248 usually has a complete function to communicate with the devices on the motherboard 200, the FIG. 2 technology does not need to separately design an EEPROM access interface in each chip compared to the conventional technique of FIG. 1 (FIG. 1). The EEPROM access interfaces 116 and 130) in each wafer. The technique of FIG. 2 only needs to provide a readable buffer (such as 244, 246) in the wafer, so that the chip driver/tool module (218, 228) can call the first SMI (as indicated by the dashed lines 250 and 252 in FIG. 2). The technical content of FIG. 2 can be completed by enabling the BIOS firmware 248 to implement the first SMI described above and the boot program for designing the BIOS firmware 248. In the technique of FIG. 2, when the wafer identity information is updated, the chip driver/tool module (218, 228) only needs to input the identity information into the readable buffer (eg, 244, 246) to trigger the first SMI. The remaining update actions are all performed by the BIOS firmware 248. The chip driver/tool module (218, 228) does not need to directly access the BIOS memory 204 for data access. Compared with the conventional technology of FIG. 1, the technology of FIG. 2 makes the motherboard structure simpler, and the cost of the EEPROM can be saved, and the implementation is simple and easy.

The architecture of Figure 2 can be implemented in a variety of implementation processes and applications, as illustrated in Flowchart 3-5.

Fig. 3 is a flow chart showing an embodiment of an update operation of the wafer identity information. The following is explained in conjunction with the architecture diagram of Figure 2. After the program of FIG. 3 is started, step S302 stores the identity information of the wafer into the readable and writable buffers (244, 246) of the wafer by the chip driver/tool module (218, 228), and uses the chip driver/tool module. (218, 228) calls the first SMI (250, 252). Block 304 of Figure 3 shows the first SMI program provided by the BIOS firmware (248), including steps S306 and S308. Step S306 compares whether the contents of the readable and writable buffers (244, 246) in the wafer (206, 210) are the same as the contents of the wafer information storage space (240, 242) in the BIOS memory (204) - if the contents are the same, the end If not, the process proceeds to step S308 to copy the contents of the read/write buffers (244, 246) of the chips (206, 210) to the wafer information storage space (240, 242) of the BIOS memory (204), and then, the end Program. Step S306 of FIG. 3 can be selected according to whether the user needs to implement or not; the function is to reduce the number of times the BIOS memory 204 is overwritten to extend the life of the BIOS memory 204.

Fig. 4 is a flow chart showing an embodiment of a loading operation of wafer identity information, including steps S402...S408, which can be designed in a booting program. As shown in the figure, after the cold boot or warm boot, step S402 determines the firmware of the wafer (206, 210), for example, determining whether the identity information of the wafer has been stored in the feature register (214, 232); If yes, the process ends; otherwise, the process proceeds to step S404. Step S404 will confirm whether the read/write buffers (244, 246) in the wafer (206, 210) have the same content as the wafer information storage space (240, 242) of the BIOS memory (204) to avoid redundant copying operations. . If the result of the determination in step S404 is YES, the program of FIG. 4 is ended. Otherwise, step S406 is executed to copy the contents of the wafer information storage space (240, 242) in the BIOS memory (204) to the chip (206, 210). The readable and writable buffers (244, 246) are further filled with the contents of the read/write buffers (244, 246) temporarily stored in the chip (206, 210) by a step S408, such as a feature register (214). , 232), and end the program of Figure 4 to complete the identity information loading action. The judgments performed in steps S402 and S404 are for improving system performance, and may or may not be used depending on user requirements.

Figure 5 is a flow chart showing a test program of the architecture of Figure 2 for reading the wafer information storage space (240, 242) of the BIOS memory (204) for testing. Step S502 calls a second SMI with the chip driver/tool module (218, 228). The step 504 shows the second SMI program provided by the BIOS firmware (248), which includes the step S506: copying the contents of the chip information storage space (240, 242) of the BIOS memory (204) to the chip (206, 210). Read and write buffers (244, 246). Step S508 reads the wafer (206, 210) readable and writable buffers (244, 246) by the chip driver/tool module (218, 228) to learn the information storage space of the chip in the BIOS memory (204). Whether the content of (240, 242) is correct. For example, compare the contents of the readable and writable buffers (244, 246) with the wafer identity information to be updated. If they are equal, the flow is updated as shown in FIG. The operation of the wafer information storage space (240, 242) in the BIOS memory (204) is successful, and can be used for debugging the development of the architecture of FIG. 2.

The various embodiments described above are intended to aid in the understanding of the invention and are not intended to limit the scope of the invention. Please refer to the following patent application scope for the scope of this case.

100. . . motherboard

106. . . LAN chip

108. . . Exclusive LAN chip EEPROM

110. . . 1394 chip

112. . . Exclusive 1394 chip EEPROM

114. . . Feature register

116. . . EEPROM access interface

118. . . LAN driver/tool module

120...126. . . Use arrows to indicate the storage and loading flow of identity information

128. . . 1394 driver/tool module

130. . . EEPROM access interface

132. . . Feature register

200. . . motherboard

202. . . Image file of BIOS firmware

204. . . BIOS memory

206. . . LAN chip

210. . . 1394 chip

214. . . Feature register

218. . . LAN driver/tool module

228. . . 1394 driver/tool module

232. . . Feature register

240. . . LAN information storage space

242. . . 1394 information storage space

244, 246. . . Read and write buffer

248. . . BIOS firmware

250, 252. . . First SMI call

Figure 1 shows a method of storing and loading information about each wafer identity by using a motherboard as an example;

Figure 2 shows a chip identity information storage and loading technique disclosed in the present application by taking a motherboard as an example;

Figure 3 is a flow chart showing an embodiment of an update operation of the wafer identity information;

Figure 4 is a flow chart showing an embodiment of a loading operation of the wafer identity information, including steps S402...S408, which can be designed in the booting program;

Figure 5 is a flow chart showing a test program of the architecture of Figure 2 for reading the wafer information storage space (240, 242) of the BIOS memory (204) for testing.

200‧‧‧ motherboard

202‧‧‧Image file of BIOS firmware

204‧‧‧BIOS memory

206‧‧‧LAN chip

210‧‧‧1394 wafer

214‧‧‧Feature register

218‧‧‧LAN Driver/Tool Module

228‧‧‧1394 Driver/Tool Module

232‧‧‧Feature register

240‧‧‧LAN information storage space

242‧‧‧1394 Information Storage Space

244, 246‧‧‧ readable and writable buffer

248‧‧‧BIOS firmware

250, 252‧‧‧ First SMI call

Claims (18)

A method for managing wafer identity information includes: providing a readable and writable buffer for a chip; causing a BIOS memory to provide a wafer information storage space; and filling the wafer with the identity information into the readable and writable buffer of the wafer And calling a first system management interrupt to drive a BIOS firmware to copy the contents of the readable and writable buffer of the chip to the chip information storage space of the BIOS memory for subsequent power-down and then power-on The information information of the wafer is loaded into the inside of the wafer from the above-mentioned wafer information storage space of the BIOS memory. The method of claim 1, further comprising: after the first system management interrupt triggering, comparing the read/write buffer of the chip and the content of the chip information storage space of the BIOS memory, and The step of copying the readable and writable buffer content to the wafer information storage space is performed when the readable and writable buffer and the content of the wafer information storage space are not equal. The method of claim 1, further comprising: copying, in the booting, the content of the chip information storage space of the BIOS memory to the readable and writable buffer of the chip, so as to be readable A write buffer fills the inside of the wafer. The method of claim 3, further comprising: confirming whether there is identity information inside the chip when the device is turned on, and executing the above-mentioned chip of the BIOS memory when no identity information exists in the chip. Copying the contents of the information storage space to the above-mentioned The step of reading and writing the buffer. The method of claim 3, further comprising: confirming whether there is identity information inside the wafer at the time of booting; and comparing the above-mentioned readability of the wafer after determining that there is no identity information inside the wafer. Writing the buffer and the content of the chip information storage space of the BIOS memory, and executing the above-mentioned wafer information storage space of the BIOS memory when the readable and writable buffer and the content of the wafer information storage space are not equal The content is copied to the above-described read/write buffer of the wafer. The method of claim 1 further provides a test operation, comprising: calling a second system management interrupt to drive the BIOS firmware to copy the content of the chip information storage space of the BIOS memory to the The readable and writable buffer of the chip; and reading the readable and writable buffer of the chip to know whether the content of the wafer information storage space of the BIOS memory is correct. The method of claim 6, wherein the step of calling the first and second system management interrupts is performed by a chip driver/tool module. The method of claim 1, wherein the step of filling the identity information of the wafer into the readable and writable buffer of the wafer is performed by a wafer driver/tool module. The method of claim 1, wherein the above-mentioned wafer information storage space of the BIOS memory is stored in addition to the BIOS firmware. A specific address space other than an image file. A method for managing wafer identity information includes: providing a readable and writable buffer for a chip; and causing a BIOS memory to provide a wafer information storage space for storing identity information of the wafer; and when booting, the BIOS firmware The contents of the above-mentioned wafer information storage space of the BIOS memory are copied into the readable and writable buffer of the wafer to be filled into the inside of the wafer via the readable and writable buffer. The method of claim 10, further comprising: confirming whether there is identity information inside the chip when the device is turned on, and performing the above-mentioned chip of the BIOS memory when no identity information exists in the chip. The step of copying the contents of the information storage space to the above-described readable and writable buffer of the wafer. The method of claim 10, further comprising: confirming whether the identity information exists inside the chip when the device is turned on; and comparing the above-mentioned readability of the chip after determining that there is no identity information inside the chip. Writing the buffer and the content of the chip information storage space of the BIOS memory, and executing the above-mentioned wafer information storage space of the BIOS memory when the readable and writable buffer and the content of the wafer information storage space are not equal The content is copied to the above-described read/write buffer of the wafer. The method of claim 10, further comprising: filling the identity information of the wafer into the readable and writable buffer of the chip; Calling a first system management interrupt to drive the BIOS firmware to copy the contents of the readable and writable buffer of the chip to the chip information storage space of the BIOS memory to update the storage in the chip information storage space. The identity information of the wafer. The method of claim 13, wherein the step of filling the identity information of the wafer into the readable and writable buffer of the chip and the step of calling the first system management interrupt are performed by a chip driver/ The tool module is completed. The method of claim 13, further comprising: comparing the readable and writable buffer of the chip and the content of the wafer information storage space of the BIOS memory after the first system management interrupt triggering, And performing the step of copying the readable and writable buffer content to the wafer information storage space when the readable and writable buffer and the content of the wafer information storage space are not equal. For example, the method of claim 10 further provides a test operation, including: calling a second system management interrupt; after the second system management interrupt is triggered, driving the BIOS firmware to the BIOS memory The content of the wafer information storage space is written into the readable and writable buffer of the chip; and the readable and writable buffer of the chip is read to know whether the content of the wafer information storage space of the BIOS memory is correct. The method of claim 16, wherein the step of calling the second system management interrupt is performed by a chip driver/tool module. The method of claim 10, wherein the chip information storage space of the BIOS memory is a specific address space other than an image file storing the BIOS firmware.