TWI225679B - Method for forming dielectric layers of a semiconductor - Google Patents

Abstract

A method for forming a dielectric layer of a semiconductor is described. At first, providing a substrate with a metal-conductive layer having been formed thereon. Next covering the substrate with a membrane having a plurality of micro-holes. Afterward spraying a fluid dielectric on the membrane having a plurality of micro-holes. After waiting a period of time for the gaps among the metal conductors being filled with the fluid dielectric, removing the membrane having a plurality of micro-holes from the substrate. Further baking the substrate to cure the fluid dielectric inside metal-conductive layer. The thickness of the dielectric after curing is approximately equal to the thickness of the metal-conductive layer. At last forming a cap dielectric layer on the substrate.

Description

1225679 V. Description of the invention (1) 1. [Technical field to which the invention belongs] The present invention is a semiconductor manufacturing process, in particular, a manufacturing process for manufacturing a dielectric layer between metal conductors in a semiconductor. 2. [Previous Technology] After the main body fabrication of Metal Oxide Semiconductor (MOS) components on wafers is completed, 'the next step is to make multiple metal conductor layers and interconnects above the MOS device. With the evolution of process technology, component size specifications have also become smaller and smaller, so the gap between metal conductors has become smaller and smaller, and a gap with a high aspect ratio has been created between the metal conductors. In the gaps between metals, holes are formed in the gaps because it is difficult to deposit them completely, which will destroy the electrical properties of the components and cause wafer scrap. In order to solve the above-mentioned problem of incomplete deposition, U.S. Patent No. 6,239,0 18 and U.S. Patent No. 6,2 18, 2 8 4 proposed the use of high density plasma chemical vapor deposition (HDPCVD for short). ) Process to deposit a dielectric layer (such as silicon dioxide) between metal conductors. US Patent No. 6, 1 1 7, 345 also details the HDPCVD process, which mainly uses the HDPCVD process to have both chemical vapor deposition and chemical vapor deposition. The characteristics of non-isotropic etching, as shown in the first AD diagram, first provide a substrate 10 that has completed the fabrication of semiconductor active devices. A metal conductor layer 12 has been formed above the substrate 10, and then a high-density plasma chemical vapor phase is provided. A first dielectric layer 14 is formed on the metal conductor layer 12 by deposition.

Page 5 1225679 V. Description of the invention (2) The characteristics of the anisotropic after-effect in high-density plasma chemical vapor deposition, the profile of the first dielectric layer 14 above the metal conductor layer 12 will be like the first B The figure shows a zigzag shape. Next, a second dielectric layer 16 is formed over the first dielectric layer 14, and then the second dielectric layer is planarized (such as a chemical mechanical polishing process). As shown in the first D figure. Because the outline of the first dielectric layer 14 produced by the high-density plasma chemical vapor deposition method has a wavy appearance, and the dense distribution between the metal conductor layers 12 and 2 covers the first dielectric layer 14 The second dielectric layer 16 will also show a wavy appearance. Therefore, in order to make the metal layer production in the future, a planarization process (such as a chemical mechanical polishing process) must be added to the second_dielectric layer 1 6 Flattening thus increases the number of manufacturing steps and lengthens the semiconductor manufacturing time. Therefore, there is a need to obtain a flat intermetal dielectric layer without going through a flattening process. With the increasing aspect ratio of metal conductors in semiconductors (aspect rat io), the ratio of etching to deposition rate must be increased during high-density plasma chemical vapor deposition in order to form a non-porous intermetallic dielectric layer Often, this results in a prolonged manufacturing time of the dielectric layer, and it is still not possible to produce a dielectric layer between metal conductors without holes. Therefore, there is a kind of 0 that does not need to extend the manufacturing time of the dielectric layer and can form metal conductors without holes. The need for dielectric layers. Third, [invention content]

1225679

One of the main objects of the present invention is to provide a method of manufacturing a flat display dielectric layer 'and to save the time and cost of manufacturing a flat inter-conductor conductor in the prior art. —I process to reduce by half of the prior art ;: high half: degree of contemplation: Another object of the present invention is to provide a method of an intermetal dielectric layer to replace the process of poly chemical vapor deposition. The present invention uses a thin film with a plurality of micropores to cover a substrate on which a metal conductor layer has been made. Then, the film is tightly sealed with an electrical material on the substrate, and the liquid dielectric material passes through the film to form a liquid medium. After the gap, remove the thin film with a plurality of micropores, and then remove the solvent in the liquid dielectric material to form a first dielectric mine and bake the substrate; the electrical layer is between the channels. Then, a second dielectric first dielectric layer is formed by chemical vapor deposition to complete the & operation of the semiconductor intermetal dielectric layer. [4] [Embodiments] Some embodiments of the present invention will be described in detail as follows. However, in addition to the detailed description, the present invention can be widely implemented in other embodiments. That is, the scope of the present invention is not limited by the proposed embodiment, but should be based on the scope of the patent application filed later. ~ A preferred embodiment of the present invention is shown in the second A diagram. A metal conductor layer 22 has been completed on a substrate 20, and the substrate contains the desired material.

Page 7 1225679 V. Description of the invention (4) The semiconductor active device (not shown in the figure) is manufactured. The next step is to make a metal conductor layer 22 and a dielectric layer to isolate the metal inside the metal conductor layer 22. The wires and the isolation metal conductor layer 22 and the next metal conductor layer. Before manufacturing the metal conductor layer 22 and the dielectric layer, as shown in FIG. 2B, a thin film 24 with a plurality of micropores is tightly covered on the substrate 20 or the substrate 20 Closely under a thin film 24 with a plurality of micro-holes, where the thickness of the metal conductor layers 22 is slightly different during the manufacturing process, the thin film 24 with a plurality of micro-holes is made of a soft material and can be tightly Laminated on the metal conductor layer 22 of the substrate 20, the thin film 24 with a plurality of micropores is a filter screen that does not react with chemicals used in the process of making the dielectric layer. In this embodiment, The film 24 having a plurality of micropores therein may be a non-woven fiber filter screen, a ceramic gauze screen, or a stainless steel metal screen. Next, a plurality of nozzles 2 8 spray liquid dielectric material 2 6 over a thin film 2 4 having multiple holes. Here, the liquid dielectric material 2 6 is a mixture of a solvent and a dielectric material. Dielectric materials 2 6 As the process requirements are different, = Silicate, Siloxane, Inorganic

Rotary coated glass HSQ (Hydrogenated Silsesqi〇xane), aromatic polyether (Aromatic poi yether), Diviny lsi ioxane and bis-Benzocyclobutene (bis-Benzocyclobutene) Copolymer is called DVS-BCB, or silica gel. (co-p〇1ymer) or Jane 11 M surface, page 8, 1225679 V. Description of the invention (5) As shown in Figure 2C, a plurality of nozzles 2 8 are sprayed on a film 24 having a plurality of micro holes. After the liquid dielectric material 26 passes through the thin film 24 having a plurality of micropores, the liquid dielectric material 26 will fill the gap between the metal conductor layers 22,

The pore diameter of the thin film 24 with a plurality of micropores is adjusted according to different process requirements. 'When the substrate 20 is left to stand for a period of time and the liquid dielectric material 26 fills the gap between the metal conductor layers 22, Then remove the thin film 24 with a plurality of micro holes immediately above the substrate 20 or remove the substrate 20 from under the thin film 24 with a plurality of micro holes, and bake as shown in the second figure d. The substrate 20 removes the solvent in the liquid dielectric material 26 between the metal conductor layers 22 and 26 by evaporation, and the solidified liquid dielectric material 26 is the first dielectric layer 2 62 between the metal conductor layers 22, such as As shown in FIG. 2E, a second dielectric layer 29 is then formed by chemical vapor deposition to cover the metal conductor layer 22 of the first dielectric layer 262 between the metal conductor layers 22 formed to complete the semiconductor. The production of the intermetallic dielectric layer is because the thickness of the first dielectric layer 2 6 2 after curing is filled with the liquid dielectric material 2 6 in the inner gap of the metal conductor layer 2 2, which is similar to the thickness of the metal conductor layer 22. After the second dielectric layer 29 is deposited, the surface of the second dielectric layer will form a flat surface without Need to be given a chemical mechanical polishing as described previously in the art (Chemical Mechanical Polish referred to as CMP) process to the surface of the second dielectric layer 29 is planarized. U As shown in FIG. 3A and FIG. 3B, the difference between the present invention and the prior art for forming the dielectric layer between the metal conductors 32 is mainly the direction of growth when the dielectric layer is formed. Chemical vapor deposition

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The% built-up dielectric layer includes a lateral velocity forming a hole in the dielectric layer between the metal conductive conductors 32. As shown in the figure B, the second deposited dielectric layer only includes a stable dielectric after the vertical dielectric layer is filled. The deposited dielectric layer 341 to the second deposited dielectric layer 342 to the third 343 are filled in the direction of the gap in the metal conductor 32 on the substrate 30 and the vertical filling method is often because the lateral filling body 32 is larger than the metal conductor 32 Below, or because the width of the gold gap is smaller than the generation of the gap hole 38 (Void) in the metal conductor 32, the present invention = the first: a deposited dielectric layer 361 to a second deposited dielectric layer 362 to 363 The filling direction of the gap in the metal conductor 32 on the substrate 30 is oriented. Therefore, after the completion of the metal conductors 32, holes 38 will not be generated in the dielectric layer, and an electrical layer will be generated. The preferred embodiments of the invention are not intended to limit the scope of patent application of the invention. Changes can be made and implemented without departing from the essence of the invention, and such changes should still fall within the scope of the invention. Therefore, the scope of the present invention is defined by the scope of the following patent applications. For example, the metal conductor layer 22 mentioned in the above embodiment may be the first metal layer of a semiconductor device, and the substrate 20 represents The Shi Xi substrate of the semiconductor active device has been fabricated; in addition, the above-mentioned metal conductor layer 22 may also be a metal conductor layer of other layers in the semiconductor device to be produced, and the substrate 20 represents an adjacent metal conductor A dielectric layer between layers.

Page 10 1225679 Brief description of the diagram V. [Simplified illustration of the diagram] The first AD diagram shows the process of fabricating the semiconductor metal inner dielectric layer by the high-density plasma chemical vapor deposition method in the prior art; the second AE diagram Shown is the process of making a semiconductor metal inner dielectric layer by using a thin film with a plurality of micropores in the present invention; FIG. 3A shows the dielectric when the semiconductor metal inner dielectric layer is made by chemical vapor deposition in the prior art A schematic diagram of the growth direction of the layer; and FIG. 3B is a schematic diagram of the growth direction of the dielectric layer when the semiconductor metal inner dielectric layer is fabricated by using a thin-film filtered liquid dielectric material with a plurality of micropores in the present invention. Explanation of symbols: 1 0 substrate 1 2 metal conductor 14 first dielectric layer 16 second dielectric layer 2 0 substrate 22 metal conductor 2 4 thin film with a plurality of micropores 2 7 liquid dielectric material 2 6 2 first dielectric Floor

Page 11 1225679 Brief description of drawings 28 Nozzle 29 Second dielectric layer 30 Substrate 32 Metal conductor 341 First deposited dielectric layer 342 Second deposited dielectric layer 3 4 3 Third deposited dielectric layer 361 First deposited dielectric Layer 3 6 2 Second deposited dielectric layer 36 3 Third deposited dielectric layer 3 8 Holes

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Claims (1)

1225679 VI. Scope of patent application 1. A method for manufacturing a semiconductor dielectric layer, comprising: providing a substrate, the substrate has completed the production of a conductor layer; covering a thin film with a plurality of micro holes on the substrate; spraying a A liquid dielectric material on the film having a plurality of micropores; let the substrate stand for a period of time, after the liquid dielectric material fills the gap in the conductor layer, remove the plurality of micropores on the substrate A thin film; and baking the substrate to cure the liquid dielectric material in the conductor layer. The method for manufacturing a semiconductor dielectric layer according to claim 4 further includes forming a covering dielectric layer on the conductive layer of the liquid dielectric material after it has been filled and cured. For example, in the method for manufacturing a semiconductor dielectric layer according to item 2 of the patent application, the above-mentioned cover dielectric layer is formed by a chemical vapor deposition method. $ · If the method for manufacturing a semiconductor dielectric layer according to item 1 of the scope of the patent application, the material of the thin film with a plurality of micropores is selected from one of the following: no, fiber mesh, ceramic filter, and stainless steel network. 2. The method for manufacturing a semiconductor dielectric layer according to item 1 of the patent application. The liquid dielectric material described above is selected from one of the following: Silicate, silicon oxide, and gauge I inorganic spin-on glass Copolymers of HSQ, aromatic polyether, divinyl siloxane 70 /, bismethylbenzenecyclobutane, and silica gel. 1225679 6. Application for Patent Scope 6. —A method for manufacturing a semiconductor dielectric layer, including: providing a substrate, the substrate has been completed with the production of a metal conductor layer; the surface of the substrate is next to a thin film with a plurality of micro holes Spraying a liquid dielectric material on the film with a plurality of micro-holes; removing the substrate under the film with a plurality of micro-holes after standing the substrate for a while; baking the substrate to solidify the metal conductor The thickness of the solidified dielectric material of the liquid dielectric material in the layer is approximately the thickness of the metal conductor layer; and a dielectric layer is formed on the substrate. 7. The method for manufacturing a semiconductor dielectric layer according to item 6 of the patent application, wherein the material of the above-mentioned microporous film is selected from one of the following: a non-woven fiber filter, a ceramic filter, and a stainless steel metal mesh. 8 · The method for manufacturing a semiconductor dielectric layer as described in the sixth item of the patent application, wherein the liquid dielectric material mentioned above is selected from one of the following: · oxalates, oxaxanes, inorganic spins Coated glass HSQ, aromatic polyether, copolymer of dioxetane and bisfluorenylbenzenecyclobutane, and silica gel. 9. The method for manufacturing a semiconductor dielectric layer according to item 6 of the patent application range, wherein the above-mentioned dielectric layer is formed by a chemical vapor deposition method. Page 14