TW341022B - Interconnection structures and method of making same - Google Patents

Interconnection structures and method of making same

Info

Publication number
TW341022B
TW341022B TW085114190A TW85114190A TW341022B TW 341022 B TW341022 B TW 341022B TW 085114190 A TW085114190 A TW 085114190A TW 85114190 A TW85114190 A TW 85114190A TW 341022 B TW341022 B TW 341022B
Authority
TW
Taiwan
Prior art keywords
making same
interconnection structures
insulating films
comprizing
layers
Prior art date
Application number
TW085114190A
Other languages
English (en)
Inventor
Naonori Shimodo
Yoshitsugu Funada
Koji Matsui
Yozo Shimada
Kazuaki Uchiumi
Original Assignee
Nippon Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP8125016A external-priority patent/JP2828032B2/ja
Priority claimed from JP8286643A external-priority patent/JPH09214141A/ja
Application filed by Nippon Electric Co filed Critical Nippon Electric Co
Application granted granted Critical
Publication of TW341022B publication Critical patent/TW341022B/zh

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4661—Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/465—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer having channels for the next circuit layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0355—Metal foils
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0388—Other aspects of conductors
    • H05K2201/0394—Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0023—Etching of the substrate by chemical or physical means by exposure and development of a photosensitive insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • H05K3/182—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
    • H05K3/184—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method using masks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673—Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H05K3/4676—Single layer compositions
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00—Stock material or miscellaneous articles
    • Y10S428/901—Printed circuit
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/31504—Composite [nonstructural laminate]
    • Y10T428/3154—Of fluorinated addition polymer from unsaturated monomers

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Formation Of Insulating Films (AREA)
  • Macromonomer-Based Addition Polymer (AREA)
TW085114190A 1995-11-29 1996-11-19 Interconnection structures and method of making same TW341022B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP31063595 1995-11-29
JP8125016A JP2828032B2 (ja) 1996-05-20 1996-05-20 多層配線構造体の製造方法
JP8286643A JPH09214141A (ja) 1995-11-29 1996-10-29 配線構造

Publications (1)

Publication Number Publication Date
TW341022B true TW341022B (en) 1998-09-21

Family

ID=27315025

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085114190A TW341022B (en) 1995-11-29 1996-11-19 Interconnection structures and method of making same

Country Status (3)

Country Link
US (1) US5830563A (zh)
KR (1) KR100273887B1 (zh)
TW (1) TW341022B (zh)

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JP3033539B2 (ja) * 1997-08-26 2000-04-17 日本電気株式会社 キャリアフィルムおよびその製造方法
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WO2000019517A1 (fr) * 1998-09-30 2000-04-06 Ibiden Co., Ltd. Microplaquette semi-conductrice et procede de fabrication
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JP3473485B2 (ja) 1999-04-08 2003-12-02 日本電気株式会社 薄膜抵抗体およびその製造方法
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US6551872B1 (en) 1999-07-22 2003-04-22 James A. Cunningham Method for making integrated circuit including interconnects with enhanced electromigration resistance using doped seed layer and integrated circuits produced thereby
US6521532B1 (en) 1999-07-22 2003-02-18 James A. Cunningham Method for making integrated circuit including interconnects with enhanced electromigration resistance
US6277672B1 (en) 1999-09-03 2001-08-21 Thin Film Module, Inc. BGA package for high density cavity-up wire bond device connections using a metal panel, thin film and build up multilayer technology
US6287890B1 (en) 1999-10-18 2001-09-11 Thin Film Module, Inc. Low cost decal material used for packaging
US6294477B1 (en) 1999-12-20 2001-09-25 Thin Film Module, Inc. Low cost high density thin film processing
US6197614B1 (en) 1999-12-20 2001-03-06 Thin Film Module, Inc. Quick turn around fabrication process for packaging substrates and high density cards
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KR20030071391A (ko) * 2002-02-28 2003-09-03 삼성전기주식회사 범프의 형성방법 및 이로부터 형성된 범프를 이용한인쇄회로기판의 제조방법
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US7371975B2 (en) * 2002-12-18 2008-05-13 Intel Corporation Electronic packages and components thereof formed by substrate-imprinting
US7637008B2 (en) * 2002-12-18 2009-12-29 Intel Corporation Methods for manufacturing imprinted substrates
WO2004060660A1 (ja) * 2002-12-27 2004-07-22 Nec Corporation シート材及び配線板
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US6974775B2 (en) * 2002-12-31 2005-12-13 Intel Corporation Method and apparatus for making an imprinted conductive circuit using semi-additive plating
JP2004221449A (ja) * 2003-01-17 2004-08-05 Sumitomo Metal Mining Co Ltd 多層配線基板およびその製造方法
US20060289203A1 (en) * 2003-05-19 2006-12-28 Dai Nippon Printing Co., Ltd. Double-sided wiring board, double sided wiring board manufacturing method, and multilayer wiring board
JP2005209861A (ja) * 2004-01-22 2005-08-04 Nippon Steel Corp ウェハレベルパッケージ及びその製造方法
CN1316861C (zh) * 2004-03-31 2007-05-16 全懋精密科技股份有限公司 多层电路板及其制法
US20050248002A1 (en) * 2004-05-07 2005-11-10 Michael Newman Fill for large volume vias
JP4346541B2 (ja) * 2004-11-26 2009-10-21 日東電工株式会社 配線回路基板およびその製造方法
KR100966774B1 (ko) * 2005-05-23 2010-06-29 이비덴 가부시키가이샤 프린트 배선판
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JP5178064B2 (ja) * 2007-06-27 2013-04-10 富士フイルム株式会社 金属表面粗化層を有する金属層積層体及びその製造方法
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CN103946271B (zh) * 2012-02-09 2019-04-12 日产化学工业株式会社 包含具有碳碳多重键的树脂的钝化膜形成用组合物
CN103582323B (zh) * 2012-07-20 2017-04-26 华为技术有限公司 一种多层pcb板线路图形的制作方法
CN103781284A (zh) * 2012-10-19 2014-05-07 先丰通讯股份有限公司 一种电路板制作方法
CN103781283A (zh) * 2012-10-19 2014-05-07 先丰通讯股份有限公司 一种电路板制作方法
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KR102032952B1 (ko) * 2015-11-16 2019-10-16 주식회사 엘지화학 반도체 소자의 빌드 업 방법
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LT6899B (lt) 2020-08-27 2022-04-11 Valstybinis mokslinių tyrimų institutas Fizinių ir technologijos mokslų centras Vario paviršiaus cheminio nikeliavimo būdas, nenaudojant aktyvavimo paladžiu

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Also Published As

Publication number Publication date
US5830563A (en) 1998-11-03
KR19980032007A (ko) 1998-07-25
KR100273887B1 (ko) 2000-12-15

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