TW201444016A - Mounting method and mounting device - Google Patents

Mounting method and mounting device Download PDF

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Publication number
TW201444016A
TW201444016A TW103103665A TW103103665A TW201444016A TW 201444016 A TW201444016 A TW 201444016A TW 103103665 A TW103103665 A TW 103103665A TW 103103665 A TW103103665 A TW 103103665A TW 201444016 A TW201444016 A TW 201444016A
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Taiwan
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substrate
mounting
substrate holding
offset
wafer
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TW103103665A
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Chinese (zh)
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TWI605537B (en
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Mikio Kawakami
Yoshihiro Kinoshita
Masahiro Ogawa
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Toray Eng Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75Apparatus for connecting with bump connectors or layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/681Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/04Mounting of components, e.g. of leadless components
    • H05K13/046Surface mounting
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/08Monitoring manufacture of assemblages
    • H05K13/089Calibration, teaching or correction of mechanical systems, e.g. of the mounting head
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757Means for aligning
    • H01L2224/75753Means for optical alignment, e.g. sensors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/759Means for monitoring the connection process
    • H01L2224/75901Means for monitoring the connection process using a computer, e.g. fully- or semi-automatic bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112Aligning
    • H01L2224/81121Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H01L2224/8113Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112Aligning
    • H01L2224/81121Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H01L2224/81132Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed outside the semiconductor or solid-state body, i.e. "off-chip"
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81193Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Operations Research (AREA)
  • Wire Bonding (AREA)
  • Supply And Installment Of Electrical Components (AREA)

Abstract

An objective of the present invention is to provide a mounting method and a mounting device whereby, even if the range wherein a chip component is mounted upon a substrate increases, the chip component is mounted with high precision upon a prescribed location of the substrate. Specifically, provided are a mounting method and a mounting device wherein, after alignment marks of a chip component and alignment marks of a substrate are recognized with an image recognition means and an alignment of the chip and the substrate is carried out, a mounting offset, whereby a degree of location misalignment arising when the chip component is pressure mounted is offset, is set as a function of a location within a substrate retaining stage surface whereupon the substrate is retained, and a pressure force at time of bonding.

Description

安裝方法及安裝裝置 Installation method and installation device

本發明係關於一種將電子零件等晶片零件安裝於載置於基板保持平台上且由陶瓷、樹脂、玻璃等構成之基板的特定之位置上之安裝方法及安裝裝置。 The present invention relates to a mounting method and mounting apparatus for mounting a wafer component such as an electronic component to a substrate placed on a substrate holding platform and having a substrate made of ceramic, resin, glass or the like.

一般而言,將電子零件等晶片零件安裝於基板上之安裝裝置具有:例如將晶片零件真空吸附保持之鍵合頭、使鍵合頭於上下方向移動之機構、將基板吸附保持之基板保持平台、使基板保持平台於水平方向及旋轉方向移動之機構、可進退地設置於鍵合頭與基板保持平台之空間且可同時對鍵合頭側及基板保持平台側進行攝像之2視野攝像機。該安裝裝置使2視野攝像機進入上述空間,同時讀取寫於鍵合頭所保持之晶片零件上之對準標記、及寫於基板上之對準標記,基於該讀取資訊進行晶片零件與基板上之安裝位置之位置對準。然後,使2視野攝像機退避後,使頭部下降,從而使晶片零件接合於基板上之安裝位置(例如專利文獻1)。 In general, a mounting device for mounting a wafer component such as an electronic component on a substrate includes, for example, a bonding head that vacuum-holds the wafer component, a mechanism that moves the bonding head in the vertical direction, and a substrate holding platform that adsorbs and holds the substrate. A mechanism for moving the substrate holding platform in the horizontal direction and the rotating direction, and a two-view camera that can be moved forward and backward to the space of the bonding head and the substrate holding platform, and can simultaneously image the bonding head side and the substrate holding platform side. The mounting device allows the 2-view camera to enter the space, simultaneously reads the alignment mark written on the wafer component held by the bonding head, and the alignment mark written on the substrate, and performs the wafer part and the substrate based on the read information. The position of the mounting position on the top is aligned. Then, after the two-view camera is retracted, the head is lowered to bond the wafer component to the mounting position on the substrate (for example, Patent Document 1).

[先前技術文獻] [Previous Technical Literature] [專利文獻] [Patent Literature]

專利文獻1:日本專利特開2004-22949號公報 Patent Document 1: Japanese Patent Laid-Open Publication No. 2004-22949

近年來,以提高生產效率為目的而有基板之尺寸變大之傾向、 或於基板保持平台上載置更多之基板之傾向,故基板保持平台之大型化向前推進。另一方面,藉由基板保持平台之大型化,即便安裝範圍變大,但如位置偏差之容許範圍為1μm以下之高精度安裝的要求仍在提高。 In recent years, the purpose of increasing the productivity is to increase the size of the substrate. Or there is a tendency to place more substrates on the substrate holding platform, so that the substrate holding platform is advanced in size. On the other hand, with the increase in the size of the substrate holding platform, even if the mounting range is increased, the requirement for high-precision mounting in which the allowable range of positional deviation is 1 μm or less is still increasing.

如此,便產生了與安裝範圍變大相關之新的問題。那便是,即便於2視野攝像機位於鍵合頭與基板平台之間之狀態下以位置偏差為1μm以下之方式而進行位置對準,但存在實際上已安裝於基板上之狀態下的位置偏移量超過數μm者。該位置偏移量因若基板保持平台面內之安裝位置與安裝時之加壓力相同則再現,故於實際之量產步驟中,藉由設定用於抵消該位置偏移量之偏移而確保安裝精度。然而,由於該偏移因基板、晶片、安裝時之加壓力而變化,故於每種安裝條件下根據試誤而進行個別地設定。 As a result, new problems associated with a larger installation range have arisen. That is, even if the two-view camera is positioned between the bonding head and the substrate platform with a positional deviation of 1 μm or less, there is a positional deviation in a state in which it is actually mounted on the substrate. Those who shift more than a few μm. The positional offset is reproduced if the mounting position in the substrate holding platform surface is the same as the pressing force at the time of mounting. Therefore, in the actual mass production step, it is ensured by offsetting the offset for offsetting the position. Installation accuracy. However, since the offset varies depending on the substrate, the wafer, and the pressing force at the time of mounting, it is individually set according to the trial and error under each mounting condition.

此處,寫於晶片零件上之對準標記與寫於基板上之對準標記皆位於接合面側,故為了觀察安裝後之對準標記而需要藉由X射線而進行之透視,僅僅測定安裝後之位置偏移量就需要很大之功夫。 Here, the alignment mark written on the wafer part and the alignment mark written on the substrate are both on the joint surface side, so in order to observe the alignment mark after installation, it is necessary to perform the perspective by X-ray, and only the installation is measured. The post position offset requires a lot of work.

如此,於每種安裝條件下設定偏移之方法會產生時間上之浪費,而於條件設定之前之晶片零件及基板亦白費。 As such, the method of setting the offset under each of the mounting conditions is wasteful in time, and the wafer parts and substrates before the condition setting are also in vain.

本發明係鑒於此種情況而成者,其目的在於提供一種安裝晶片零件之若基板保持平台面內之位置及安裝時之加壓條件確定則求出偏移之安裝方法、及具備進行該安裝方法之功能之安裝裝置。 The present invention has been made in view of such circumstances, and an object of the present invention is to provide a mounting method for determining the offset when the position of the substrate holding platform surface and the pressing conditions at the time of mounting are mounted, and the mounting is performed. The functional installation of the method.

為解決上述問題,技術方案1中所記載之發明係一種安裝方法,其係以圖像識別設備對晶片零件之對準標記及基板上之對準標記進行識別,從而進行晶片零件與基板之對準,然後將晶片零件加壓並安裝於基板上者,其特徵在於:將抵消對準後加壓安裝晶片零件時所產生之位置偏移量之安裝偏移設定為保持基板之基板保持平台面內之位置 及接合時之加壓力之函數。 In order to solve the above problems, the invention described in claim 1 is an installation method in which an image recognition device recognizes an alignment mark of a wafer component and an alignment mark on the substrate, thereby performing a pair of the wafer component and the substrate. And then pressing and mounting the wafer component on the substrate, wherein the mounting offset of the positional offset generated when the wafer component is pressed and assembled after the alignment is set to the substrate holding platform surface of the holding substrate Inside location And the function of the applied pressure at the time of joining.

技術方案2中所記載之發明係如技術方案1中所記載之安裝方法,其特徵在於:求出相對於基板保持平台面內之複數個位置之複數個條件的加壓力之位置偏移量,基於該結果,導出表示基板保持平台面內之位置及接合時之加壓力與位置偏移量之關係的函數。 The invention according to claim 1 is characterized in that the positional displacement amount of the pressing force of a plurality of conditions for holding a plurality of positions in the plane of the substrate with respect to the substrate is obtained. Based on this result, a function indicating the relationship between the position in the surface of the substrate holding platform and the pressing force at the time of joining and the positional shift amount is derived.

技術方案3中所記載之發明係如技術方案2中所記載之安裝方法,其特徵在於:於求出相對於基板保持平台面內之複數個位置之複數個條件的加壓力之位置偏移量時,使用記錄有對準標記之透明之晶片零件。 The invention according to claim 2 is the mounting method according to the second aspect of the present invention, characterized in that the positional offset of the pressing force for determining a plurality of conditions at a plurality of positions in the plane of the substrate is determined. At the time, a transparent wafer part recorded with an alignment mark is used.

技術方案4中所記載之發明係具備進行如技術方案1至3中任一項之安裝方法之功能的安裝裝置,該安裝裝置具有:將晶片零件吸附保持之鍵合頭、使鍵合頭於上下方向移動之機構、將基板載置保持之基板保持平台、使鍵合頭與基板保持平台相對地於水平方向及旋轉方向移動之機構、可進退地設置於鍵合頭與基板保持平台之空間且可同時對鍵合頭側及基板保持平台側進行攝像之2視野識別設備。 The invention according to claim 4 is the mounting device having the function of the mounting method according to any one of claims 1 to 3, wherein the mounting device has a bonding head for holding and holding the wafer component, and the bonding head is a mechanism for moving in the vertical direction, a substrate holding platform for holding the substrate, and a mechanism for moving the bonding head and the substrate holding platform in the horizontal direction and the rotating direction, and being retractably provided in the space of the bonding head and the substrate holding platform A two-view recognition device that can image the bonding head side and the substrate holding platform side at the same time.

藉由使用本發明,而可容易地獲得抵消對準後加壓安裝晶片零件時所產生之位置偏移量之偏移,從而安裝步驟之生產性提高。 By using the present invention, it is possible to easily obtain offsetting the offset of the positional displacement generated when the wafer parts are press-fitted after alignment, so that the productivity of the mounting step is improved.

1‧‧‧倒裝晶片安裝裝置 1‧‧‧Flip Chip Mounting Device

2‧‧‧晶片零件 2‧‧‧ wafer parts

3‧‧‧突起電極 3‧‧‧ protruding electrode

4‧‧‧基板 4‧‧‧Substrate

5‧‧‧電極 5‧‧‧Electrode

6‧‧‧鍵合頭 6‧‧‧ Bonding head

7‧‧‧基板保持平台 7‧‧‧Substrate retention platform

8‧‧‧2視野攝像機 8‧‧‧2 field of view camera

9‧‧‧平台加熱器 9‧‧‧ Platform heater

10‧‧‧仿照機構 10‧‧‧ model agency

11‧‧‧座架 11‧‧‧Rack

12‧‧‧控制部 12‧‧‧Control Department

20‧‧‧模擬晶片零件 20‧‧‧simulated wafer parts

40‧‧‧模擬基板 40‧‧‧Simulation substrate

A1、A2、...、D7、D8‧‧‧基板保持平台7面內之複數個位置 A1, A2, ..., D7, D8‧‧‧ multiple positions in the plane of the substrate holding platform 7

MB‧‧‧模擬基板之對準標記 Alignment mark of MB‧‧‧simulated substrate

MC‧‧‧模擬晶片零件之對準標記 Alignment marks for MC‧‧‧simulated wafer parts

X‧‧‧基板保持平台7之移動方向 X‧‧‧The direction of movement of the substrate holding platform 7

Y‧‧‧基板保持平台7之移動方向 Y‧‧‧The direction of movement of the substrate holding platform 7

△X‧‧‧X方向之偏移量 △X‧‧‧X direction offset

△Y‧‧‧Y方向之偏移量 △Y‧‧‧Y direction offset

θ‧‧‧基板保持平台7之移動方向 θ‧‧‧The direction of movement of the substrate holding platform 7

圖1係用於實施本發明之一實施形態之安裝方法的倒裝晶片安裝裝置之主要部分前視圖。 BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a front elevational view showing the main part of a flip chip mounting apparatus for carrying out a mounting method according to an embodiment of the present invention.

圖2係對用於以本發明為對象之安裝的基板進行說明之圖。 Fig. 2 is a view for explaining a substrate to be mounted for the present invention.

圖3係對本發明之一實施形態中所使用之模擬基板與模擬晶片進行說明之圖。 Fig. 3 is a view for explaining a dummy substrate and a dummy wafer used in an embodiment of the present invention.

圖4係表示進行本發明之一實施形態之模擬基板與模擬晶片之位置偏移量評價的場所之圖。 Fig. 4 is a view showing a place where the positional displacement of the dummy substrate and the dummy wafer is evaluated in accordance with an embodiment of the present invention.

圖5係對本發明之一實施形態中之對準標記相互之位置偏移進行說明之圖。 Fig. 5 is a view for explaining a positional shift of alignment marks in an embodiment of the present invention.

圖6係對根據本發明之一實施形態而獲得之資料群進行說明之圖。 Fig. 6 is a view for explaining a data group obtained according to an embodiment of the present invention.

圖7係本發明之一實施形態中之裝置動作及運算之流程圖。 Fig. 7 is a flow chart showing the operation and calculation of the apparatus in an embodiment of the present invention.

圖8係對本發明之實施例1所使用之基板保持平台之構造進行說明之圖。 Fig. 8 is a view for explaining the structure of a substrate holding stage used in the first embodiment of the present invention.

圖9係對本發明之實施例1所使用之模擬基板進行說明之圖。 Fig. 9 is a view for explaining a dummy substrate used in the first embodiment of the present invention.

圖10係本發明之實施例1所獲得之實際測量資料。 Figure 10 is the actual measurement data obtained in Example 1 of the present invention.

圖11係本發明之實施例1之、自近似式獲得之資料。 Figure 11 is a view showing the data obtained from the approximation of Example 1 of the present invention.

以下,參照圖式對本發明之一實施形態進行說明。 Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

圖1係用於說明安裝裝置之基本功能之主要部分前視圖。該裝置係接合晶片零件2之突起電極3與基板4之電極5的倒裝晶片安裝裝置1,例如,如圖2般,係於基板4之複數個位置安裝晶片零件2者。該安裝裝置之主要部分係由吸附保持晶片零件2之鍵合頭6與吸附保持基板4之基板保持平台7、及作為識別設備之2視野攝像機8所構成,鍵合頭6、基板保持平台7及2視野攝像機8按照控制部12之指示而發揮功能。 Fig. 1 is a front elevational view showing the main part of the basic function of the mounting device. This device is a flip chip mounting device 1 that bonds the bump electrode 3 of the wafer component 2 and the electrode 5 of the substrate 4, for example, as shown in Fig. 2, the wafer component 2 is mounted at a plurality of positions on the substrate 4. The main part of the mounting device is composed of a bonding head 6 for adsorbing and holding the wafer component 2, a substrate holding platform 7 for adsorbing the holding substrate 4, and a two-view camera 8 as an identification device. The bonding head 6 and the substrate holding platform 7 are provided. The two-view camera 8 functions in accordance with an instruction from the control unit 12.

鍵合頭6可升降,基板保持平台7可於X、Y、θ方向移動,將應安裝基板4、晶片零件2之位置配置於鍵合頭6之下方。2視野攝像機8係可進退地構成以可插入至鍵合頭6與基板平台7之間,於晶片零件2之突起電極形成面及基板之電極形成面分別記錄有對準標記,以2視野攝像機8讀取兩個對準標記,從而使鍵合頭6或基板保持平台7中任一個或兩者移動而進行精密位置對準。於精密位置對準後,藉由鍵合頭6下降加壓並且根據需要而加熱,從而將晶片零件2之突起電極3與基板4之電極5接合,但於降下鍵合頭6之前,僅僅以作為基板保持平台7 面內之位置及加壓力之函數所求出之偏移量,微調整基板保持平台7之位置。又,關於求偏移之函數之導出方法於後文敍述。 The bonding head 6 can be moved up and down, and the substrate holding stage 7 can be moved in the X, Y, and θ directions, and the position of the substrate 4 and the wafer component 2 to be mounted is disposed below the bonding head 6. The two-view camera 8 is configured to be insertable and retractable so as to be insertable between the bonding head 6 and the substrate platform 7, and the alignment mark is recorded on the protruding electrode forming surface of the wafer component 2 and the electrode forming surface of the substrate, respectively. 8 Reading the two alignment marks to move either or both of the bonding head 6 or the substrate holding platform 7 for precise positional alignment. After the precise position alignment, the bonding head 6 is lowered and pressurized and heated as needed to bond the protruding electrode 3 of the wafer component 2 to the electrode 5 of the substrate 4, but before lowering the bonding head 6, only As the substrate holding platform 7 The position of the in-plane and the offset obtained by the function of the pressing force finely adjust the position of the substrate holding platform 7. Further, a method of deriving a function for obtaining an offset will be described later.

此一系列之安裝作業結束後,鍵合頭6上升,藉由未圖示之晶片吸附反轉工具,新晶片零件2由鍵合頭6所搬送並且基板保持平台7移動,繼而將應安裝晶片零件之基板之位置配置於鍵合頭之下方。然後,與先前之說明相同,進行自使用2視野攝像機之位置對準至接合之一系列之作業。 After the completion of the series of mounting operations, the bonding head 6 is raised, and the new wafer component 2 is transferred by the bonding head 6 and the substrate holding platform 7 is moved by the wafer adsorption reversal tool (not shown), and then the wafer is to be mounted. The position of the substrate of the part is disposed below the bonding head. Then, as in the previous description, an operation from the positional alignment using the two-view camera to the one of the joining series is performed.

又,基板4之向應安裝晶片零件2之所有之位置的安裝作業結束後,解除藉由基板保持平台7而進行之吸附保持,藉由未圖示之基板搬送工具,將安裝結束後之基板4搬出並且將新基板4搬入,藉由基板保持平台7而吸附保持。 Further, after the mounting operation of all the positions of the substrate 4 to which the wafer component 2 is to be mounted is completed, the holding and holding by the substrate holding stage 7 is released, and the substrate after the mounting is completed by a substrate transfer tool (not shown) 4 The metal substrate 4 is carried out and carried in, and is held by the substrate holding platform 7.

其次,對求偏移之函數之導出方法進行說明。首先,使用例子說明取得成為用於導出函數之基礎之資料之方法。圖3係於基板保持平台7面內之複數個位置(圖4之A1、A2、...、D7、D8)中,於把握加壓時所產生之位置偏移量時使用之記錄有對準標記MC之模擬晶片零件20、與記錄有對準標記MB之模擬基板40。首先,以基板保持平台7吸附保持該模擬基板40後,於上述複數個位置中之任一個位置中,使用2視野攝像機8而進行模擬晶片零件20之對準標記MC與模擬基板40之對準標記MB的位置對準,使2視野攝像機8退避後,施加特定之加壓力,使用透明接著劑而進行模擬晶片零件20與模擬基板40之貼合。然後,使用識別設備實際測量貼合狀態下之模擬晶片零件20之對準標記MC與模擬基板40之對準標記MB的位置偏移量。 Next, a method of deriving a function for obtaining an offset will be described. First, use an example to illustrate how to obtain the data that is the basis for the derived function. 3 is a plurality of positions (A1, A2, ..., D7, D8 in FIG. 4) in the plane of the substrate holding platform 7, and the recording used when grasping the positional displacement generated when pressurizing is correct. The dummy wafer component 20 of the quasi-marker MC and the dummy substrate 40 on which the alignment mark MB is recorded. First, after the substrate holding platform 7 adsorbs and holds the dummy substrate 40, the alignment mark MC of the dummy wafer component 20 and the dummy substrate 40 are aligned using the two-view camera 8 in any of the plurality of positions. The position of the mark MB is aligned, and after the two-view camera 8 is retracted, a specific pressing force is applied, and the bonding of the dummy wafer component 20 and the dummy substrate 40 is performed using a transparent adhesive. Then, the positional shift amount of the alignment mark MC of the dummy wafer part 20 and the alignment mark MB of the dummy substrate 40 in the bonding state is actually measured using the identification device.

於此,為了明確地識別各自之對準標記,較理想的是模擬晶片零件20對可見光透明。假設,即便模擬晶片零件20為對可見光不透明之矽等藉由使用X射線或紅外線,雖可識別貼合後之對準標記,然而因需要透視觀察X射線或紅外線,故裝置會成為大型者。另一方面, 若模擬晶片零件20為對可見光透明則可見光攝像機亦可自上側識別貼合後之對準標記,從而以通用之攝像機亦可獲得較高之解析度。又,因亦可轉用2視野攝像機8,故可抑制裝置成本。 Here, in order to clearly identify the respective alignment marks, it is desirable that the dummy wafer part 20 is transparent to visible light. It is assumed that even if the dummy wafer component 20 is opaque to visible light or the like, X-rays or infrared rays are used, and the alignment marks after bonding can be identified. However, since it is necessary to see X-rays or infrared rays in perspective, the device becomes a large one. on the other hand, If the analog wafer component 20 is transparent to visible light, the visible light camera can also identify the aligned alignment mark from the upper side, so that a universal camera can also obtain a higher resolution. Moreover, since the two-view camera 8 can also be switched, the device cost can be suppressed.

實際測量之偏移量如圖5所示般作為X方向之偏移量△X、Y方向之偏移量△2方向成分而求出,將各自以及基板平台面上之位置(x、y)及加壓力之關係製成資料而記錄。又,以上之資料獲得.記錄於基板保持平台7面內之複數個位置(圖4之A1、A2、...、D7、D8)而進行,於相同之複數個位置改變加壓力而用新模擬基板40進行同樣之內容,藉此進行資料獲得.記錄,從而獲得如圖6所示之資料群。 As shown in FIG. 5, the offset amount actually measured is obtained as the shift amount ΔX in the X direction and the shift amount Δ2 direction component in the Y direction, and the position (x, y) on each of the substrate planes is obtained. The relationship between the pressure and the pressure is recorded and recorded. Also, the above information is obtained. Recording is performed at a plurality of positions (A1, A2, ..., D7, D8 in Fig. 4) in the plane of the substrate holding stage 7, and the pressing force is changed at the same plurality of positions to perform the same content with the new analog substrate 40. In order to obtain information. Record, thereby obtaining the data group as shown in FIG. 6.

使用該資料群,藉由將基板保持平台7面內之位置及加壓力設為變數之近似式而求出位置偏移量,藉此可預測出基板保持平台7面內之任意之位置、任意之加壓力之時的位置偏移量。因此,因偏移係抵消該位置偏移量者,故亦求出基板保持平台7之任意之位置、任意之加壓力之偏移量。即,可將偏移設定為基板保持平台7面內之位置及接合時之加壓力的函數。 By using the data group, the positional shift amount is obtained by setting the position in the in-plane of the substrate holding stage 7 and the pressing force as an approximation of the variable, thereby predicting an arbitrary position in the plane of the substrate holding stage 7, and arbitrarily The amount of positional offset when the pressure is applied. Therefore, since the offset cancels the positional shift amount, the arbitrary position of the substrate holding stage 7 and the offset amount of any applied pressure are also obtained. That is, the offset can be set as a function of the position in the plane of the substrate holding stage 7 and the pressing force at the time of joining.

將關於以上之偏移運算之流程圖示於圖7中,然而亦可將如自動實施該一系列之動作及運算之功能合併入控制部12。 A flowchart of the above offset calculation is shown in FIG. 7, but a function such as automatically performing the series of operations and operations may be incorporated into the control unit 12.

又,關於基板保持平台7面內之複數點之設定,其間隔較理想為自作為對象之安裝裝置與作為安裝對象之晶片零件之尺寸相同至3倍左右之範圍。實際之安裝作業之間隔不會較晶片零件小,故製成較晶片零件小之間隔之必要性較低,且,因間隔過大則近似式之精度降低,故而無法獲得適合之偏移。 Moreover, it is preferable that the setting of the plurality of points in the plane of the substrate holding stage 7 is equal to about three times the size of the mounting device and the wafer component to be mounted. Since the interval between the actual mounting operations is not smaller than that of the wafer components, the necessity of making a smaller interval than the wafer components is low, and the accuracy of the approximation is lowered because the interval is too large, so that a suitable offset cannot be obtained.

以上,記載有由基板保持平台面內之位置與加壓力而求偏移之實施形態,然而因更高之高精度安裝之要求提高,故存在於安裝溫度等作為因素之安裝階段下之位置偏移成為問題之可能性。於此種情形時,對位置、加壓力之外的溫度等因素之影響亦加以調查,亦可將該 因素作為求偏移之函數之變數。 As described above, the embodiment in which the substrate is held at the position in the plane of the plate and the pressing force is offset is described. However, since the demand for higher precision mounting is increased, there is a positional deviation in the mounting stage as a factor of installation temperature or the like. Move to the possibility of a problem. In such cases, the effects of factors such as location and temperature other than pressure are also investigated. The factor acts as a variable of the function of the offset.

實施例1 Example 1

(實施例1) (Example 1)

圖8係表示本實施例1中所使用之基板保持平台7之構造者。將基板4吸附保持之基板保持平台7配置於用於加熱基板之平台加熱器9之上方,於平台加熱器9與座架11之間設有仿照機構10。基板保持平台7之朝向XY方向之移動,藉由座架11移動而成。此處,各元件之X方向×Y方向之尺寸成為,平台加熱器9為260mm×130mm、基板保持平台7為250mm×120mm之尺寸,仿照機構10之直徑成為114mm。使用該基板保持平台7之安裝中,並無因Y方向上之位置之不同而導致之位置偏移的不同,相對於△Y大致為零而知道根據X方向之位置而會產生位置偏移△X,量產前藉由試誤而於每個X方向之位置求出X方向之偏移。因此,嘗試將該基板保持平台7之偏移函數化。 Fig. 8 is a view showing the structure of the substrate holding stage 7 used in the first embodiment. The substrate holding stage 7 for holding and holding the substrate 4 is disposed above the stage heater 9 for heating the substrate, and a copying mechanism 10 is provided between the stage heater 9 and the mount 11. The movement of the substrate holding platform 7 in the XY direction is caused by the movement of the mount 11. Here, the dimension of each element in the X direction × Y direction is 260 mm × 130 mm for the stage heater 9, and the substrate holding platform 7 is 250 mm × 120 mm, and the diameter of the mechanism 10 is 114 mm. In the mounting using the substrate holding stage 7, there is no difference in positional deviation due to the difference in the position in the Y direction, and it is known that the positional shift occurs depending on the position in the X direction with respect to ΔY being substantially zero. X. The X-direction offset is obtained at each position in the X direction by trial and error before mass production. Therefore, an attempt is made to function the offset of the substrate holding platform 7.

圖9係此時所使用之模擬基板40,尺寸為240mm×64mm,但因由於基板保持平台7之Y方向位置之不同而位置偏移量不會產生變化,故以使僅求出X方向之每個位置之位置偏移量。於圖9中,6號之位置為基板保持平台之X方向之中心,將此點設為零,以左右各100mm之每20mm之間隔,進行模擬晶片零件20與模擬基板40之位置偏移量之測定。測定時,模擬晶片零件20及模擬基板40使用透明玻璃製品,從而較容易識別模擬晶片零件20之對準標記MC及模擬基板40之對準標記MB之兩者。又,位置對準階段中,將兩個對準標記間之中心之偏移量設為0.1μm以下。又,加壓力關於50(N)、100(N)及150(N)之3個條件而進行。其結果,即所獲得之結果如圖10。自該圖10之結果來看,使加壓力於50(N)至150(N)之範圍內變化時之位置偏移量由近似式求出,而獲得圖11。 9 is a simulation substrate 40 used at this time, and has a size of 240 mm × 64 mm. However, since the positional shift amount does not change due to the position of the substrate holding stage 7 in the Y direction, only the X direction is obtained. The position offset of each position. In FIG. 9, the position of No. 6 is the center of the X-direction of the substrate holding platform, and this point is set to zero, and the positional offset between the analog wafer component 20 and the dummy substrate 40 is performed at intervals of 20 mm each of the left and right sides of 100 mm. Determination. At the time of measurement, the dummy wafer component 20 and the dummy substrate 40 use a transparent glass article, so that it is easier to identify both the alignment mark MC of the dummy wafer component 20 and the alignment mark MB of the dummy substrate 40. Further, in the alignment stage, the amount of shift between the centers of the two alignment marks is set to 0.1 μm or less. Further, the pressing force was carried out under three conditions of 50 (N), 100 (N) and 150 (N). As a result, the obtained result is shown in FIG. From the results of FIG. 10, the amount of positional shift when the pressing force is changed within the range of 50 (N) to 150 (N) is obtained by an approximate expression, and FIG. 11 is obtained.

因此,根據由圖11而得之加壓力120(N)時之位置偏移量而設定偏 移,進行模擬晶片零件20與模擬基板40之貼合,並且可確認於所有點處位置偏移量為0.5μm以下。 Therefore, the offset is set according to the positional deviation when the pressure 120 (N) is obtained from FIG. The bonding of the dummy wafer component 20 and the dummy substrate 40 was performed, and it was confirmed that the positional shift amount at all points was 0.5 μm or less.

[產業上之可利用性] [Industrial availability]

本發明之安裝方法可簡易地求出一直以來每種生產條件下伴隨著試誤而求出之偏移,從而提高生產效率,故可適用於對晶片零件之基板的安裝要求高精度之所有領域。 According to the mounting method of the present invention, it is possible to easily obtain the offset which has been obtained with trial and error under each production condition, thereby improving the production efficiency, and thus it is applicable to all fields requiring high precision for mounting the substrate of the wafer component. .

1‧‧‧倒裝晶片安裝裝置 1‧‧‧Flip Chip Mounting Device

2‧‧‧晶片零件 2‧‧‧ wafer parts

3‧‧‧突起電極 3‧‧‧ protruding electrode

4‧‧‧基板 4‧‧‧Substrate

5‧‧‧電極 5‧‧‧Electrode

6‧‧‧鍵合頭 6‧‧‧ Bonding head

7‧‧‧基板保持平台 7‧‧‧Substrate retention platform

8‧‧‧2視野攝像機 8‧‧‧2 field of view camera

12‧‧‧控制部 12‧‧‧Control Department

X‧‧‧基板保持平台7之移動方向 X‧‧‧The direction of movement of the substrate holding platform 7

Y‧‧‧基板保持平台7之移動方向 Y‧‧‧The direction of movement of the substrate holding platform 7

θ‧‧‧基板保持平台7之移動方向 θ‧‧‧The direction of movement of the substrate holding platform 7

Claims (4)

一種安裝方法,其係以圖像識別設備對晶片零件之對準標記及基板之對準標記進行識別,從而進行晶片零件與基板之對準,然後將晶片零件加壓並安裝於基板上者,其特徵在於:將抵消對準後加壓安裝晶片零件時產生之位置偏移量之安裝偏移設定為保持基板之基板保持平台面內之位置及接合時之加壓力之函數。 An installation method for identifying an alignment mark of a wafer part and an alignment mark of a substrate by an image recognition device, thereby performing alignment of the wafer part and the substrate, and then pressing and mounting the wafer part on the substrate, It is characterized in that the mounting offset for offsetting the positional displacement generated when the wafer component is pressed and attached after alignment is set as a function of maintaining the position of the substrate holding plate surface of the substrate and the pressing force at the time of bonding. 如請求項1之安裝方法,其中求出相對於基板保持平台面內之複數個位置之複數個條件的加壓力之位置偏移量,基於該結果,導出表示基板保持平台面內之位置及接合時之加壓力與位置偏移量之關係的函數。 The mounting method of claim 1, wherein the positional deviation of the pressing force of the plurality of conditions with respect to the plurality of positions in the surface of the substrate holding platform is obtained, and based on the result, the position and the bonding indicating the surface of the substrate holding platform are derived. A function of the relationship between the pressure and the positional offset. 如請求項2之安裝方法,其中於求出相對於基板保持平台面內之複數個位置之複數個條件的加壓力之位置偏移量時,使用記錄有對準標記之透明之晶片零件。 In the mounting method of claim 2, wherein the positional offset of the pressing force of the plurality of conditions with respect to the plurality of positions in the plane of the substrate is determined, a transparent wafer component on which the alignment mark is recorded is used. 一種安裝裝置,其係具有以下部分之安裝裝置:將晶片零件吸附保持之鍵合頭、使鍵合頭於上下方向移動之機構、將基板載置保持之基板保持平台、使鍵合頭與基板保持平台相對地於水平方向及旋轉方向移動之機構、及可進退地設置於鍵合頭與基板保持平台之空間且可同時對頭部側及基板保持平台側進行攝像之2視野識別設備,且該安裝裝置具備進行如請求項1至3中任一項之安裝方法之功能。 A mounting device having a mounting device for holding and holding a wafer component, a mechanism for moving the bonding head in the up and down direction, a substrate holding platform for holding the substrate, and a bonding head and a substrate a mechanism for moving the platform relative to the horizontal direction and the rotation direction, and a second field of view recognition device capable of retracting the space between the bonding head and the substrate holding platform and simultaneously imaging the head side and the substrate holding platform side, and The mounting device has a function of performing the mounting method according to any one of claims 1 to 3.
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JP5784639B2 (en) * 2010-02-26 2015-09-24 マイクロニック エービー Method and apparatus for alignment optimization for multiple layers

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108206154A (en) * 2016-12-19 2018-06-26 技鼎股份有限公司 It applies in the crystal grain localization method and production equipment for being fanned out to processing procedure
CN108206154B (en) * 2016-12-19 2020-06-19 技鼎股份有限公司 Grain positioning method and production equipment applied to fan-out process

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JPWO2014119434A1 (en) 2017-01-26
WO2014119434A1 (en) 2014-08-07
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TWI605537B (en) 2017-11-11
KR102129648B1 (en) 2020-07-02

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