SU1203707A1 - Delta modulator - Google Patents

Description

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The invention relates to computing and telecommunications and can be used, for example, to qualitatively convert speech signals into digital form.

The purpose of the invention is to improve the races

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knowability of convertible signals.

FIG. 1 shows the functional delta-modulator circuit of FIG. 2 - time diagrams that show his work.

The delta modulator contains an input filter 1 through which the device input is connected to the first input of the comparator 2, the output of which is connected to the first input of the trigger 3. The output of the trigger 3 is connected to the information input of the shift register 4 and is simultaneously the output of the device. The direct and inverse outputs of the shift register 4, are connected to the equivalence element 5, the output of which through the filter 6 is connected simultaneously to the control inputs of the first, second and third amplitude-pulse modulators 7-9. The outputs of the amplitude-pulse modulators 7-9 are connected through the first inputs of the first, second and third converters 10-12 of the polarity, respectively, to the inputs of the first, second and third integrators 13-15, respectively. The outputs of the first, second and third integrators 13-15 led to the inputs of the adder 16, the output of which is connected to the second input of the comparator 2.

The inputs of the first and second elements And 17 and 18 are connected respectively to the direct and inverse outputs of the first two bits of the 4-shift register, and the outputs of elements And 17 and 18 are connected to the control inputs of the second pulse-amplitude modulator 8. The inputs of the third and fourth The elements 19 and 20 are connected respectively to the direct and inverse outputs of the first three bits of the 4 shift register, and the outputs of the elements 19 50 and 20 are connected to the control inputs of the third pulse-amplitude module 30

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This device is connected to the inputs of the And 17 and 18 elements, and its output is connected to the second inputs of the first, second and third inverters 10-12.

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In addition, the control inputs of the first amplitude-pulse modulator 7 are connected to the forward and inverse outputs of the first bit of the shift register 4, the clock input of which is combined with the clock input of trigger 3 and connected to the clock bus 22.

In the noise compensation unit 21, for example, four AND elements, two shift registers, two NOT elements and a polarity converter connected in series, an integrator and an amplifier, connected to the output, block 21, whose inputs are represented by the inputs of two AND elements, whose outputs connected to the inputs of the corresponding shift registers, the outputs of which through the other two elements AND are connected to the inputs of the polarity converter, and the input of each shift register is combined with the input of the element NOT, the output of which is connected to another input of others element I. However, the performance of the noise compensation unit may be different.

The delta modulator operates as follows.

The input signal U (t) (Fig. 2c |), bounded by the input filter 1, is fed to the first input of the comparator 2 / to the second input of which the approximation signal U (t) (Fig. 2a) is generated, formed by the feedback coder . The results of the comparison in the form of single or zero information bits with the arrival of successive clock pulses (Fig. 2) are written to trigger 3 (Fig. 26) and shift register 4.

The equivalence element 5 and the filter 6, as a result of analyzing the part of the output sequence y (t) recorded in the register (Fig. 25) of the delta modulator, form a slowly varying syllable Vc proportional to the amplitude and frequency of the input signal U (t). The level Vc is fed to the control inputs of the first, second-Q-th, and third amplitude-pulse modulators 7-9, with the result that the quantization stage of signals restored on the first, second, and third integrators 13-15 is a function of amplitude and frequency input signal, i.e. A syllable adaptation of the quantization step to the input signal parameters is carried out.

Digital control signals to the inputs of all amplitude-pulse

.modulators 7-9 are formed by I1DiVidual algorithms and are different.

The first pulse-amplitude modulator 7 is controlled directly by the reciprocal DM-stream V (t), delayed by one clock using the shift register 4. The second amplitude-pulse modulator 8 is controlled by two-ji more elementary bursts of the output signal U (t), captured using a shift register 4 and And elements 17 and 18 (Fig. 2 t, 2). The third pulse-amplitude modulator 9 is controlled by a three and. more elemental bursts of the signal Y (t), allocated using the shift register 4 and the elements and 19 and 20 (Fig. 2e, 3s).

As you know, double, triple, and more elemental bursts of the same type of characters appear in the output signal Y (t) of a delta modulator t0

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yes, when the approximation signal cannot catch up with the input signal for two, three or more clock intervals. Thus, at the moments of an intense increase in the input signal U (t), the quantization step U (t) of the approximation at the output of the adder 16, determined by the signal from the output of the first integrator 13 (Fig. 2h), increases due to the increase in voltage U (t) and) at the outputs of the second and third integrators .14 and 15 (Fig. 2 I, K-,). The result is an increase in the tracking accuracy of the approximation signal U (t) behind the input signal U (t) and a reduction in overload noise at high frequencies of the input signals.

The noise compensation unit 21 serves to suppress the free channel noise.

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Compiled by O. Revinsky Editor O. Yurkovetska Tehred Z. Kastelevich

Order 8430/61 Circulation 871 Subscription

VNIIPI USSR State Committee

for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5

Branch PPP Patent, Uzhgorod, Proektna St., 4

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Corrector C, Shekmar

Claims (1)

DELTA-MODULATOR containing a comparator, the first input of which is connected through the input filter to the modulator input, and the output is connected to the trigger input, the output of which is connected to the modulator output and connected to the information input of the register, shift, the direct and inverse outputs of discharges of which are connected to the corresponding inputs an equivalence element to the output of which a filter is connected in series, a first pulse-amplitude modulator, a first polarity converter and a first integrator, direct and inverse outputs two of the first bits of the shift register are connected to the corresponding inputs of the noise reduction unit, the output of which is connected to another input of the first polarity converter, the trigger synchronization inputs and the shift register are combined and connected to the synchronization bus, characterized in that, in order to improve the recognition of the converted signals, it introduced in series are a second amplitude-pulse modulator, a second polarity converter and a second integrator, connected in series with a third amplitude o-pulse modulator, third polarity converter and third integrator, adder and four AND elements, inputs of the first and second elements AND are connected respectively to the direct and inverse outputs of the first two bits of the shift register, and the outputs to the control inputs of the second amplitude-pulse modulator, the inputs of the third and fourth elements of And are connected respectively to the direct and inverse outputs of the first three bits of the shift register, and the outputs to the control inputs of the third amplitude ^ -pulse modulator, the input of which is connected to the input of the second amplitude-pulse modulator and connected to the filter output, the output of the noise reduction unit is connected to other inputs of the second and third polarity converters, the outputs of all integrators are connected to the inputs of the adder, the output of which is connected to the second input of the comparator, the control inputs of the first amplitude-pulse modulator are connected to direct and inverse outputs of the first category of the shift register. SU „„ 1203707