KR960043756A - Voltage generating method, voltage generating circuit and monitor device - Google Patents
Voltage generating method, voltage generating circuit and monitor device Download PDFInfo
- Publication number
- KR960043756A KR960043756A KR1019960018729A KR19960018729A KR960043756A KR 960043756 A KR960043756 A KR 960043756A KR 1019960018729 A KR1019960018729 A KR 1019960018729A KR 19960018729 A KR19960018729 A KR 19960018729A KR 960043756 A KR960043756 A KR 960043756A
- Authority
- KR
- South Korea
- Prior art keywords
- waveform data
- voltage
- voltage generating
- waveform
- generated
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
- H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
- H04N3/16—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
- H04N3/18—Generation of supply voltages, in combination with electron beam deflecting
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/63—Generation or supply of power specially adapted for television receivers
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Theoretical Computer Science (AREA)
- Details Of Television Scanning (AREA)
- Measurement Of Current Or Voltage (AREA)
Abstract
본 발명의 목적은 발생해야 할 전압의 파형을 근사한 파형 데이타에 기초하여 전압을 발생시키는 전압 발생방법, 전압 발생 회로 및 모니터장치를 제공하는 것이다. 본 발명의 구성은 발생해야 할 파라볼라파 전압의 파형을 곡선 근사하는 파형 데이타가 저장되는 기억 용량이 작은 메모리(10)와, 메모리(10)로부터 판독한 파형데이타를 입력해야 할 CPU(11)와, 판독한 파형 데이타에 기초하여 CPU(11)의 직선 근사의 파형 데이타를 연산하고, CPU(11)로부터 출력되는 연산한 직선 근사의 파형 데이타를 디지탈/아날로그 변환하는 디지탈/아날로그 컨버터(13)를 구비한다.It is an object of the present invention to provide a voltage generating method, a voltage generating circuit and a monitor apparatus for generating a voltage based on waveform data approximating a waveform of a voltage to be generated. The configuration of the present invention includes a memory 10 having a small storage capacity storing waveform data approximating a waveform of a parabola wave voltage to be generated, a CPU 11 having to input waveform data read from the memory 10, and The digital / analog converter 13 for calculating the waveform data of the linear approximation of the CPU 11 based on the read waveform data, and digitally / analog converting the waveform data of the calculated linear approximation output from the CPU 11. Equipped.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1도는 본 발명에 관한 전압 발생 회로의 구성을 도시하는 블럭도, 제2도는 메모리의 데이타 테이블의 개념도, 제3도는 파라볼라파 전압을 직선 근사하는 경우의 개념도, 제4도는 파라볼라파 전압을 곡선 근사하는 경우의 개념도, 제5도는 CPU의 제어 내용을 도시하는 플로우차트, 제6도는 본 발명에 관한 전압 발생 회로의 다른 실시예의 구성을 도시하는 블럭도, 제7도는 메모리의 데이타 테이블의 개념도, 제8도는 파형 합성부의 구성을 도시하는 블럭도, 제9도는 정현파 전압을 곡선 근사하는 경우의 개념도, 제10도는 CPU의 제어 내용을 도시하는 플로우차트, 제11도는 정현파, 톱니파 및 보정한 톱니파의 파형도, 제12도는 표시 화상의 표시 상태의 설명도, 제13도는 표시 화상의 보빈 왜곡의 설명도, 제14도는 수직 파라볼라파 전압의 파형도, 제15도는 종래의 파라볼라파 전압 발생 회로의 블럭도, 제16도는 메모리의 데이타 테이블의 개념도, 제17도는 CPU의 제어 내용을 도시하는 플로우차트.1 is a block diagram showing the configuration of a voltage generating circuit according to the present invention, FIG. 2 is a conceptual diagram of a data table of a memory, FIG. 3 is a conceptual diagram when a parabola wave voltage is approximated linearly, and FIG. 4 is a parabola wave voltage curve. Fig. 5 is a flowchart showing the control contents of the CPU, Fig. 6 is a block diagram showing the construction of another embodiment of the voltage generation circuit according to the present invention, and Fig. 7 is a conceptual diagram of the data table of the memory. FIG. 8 is a block diagram showing the configuration of the waveform synthesizer, FIG. 9 is a conceptual diagram when the curve approximates a sine wave voltage, FIG. 10 is a flowchart showing the control contents of the CPU, and FIG. Fig. 12 is an explanatory diagram of the display state of the display image, Fig. 13 is an explanatory diagram of bobbin distortion of the display image, Fig. 14 is a waveform diagram of the vertical parabola wave voltage, and Fig. 15 is a conventional diagram. Fig. 16 is a flowchart showing the concept of the data table of the memory, and Fig. 17 showing the control contents of the CPU.
Claims (3)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7133375A JPH08331404A (en) | 1995-05-31 | 1995-05-31 | Voltage generating method, voltage generating circuit and monitoring device |
JP95-133375 | 1995-05-31 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR960043756A true KR960043756A (en) | 1996-12-23 |
KR100269755B1 KR100269755B1 (en) | 2000-10-16 |
Family
ID=15103269
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019960018729A KR100269755B1 (en) | 1995-05-31 | 1996-05-30 | Voltage generating method, voltage generating circuit and monitor device |
Country Status (4)
Country | Link |
---|---|
JP (1) | JPH08331404A (en) |
KR (1) | KR100269755B1 (en) |
CN (1) | CN1140853A (en) |
TW (1) | TW349195B (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6295097B1 (en) | 1999-05-26 | 2001-09-25 | Thomson Licensing S.A. | Piece-wise linearized waveform generator for scan velocity modulation circuit |
US6493040B1 (en) | 1999-05-26 | 2002-12-10 | Thomson Licensing S.A. | Scan velocity modulation circuit with multi-mode operation |
US6498626B1 (en) | 1999-05-26 | 2002-12-24 | Thomson Licensing S.A. | Video signal processing arrangement for scan velocity modulation circuit |
CN100353669C (en) * | 2002-04-17 | 2007-12-05 | 湖南科技大学 | Virtual signal generator for generating square wave by remainder interpolation comparision |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2579390A1 (en) * | 1985-03-22 | 1986-09-26 | Enertec | DIGITAL WAVEFORM GENERATOR AND METHOD THEREOF |
-
1995
- 1995-05-31 JP JP7133375A patent/JPH08331404A/en active Pending
-
1996
- 1996-02-07 TW TW085101489A patent/TW349195B/en active
- 1996-05-30 KR KR1019960018729A patent/KR100269755B1/en not_active IP Right Cessation
- 1996-05-31 CN CN96108032A patent/CN1140853A/en active Pending
Also Published As
Publication number | Publication date |
---|---|
CN1140853A (en) | 1997-01-22 |
KR100269755B1 (en) | 2000-10-16 |
TW349195B (en) | 1999-01-01 |
JPH08331404A (en) | 1996-12-13 |
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Payment date: 20070710 Year of fee payment: 8 |
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LAPS | Lapse due to unpaid annual fee |