KR960016363B1 - Circuit for selecting column of semiconductor memory device - Google Patents

Circuit for selecting column of semiconductor memory device Download PDF

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Publication number
KR960016363B1
KR960016363B1 KR93024054A KR930024054A KR960016363B1 KR 960016363 B1 KR960016363 B1 KR 960016363B1 KR 93024054 A KR93024054 A KR 93024054A KR 930024054 A KR930024054 A KR 930024054A KR 960016363 B1 KR960016363 B1 KR 960016363B1
Authority
KR
South Korea
Prior art keywords
circuit
bit line
memory device
semiconductor memory
column
Prior art date
Application number
KR93024054A
Other languages
Korean (ko)
Other versions
KR950015381A (en
Inventor
Sang-Hyun Lee
Seung-Bong Kim
Original Assignee
Lg Semicon Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lg Semicon Co Ltd filed Critical Lg Semicon Co Ltd
Priority to KR93024054A priority Critical patent/KR960016363B1/en
Publication of KR950015381A publication Critical patent/KR950015381A/en
Application granted granted Critical
Publication of KR960016363B1 publication Critical patent/KR960016363B1/en

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay

Landscapes

  • Dram (AREA)
  • Static Random-Access Memory (AREA)

Abstract

The circuit comprises a bit line control circuit which is connected between a pair of bit lines, and comprises: a column selector circuit(10) which is controlled by a signal(/Ya) having an opposite phase to a column-selecting signal(Ya) and has two PMOS transistors whose gates are connected each other; a bit line drive circuit(40) making a bit line in a pull-up state or in a floating state according to the bit line selection of the column selector circuit(10); and a control logic(30) controlling the bit line drive circuit(40).
KR93024054A 1993-11-12 1993-11-12 Circuit for selecting column of semiconductor memory device KR960016363B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR93024054A KR960016363B1 (en) 1993-11-12 1993-11-12 Circuit for selecting column of semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR93024054A KR960016363B1 (en) 1993-11-12 1993-11-12 Circuit for selecting column of semiconductor memory device

Publications (2)

Publication Number Publication Date
KR950015381A KR950015381A (en) 1995-06-16
KR960016363B1 true KR960016363B1 (en) 1996-12-09

Family

ID=19367938

Family Applications (1)

Application Number Title Priority Date Filing Date
KR93024054A KR960016363B1 (en) 1993-11-12 1993-11-12 Circuit for selecting column of semiconductor memory device

Country Status (1)

Country Link
KR (1) KR960016363B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100600056B1 (en) * 2004-10-30 2006-07-13 주식회사 하이닉스반도체 Semiconductor device for low voltage

Also Published As

Publication number Publication date
KR950015381A (en) 1995-06-16

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