KR940001333A - Resin-sealed solid state image pickup device package and manufacturing method thereof - Google Patents

Resin-sealed solid state image pickup device package and manufacturing method thereof Download PDF

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Publication number
KR940001333A
KR940001333A KR1019920010430A KR920010430A KR940001333A KR 940001333 A KR940001333 A KR 940001333A KR 1019920010430 A KR1019920010430 A KR 1019920010430A KR 920010430 A KR920010430 A KR 920010430A KR 940001333 A KR940001333 A KR 940001333A
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South Korea
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lead
chip
resin
semiconductor chip
lead frame
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KR1019920010430A
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Korean (ko)
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허기록
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문정환
금성일렉트론 주식회사
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Priority to KR1019920010430A priority Critical patent/KR940001333A/en
Priority to TW82103391A priority patent/TW222713B/zh
Priority to JP12603093A priority patent/JPH0653462A/en
Priority to DE19934319786 priority patent/DE4319786A1/en
Publication of KR940001333A publication Critical patent/KR940001333A/en
Priority to US08/337,016 priority patent/US5534725A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/315—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the encapsulation having a cavity
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0102—Calcium [Ca]
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    • H01L2924/01—Chemical elements
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/01—Chemical elements
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/162—Disposition
    • H01L2924/16235—Connecting to a semiconductor or solid-state bodies, i.e. cap-to-chip
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

본 발명은 수지봉합형 고체촬상소자 패키지 및 그 제조방법에 관한 것으로, 다수개의 본드패드(1a)와 수광영역부(1b)를 가지는 반도체칩(1); 상기 반도체칩(1)이 부착고정되는 패들(2)과 반도체칩(1)에 와이어본딩되는 다수개의 리드(3)가 구비된 리드프레임; 상기 반도체칩(1)의 수광영역부(16) 주위에 소정두께로 형성되는 필림벽(4); 상기 필림벽(4)위에 탑재되어 칩동작에 필요한 빛을 투과시키는 글라스리드(5), 상기 반도체팁(1)과 리드프레임의 인너리드(3a)를 접속하여 전기적으로 연결시키는 금속와이어(6); 와이어본딩된 칩(1)과 리드프레임의 인너리드(3a)를 포함하는 일정 면적을 밀폐시켜 패키지 몸체를 형성하는 모울드수지(7)로 구성되며, 이와 같이된 본 발명은 저가이며 성형성이 우수한 플라스틱을 이용하여 일반 플라스틱 패키지와 같이 트랜스퍼 몰딩함으로써 제조공정을 보다 간소화하고, 제조공정시간을 단축하여 대량생산 및 제조원가 절감을 도모함과 아울러 패키지의 경박단소화에 기여하는 등의 효과가 있다.The present invention relates to a resin-sealed solid-state image pickup device package and a manufacturing method thereof, comprising: a semiconductor chip (1) having a plurality of bond pads (1a) and a light receiving area portion (1b); A lead frame including a paddle 2 to which the semiconductor chip 1 is attached and a plurality of leads 3 wire-bonded to the semiconductor chip 1; A film wall 4 formed at a predetermined thickness around the light receiving region 16 of the semiconductor chip 1; A glass lead 5 mounted on the film wall 4 to transmit light necessary for chip operation, and a metal wire 6 connecting and electrically connecting the semiconductor tip 1 to the inner lead 3a of the lead frame. ; The present invention is composed of a mold resin 7 sealing a predetermined area including a wire bonded chip 1 and an inner lead 3a of a lead frame to form a package body. Transfer molding like a general plastic package using plastics further simplifies the manufacturing process, shortens the manufacturing process time, improves mass production and manufacturing cost, and contributes to light and short package reduction.

Description

수지봉합형 고체촬상소자 패키지 및 그 제조방법Resin-sealed solid state image pickup device package and manufacturing method thereof

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 일반적인 고체촬상소자 패키지의 구성을 보인 종단면도,1 is a longitudinal cross-sectional view showing the configuration of a general solid-state image pickup device package,

제2도 및 제3도는 본 발명에 의한 수지봉합형 고체촬상소자 패키지의 구성을 보이는 도면으로서, 제2도는 종단면도,2 and 3 are views showing the configuration of the resin-sealed solid-state image pickup device package according to the present invention.

제3도는 횡단면도,3 is a cross-sectional view,

제4도는 본 발명에 의한 수지봉합형 고테촬상소자 패키지의 제조 공정도.4 is a manufacturing process diagram of the resin-sealed gothic image pickup device package according to the present invention.

Claims (6)

다수개의 본드패드(1a)와 수광영역부(1b)를 가지는 반도체칩(1); 상기 반도체칩(1)이 부착고정되는 패들(2)과 반도체칩(1)에 와이어본딩되는 다수개의 리드(3)가 구비된 리드프레임; 상기 반도체칩(1)의 수광영역부(16) 주위에 소정두께로 형성되는 필림벽(4); 상기 필림벽(4)위에 탑재되어 칩동작에 필요한 빛을 투과시키는 글라스리드(5); 상기 반도체칩(1)과 리드프레임의 인너리드(3a)를 접속하여 전기적으로 연결시키는 금속와이어(5); 와이어본딩된 칩(1)과 리드프레임의 인너리드(3a)를 포함하는 일정면적을 밀폐시켜 패키지 몸체를 형성하는 모울드수지(7)로 구성됨을 특징으로 하는 수지봉합형 고체촬상소자 패키지.A semiconductor chip 1 having a plurality of bond pads 1a and a light receiving region portion 1b; A lead frame including a paddle 2 to which the semiconductor chip 1 is attached and a plurality of leads 3 wire-bonded to the semiconductor chip 1; A film wall 4 formed at a predetermined thickness around the light receiving region 16 of the semiconductor chip 1; A glass lead 5 mounted on the film wall 4 to transmit light necessary for chip operation; A metal wire (5) connecting the semiconductor chip (1) and the inner lead (3a) of the lead frame to electrically connect the semiconductor chip (1); A resin-sealed solid-state image package comprising a mold resin (7) sealing a predetermined area including a wire bonded chip (1) and an inner lead (3a) of a lead frame to form a package body. 제1항에 있어서, 상기 필림벽(4)은 양면에 접착성을 갖는 열경화성 폴리머계열의 절연필림으로 형성됨을 특징으로 하는 수지봉합형 고체촬상소자 패키지.The resin-sealed solid-state image pickup device package according to claim 1, wherein the film wall (4) is formed of an insulating film of a thermosetting polymer series having adhesiveness on both surfaces. 제1항에 있어서, 상기 글라스리드(5)는 굴절율1.5, 투과율 90%이상의 고투명 글라스인 것을 특징으로 하는 수지봉합형 고체 촬상소자 패키지.The resin-sealed solid-state imaging device package according to claim 1, wherein the glass lead (5) is a highly transparent glass having a refractive index of 1.5 and a transmittance of 90% or more. 고체촬상소자 패키지를 제조하는 방법에 있어서, 소잉긍정에 의해 개개로 분리된 반도체칩을 리드프레임의 패들위에 부착고정하는 다이어태치공정; 다이어태치된 칩의 수광영역부 주위에 소정두께의 절연필림을 부착하여 필림벽을 형성하는 필림어태치공정; 상기 필림벽 위에 칩동작에 필요한 빛을 투과시키는 글라스리드를 탑재하는 글라스어태치공정; 탑재된 글라스리드를 밀착시키기 위하여 경화시키는 큐어공정; 상기 반도체칩과 리드프레임의 인너리드를 금속와이어로 접속하여 전기 적으로 연결시키는 와이어 본딩공정; 와이어본딩된 칩과 리드프레임의 인너리드를 포함하는 일정 면적을 모울드수지를 이용, 트랜스퍼 몰딩함으로써 패키지 몸체를 형성하는 몰딩공정; 몰딩된 패키지의 각 리드를 지지하고 있는 댐바를 절단하여 가각 독립된 패키지로 분리함과 아울러 아웃리드를 소정형태로 절곡 형성하는 트림/포밍공정으로 이루어지는 수지봉합형 고체촬상소자 패키지 제조방법.A method of manufacturing a solid state image pickup device package, comprising: a die attach step of attaching and fixing semiconductor chips individually separated by sawing on a paddle of a lead frame; A film attach process for forming a film wall by attaching an insulation film having a predetermined thickness around the light receiving area portion of the die-attached chip; A glass attach process for mounting a glass lead that transmits light necessary for chip operation on the film wall; Curing step of curing in order to adhere the mounted glass lead; A wire bonding process of electrically connecting the inner chip of the semiconductor chip and the lead frame with a metal wire to electrically connect the inner chip; A molding process of forming a package body by transfer molding a predetermined area including a wire bonded chip and an inner lead of a lead frame using mold resin; A method of manufacturing a resin-sealed solid-state imaging device package comprising a trim / forming process of cutting a dam bar supporting each lead of a molded package to separate the respective packages into separate packages and bending outleads into a predetermined shape. 제4항에 있어서. 상기 큐어공정은 150℃정도에서 1시간정도 큐어링하는 것을 특징으로 하는 수지봉합형 고체촬상소자 패키지 제조방법.The method of claim 4. The curing process is a resin-sealed solid-state imaging device package manufacturing method characterized in that the curing for about 1 hour at about 150 ℃. 제4항에 있어서, 상기 몰딩공정은 몰딩된 수지의 표면이 글라스리드의 표면과 일치하도록 성형하는 것을 특징으로 하는 수지봉합형 고체촬상소자 패키지 제조방법.The method of claim 4, wherein the molding process is performed such that the surface of the molded resin coincides with the surface of the glass lead. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920010430A 1992-06-16 1992-06-16 Resin-sealed solid state image pickup device package and manufacturing method thereof KR940001333A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
KR1019920010430A KR940001333A (en) 1992-06-16 1992-06-16 Resin-sealed solid state image pickup device package and manufacturing method thereof
TW82103391A TW222713B (en) 1992-06-16 1993-04-30
JP12603093A JPH0653462A (en) 1992-06-16 1993-05-27 Resin-sealed solid-state image sensing element package and its manufacture
DE19934319786 DE4319786A1 (en) 1992-06-16 1993-06-15 Compact plastics encapsulated charge coupled device unit for mass prodn. - comprises semiconductor chip, lead frame, thin confining wall of thermosetting polymer, glass cover, metal wires, and cast body e.g for camcorder
US08/337,016 US5534725A (en) 1992-06-16 1994-11-07 Resin molded charge coupled device package and method for preparation thereof

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KR1019920010430A KR940001333A (en) 1992-06-16 1992-06-16 Resin-sealed solid state image pickup device package and manufacturing method thereof

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DE4319786A1 (en) 1993-12-23
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