KR100658168B1 - Method for fabricating cmos image sensor - Google Patents

Abstract

A method for fabricating a CMOS image sensor is provided to reduce a leakage current and improve a moat characteristic by applying an HLD(High Temperature Low Pressure Deposition) oxide layer and a linear nitride layer to a trench of the remaining region except for a pixel region. A pad oxide layer and a pad nitride layer are formed on a semiconductor substrate(11) having a pixel region(22) and the remaining region(21). A photoresist is formed on the remaining region except for a trench forming region. A trench is formed by etching the exposed part of the substrate after etching the pad nitride layer of the remaining region except for the trench forming region and the pad nitride layer. An HLD oxide layer(15) is formed on the pixel region and the remaining region. A linear nitride layer(16) is formed thereon. The photoresist is formed on the substrate except for the trench forming region. A trench is formed by etching the exposed part of the substrate after etching the linear nitride layer, the HLD oxide layer, the pad nitride layer, and the pad oxide layer.

Description

Manufacturing method of CMOS image sensor {METHOD FOR FABRICATING CMOS IMAGE SENSOR}

1A through 1F are cross-sectional views illustrating processes of forming a device isolation layer using a conventional shallow trench isolation (STI) process;

2 is a cross-sectional view showing a CMOS image sensor manufactured according to the first embodiment of the present invention;

3 to 13 are process cross-sectional views illustrating a method of manufacturing the CMOS image sensor shown in FIG. 2.

* Explanation of symbols for the main parts of the drawings

11: first conductivity type semiconductor substrate

12: pad oxide film

13: pad nitride film

14: Photoresister

15: HLD (High Temperature Low Pressure Deposition)

16: linear nitride film

17 HDP (High Density Plasma) Oxide Film

18: trench

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor manufacturing technology, and more particularly, to a method for manufacturing a CMOS (Image Complementary Metal-Oxide-Silicon, CMOS) image sensor.

With the advance of semiconductor technology, the speed and the high integration of semiconductor elements are progressing rapidly, and with this, the demand for refinement | miniaturization of a pattern and high precision of a pattern dimension is increasing. This requirement applies not only to patterns formed in device regions, but also to device isolation films that occupy a relatively large area. This is because the width of the device region decreases as the device becomes more integrated, but in order to increase the width of the device region, the width of the device isolation region must be reduced.

The conventional device isolation film was formed by a local oxidation of silicon (LOCOS) process, and the device isolation film according to the LOCOS process generates bird's-beak having a beak shape at the edge thereof. The area of the device isolation layer is increased and there is a disadvantage of generating a leakage current.

Therefore, a method of forming a device isolation layer using a shallow trench isolation (STI) process having a small width and excellent device isolation characteristics instead of the method of forming a device isolation layer by the LOCOS process has been proposed, and most semiconductor devices are currently proposed. The device isolation film is formed by applying the STI process.

A method of forming a device isolation film using the STI process will be described below with reference to FIGS. 1A to 1F.

1A to 1F are cross-sectional views illustrating processes of forming a device isolation layer using a conventional STI process.

In the method of forming an isolation layer using an STI process, as illustrated in FIG. 1A, a photoresist layer pattern (not shown) defining a pad oxide layer 12, a pad nitride layer 13, and an isolation region on a silicon substrate 11 is illustrated. Form in turn. Subsequently, as illustrated in FIG. 1B, the pad nitride layer 13 and the pad oxide layer 12 below are etched using the photoresist pattern (not shown) as an etching mask, and then the exposed substrate portion. Is etched to form trenches 18 in the semiconductor substrate 11.

Subsequently, as shown in FIG. 1C, a trench 18 is filled by depositing an HDP (High Density Plasma) oxide film 17 on the entire structure.

Subsequently, as shown in FIG. 1D, the HDP oxide film 17 is subjected to chemical mechanical polishing (CMP) until the pad nitride film 13 is exposed. Next, the HDP oxide film 17 embedded in the trench 18 is planarized by chemical mechanical polishing using the pad nitride film 13 as a polishing stop film. Then, as shown in FIG. 1E, the remaining pad nitride film 13 is removed using an etchant such as H ₃ PO ₄ to form an STI 17 ′. At this time, since the H ₃ PO ₄ has excellent selectivity with respect to the oxide film, only a slight portion of the HDP oxide film 17 and the pad oxide film 12, which are device isolation films, are removed.

Subsequently, during the subsequent cleaning process, the edge portion A is eroded as shown in FIG. 1F to cause a moat phenomenon. The mott phenomenon causes a hump generated by concentrating an electric field at an active corner. And an inverse narrow width effect (INWE) occurs to deteriorate the electrical characteristics of the transistor of the device, which causes abnormal operation of the device.

Application of a linear nitride to the inside of the trench to form a device isolation layer using the STI process reduces leakage current and improves mote characteristics because the nitride has a smaller etching amount than the oxide.

However, since the process of applying the linear nitride film proceeds at a high temperature of about 650 to 750 degrees, deformation of the N-channel stop (NCST) implant doping profile occurs due to the high temperature during the process. That is, the application of the linear nitride film to the CMOS image sensor causes a change in the NCST doping profile, and therefore, it is not applied in the conventional method for manufacturing the CMOS image sensor.

In order to solve the above problems in the prior art, in particular, the linear nitride film and the HLD (High Temperature Low Pressure Deposition) oxide film are applied to a region other than the pixel to reduce the leakage current in the non-pixel region ( The purpose of the present invention is to provide a method of manufacturing a CMOS image sensor that improves leakage characteristics, and also improves mort.

In order to achieve the above object, according to a preferred embodiment of the present invention, after forming a pad oxide film on a first conductivity type semiconductor substrate having a pixel region and a non-pixel region, forming a pad nitride film, trenches in the non-pixel region Forming a photoresist on the substrate except for a portion to be formed, etching the pad nitride layer and the pad oxide layer of the portion where the trench of the non-pixel region is to be formed, and then etching the exposed portion of the substrate to form a trench Forming a high temperature low pressure deposition (HLD) oxide layer over the pixel region and the non-pixel region, and then forming a linear nitride layer, except for a portion where a trench is to be formed in the pixel region. Forming a photoresist on a substrate and said linearity of the portion where said trench in said pixel region is to be formed Hwamak, HLD oxide film, the pad and then etching the nitride film and the pad oxide film and then etching the exposed substrate portion of the method of manufacturing a CMOS image sensor includes forming a trench is provided.

According to another preferred embodiment of the present invention, after the pad oxide film is formed on the first conductive semiconductor substrate having the pixel region and the non-pixel region, a pad nitride film is formed, and trenches are formed in the pixel region and the non-pixel region. Forming a photoresist on the substrate excluding the portion to be formed, etching the pad nitride layer and the pad oxide layer of the portion where the trenches of the pixel region and the non-pixel region are to be formed, and then etching the exposed portion of the substrate. Forming a HLD oxide film on the pixel region and the non-pixel region, and then forming a linear nitride film, forming a photoresist on the non-pixel region, and the linear nitride film and the HLD of the pixel region. Provided is a method of manufacturing a CMOS image sensor comprising etching an oxide film.

The method of manufacturing the CMOS image sensor may further include forming an N-channel stop (NCST) photoresist in the pixel region, and removing the NCST photoresist after implanting ions. It is done.

In addition, in the method of manufacturing the CMOS image sensor of the present invention, after depositing a high density plasma (HDP) oxide film on the pixel region and the non-pixel region, chemical mechanical polishing is performed and the first conductive substrate is exposed. And removing the pad nitride film and the pad oxide film.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

2 is a cross-sectional view showing a CMOS image sensor manufactured according to an embodiment of the present invention.

In the CMOS image sensor illustrated in FIG. 2, the HLD oxide film 15 and the linear nitride film 16 are formed only in the trenches of the non-pixel region 21. The C portion to which the HLD oxide film 15 and the linear nitride film 16 are applied has improved mote characteristics compared to the D where the HLD oxide film and the linear nitride film are not applied. This is because the etching amount of the nitride film is smaller than that of the oxide film.

A preferred embodiment of the present invention for manufacturing the CMOS image sensor as shown in Figure 2 is as follows.

(Example 1)

3 to 8 are process cross-sectional views illustrating an embodiment of a method of manufacturing the CMOS image sensor illustrated in FIG. 2.

First, as shown in FIG. 3, a pad oxide film 12 is formed on a first conductive semiconductor substrate 11 having a pixel region 22 and an extrapixel region 21, and a pad nitride film 13 is formed. Since the nitride film and the substrate have different thermal expansion rates, it is preferable to first form a pad oxide film 12 that buffers rather than directly depositing the film. The pad oxide film 12 is preferably formed at about 100 GPa and the pad nitride film 13 is preferably formed at about 1450-1500 GPa.

Next, as shown in FIG. 4, after forming a photoresist 14 on the substrate 11 except for the portion to be etched to form a trench in the non-pixel region 21 of the first conductivity-type semiconductor substrate 11. 5, after etching the pad nitride layer 13 and the pad oxide layer 12 below, the exposed portion of the substrate 11 is etched to form a first conductive semiconductor substrate of the non-pixel region 21. 11) form a trench in it. Preferably, the depth of the trench is formed at about 3500 mm 3.

Thereafter, as shown in FIG. 6, the HLD oxide layer 15 is deposited on the non-pixel region 21 and the pixel region 22, and a linear nitride layer 16 is formed. Since the nitride film and the substrate have different thermal expansion rates, the HLD oxide film 15 having a buffer function is formed first rather than being deposited immediately.

Next, as shown in FIG. 7, the photoresist 14 is formed on the substrate 11 except for the portion to be etched to form the trench in the pixel region 22, and then the linear nitride layer 16 is formed as shown in FIG. 8. , The HLD oxide layer 15, the pad nitride layer 13, and the pad oxide layer 12 are sequentially etched, and then the exposed portion of the substrate 11 is etched to etch the first conductive semiconductor substrate 11 of the pixel region 22. Form a trench in it.

Subsequently, an N-channel stop (NCST) photoresist is formed only in the pixel region, and after implantation of ions, the NCST photoresist is removed (not shown).

Next, an HDP oxide film is deposited on top of the entire structure (the pixel region and the non-pixel region) and planarized by chemical mechanical polishing, and then the pad nitride layer 13 is removed until the first conductive semiconductor substrate is exposed. Subsequent processes for manufacturing the MOS image sensor may provide a CMOS image sensor in which the linear nitride layer 16 is formed only in the trench of the non-pixel region and the mote characteristics are improved, as shown in FIG. 2.

(Example 2)

9 to 13 are cross-sectional views illustrating still another embodiment of the method of manufacturing the CMOS image sensor illustrated in FIG. 2.

First, as shown in FIG. 3, a pad oxide film 12 is formed in the first conductive semiconductor substrate 11 having the pixel region 22 and the non-pixel region 21, and the pad nitride film 13 is formed. Since the nitride film and the substrate have different thermal expansion rates, it is preferable to first form a pad oxide film 12 which functions as a buffer rather than being deposited immediately. The pad oxide film 12 is preferably formed at about 100 GPa and the pad nitride film 13 is preferably formed at about 1450-1500 GPa.

Next, as shown in FIG. 9, after forming the photoresist 14 on the substrate 11 except for the portion to be etched to form trenches in the non-pixel region 21 and the pixel region 22, as shown in FIG. 10. After etching the pad nitride layer 13 and the pad oxide layer 12 thereunder, the exposed portion of the substrate 11 is etched to etch the first conductive semiconductor of the non-pixel region 21 and the pixel region 22. A trench is formed in the substrate 11.

Thereafter, as shown in FIG. 11, an HLD oxide film 15 is deposited on the non-pixel region 21 and the pixel region 22, and a linear nitride layer 16 is formed. Since the nitride film and the substrate have different thermal expansion rates, the HLD oxide film 15 having a buffer function is formed first rather than being deposited immediately.

Next, as shown in FIG. 12, a photo on the non-pixel region 21 of the substrate 11 except for the portion to be etched to remove the HLD oxide layer 15 and the linear nitride layer 16 over the pixel region 22. After the resistor 14 is formed, the linear nitride film 16 and the HLD oxide film 15 are etched as shown in FIG. 13.

Thereafter, an N-channel stop (NCST) photoresist is formed only in the pixel region, and ion implantation is performed to remove the NCST photoresist (not shown).

Next, an HDP oxide film is deposited on the entire structure (the pixel region and the non-pixel region) and planarized by chemical mechanical polishing, and then the pad nitride film 13 and the pad oxide film (until the first conductive semiconductor substrate is exposed). 12) and the subsequent process for fabricating the CMOS image sensor, as shown in FIG. 2, a linear nitride film 16 is formed only inside the trench in the non-pixel region and the CMOS image sensor with improved mortise characteristics is obtained. You can get it.

Although preferred embodiments have been described above, the present invention is not limited to the above-described embodiments and the accompanying drawings, and includes various substitutions, modifications, and changes within the scope without departing from the spirit of the present invention. It should be understood that the present invention encompasses all obvious technical ideas to those skilled in the art.

As described above, in the method of manufacturing the CMOS image sensor, in particular, by applying the HDP oxide film and the linear nitride film to the trench in the region other than the pixel, the leakage current in the non-pixel region is reduced (improve leakage characteristics). In addition, it provides the effect of improving the mote properties.

Claims (6)

Forming a pad nitride film on the first conductivity type semiconductor substrate having the pixel region and the non-pixel region; Forming a photoresist on the substrate except for a portion where the trench is to be formed in the non-pixel region; Etching the pad nitride layer and the pad oxide layer of the portion where the trench in the non-pixel region is to be formed, and then etching the exposed portion of the substrate to form a trench; Forming a high temperature low pressure deposition (HLD) oxide film on the pixel area and the non-pixel area, and then forming a linear nitride film; Forming a photoresist on the substrate except for a portion where the trench is to be formed in the pixel region; And And sequentially etching the linear nitride film, the HLD oxide film, the pad nitride film, and the pad oxide film of the portion where the trench is to be formed in the pixel region, and then etching the exposed portion of the substrate to form a trench. Way. The method of claim 1, On the pixel area And forming an N-channel stop (NCST) photoresist, implanting ions, and then removing the NCST photoresist. The method of claim 2, On the pixel region and the non-pixel region And performing a chemical mechanical polishing after a high density plasma (HDP) oxide film process and removing the pad nitride film until the first conductivity type substrate is exposed. Forming a pad nitride film on the first conductivity type semiconductor substrate having the pixel region and the non-pixel region; Forming a photoresist on the substrate except for portions where trenches are to be formed in the pixel region and the non-pixel region; Etching the pad nitride layer and the pad oxide layer of the portion where the trenches of the pixel region and the non-pixel region are to be formed, and then etching the exposed portion of the substrate to form a trench; Forming an HLD oxide film on the pixel region and the non-pixel region, and then forming a linear nitride film; Forming a photoresist on the non-pixel region; And Etching the linear nitride film and the HLD oxide film in the pixel region. The method of claim 4, wherein In the pixel area And forming an N-channel stop (NCST) photoresist, implanting ions, and then removing the NCST photoresist. The method of claim 5, On the pixel region and the non-pixel region And performing a chemical mechanical polishing after a high density plasma (HDP) oxide film process and removing the pad nitride film until the first conductivity type substrate is exposed.

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