KR100565754B1 - Method for forming semi-conductor device - Google Patents

Abstract

The present invention is to improve the characteristics of the transistor by completely preventing the channel layer from being damaged by shielding the portion of the channel layer to be formed at the same time during the ion implantation process for forming the n-type well region and p-type well region A method of forming an element, the method comprising: forming an isolation layer in a semiconductor substrate divided into a pMOS region and an nMOS region, and forming a first mask and a second mask to shield a region of the pMOS channel layer and an nMOS region; Forming an n-type well by ion implantation, and forming a p-type well by ion implantation after forming third and fourth masks for shielding the channel layer of the nMOS and the region where the pMOS is to be formed; Forming a gate oxide film and a gate on the semiconductor substrate, ion implanting low concentration impurities using the gate as a mask to form an LDD region, and It characterized in that the method comprising the root side walls forming the side wall spacers, and the sidewall spacer as a mask comprises the steps of forming a source / drain region by ion-implanting high concentration impurities.

Transistor, Channel Layer Damage, CMOS

Description

Method for Forming Semiconductor Device {Method for Forming Semi-conductor Device}

1A to 1D are cross-sectional views illustrating a method of forming a semiconductor device according to the prior art.

2A to 2D are cross-sectional views illustrating a method of forming a semiconductor device in accordance with the present invention.

* Explanation of symbols on the main parts of the drawings

111 semiconductor substrate 112 device isolation film

113: n-type well 115: p-type well

117: gate oxide film 118: gate

119: gate nitride film 121: LDD region

122: sidewall spacer 123: p-type source / drain region

124: n-type source / drain area 130: first mask

131: second mask

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of forming a semiconductor device for improving the characteristics of a transistor by completely preventing the channel layer from being damaged by ion implantation.

At present, semiconductor devices are required to form transistors, bit lines, capacitors, etc. of semiconductor devices for miniaturization, high capacity, and high integration, and thereafter, a subsequent process for forming multilayer wirings such as metal wirings to electrically connect the respective devices. I'm asking.

At this time, the transistor of the semiconductor device is composed of a MOS transistor having a short channel length to prevent short-channel effect, the source / drain region is generally a lightly doped drain (LDD) region and a heavily doped drain (HDD) region The CMOS device refers to a device having a pMOS transistor and an nMOS transistor simultaneously on a semiconductor substrate.

LDD regions have lower dopant concentrations and lower depths than HDD regions. However, the LDD region may be further adjacent to the gate electrode, setting the channel length of the MOS transistor. In contrast, the HDD area has a lower connection resistance.

As described above, in order to fabricate a MOS transistor having an LDD region and an HDD region, a gate dielectric and a gate electrode are first formed on a substrate, ion implanted using the gate electrode as a mask to form an LDD region, and then formed on the gate electrode sidewall. A spacer is formed and ion implanted to form an HDD region.

Subsequently, when an interlayer insulating film is formed on the entire surface including the gate, and a source / drain electrode contacting the HDD region is formed through the interlayer insulating film, the transistor of the semiconductor device is completed. Is complete.

Hereinafter, a method of forming a semiconductor device according to the prior art will be described in detail with reference to the accompanying drawings.

1A to 1D are cross-sectional views illustrating a method of forming a semiconductor device according to the prior art.

First, as shown in FIG. 1A, a region of an isolation layer (STI) is formed on the semiconductor substrate 11 to isolate each element, and a photoresist is applied on the semiconductor substrate 11. After forming the first mask 30 to open the pMOS region by patterning by exposure and development, the n-type well 13 and the n-type field are implanted by implanting phosphorus (P, Phosphorous), which is an n-type impurity, into the pMOS region. The stop layer 14 is formed sequentially.

After removing the first mask 30, as shown in FIG. 1B, a second mask for exposing the photoresist and patterning the photoresist and developing to expose the semiconductor substrate, ie, the nMOS region except for the pMOS region ( 31).

Subsequently, the p-type impurity is ion-implanted into the exposed nMOS region using the second mask 31 to form the p-type well 15 and the p-type field stop layer 16.

After removing the second mask 31, as shown in FIG. 1C, the gate oxide film 17, the gate 18, and the gate nitride film 19 are sequentially formed on the selected region on the semiconductor substrate 11. After that, the n-type LDD region 21 is formed in the nMOS transistor region by ion implantation of low concentration n-type impurities on the entire surface by a blanket ion implantation method.

1D, an oxide film is deposited on the entire surface, and then etched back to form a sidewall spacer 22 in contact with the sidewall of the gate electrode 18. At this time, the gate nitride film 19 and the gate oxide film 17 are also etched back.

Next, a high concentration p-type impurity is ion-implanted into the semiconductor substrate in the pMOS transistor region to form a p-type source / drain region 23, and a high concentration n-type impurity is ion implanted into the semiconductor substrate in the nMOS transistor region to n-type source / The drain region 24 is formed.

However, the conventional method of forming a semiconductor device as described above has the following problems.

That is, a portion where a channel layer is to be formed subsequently is exposed and damaged by an ion implantation process for forming an n-type well region and a p-type well region. Therefore, the characteristics of the transistor are deteriorated.

Accordingly, the present invention has been made to solve the above problems, the channel layer is damaged by shielding the portion of the channel layer to be formed at the same time during the ion implantation process for forming the n-type well region and p-type well region It is an object of the present invention to provide a method of forming a semiconductor device, which is intended to completely prevent receiving and improve characteristics of a transistor.

The method of forming a semiconductor device of the present invention for achieving the above object comprises the steps of forming an isolation layer in a semiconductor substrate divided into a pMOS region and an nMOS region, and shielding the channel layer and the nMOS region of the pMOS is formed. Forming an n-type well by ion implantation after forming the first and second masks, and ion implantation after forming third and fourth masks that shield the channel layer of the nMOS and the region where the pMOS is to be formed. forming a p-type well, forming a gate oxide film and a gate on the semiconductor substrate, ion implanting low concentration impurities using the gate as a mask to form an LDD region, and forming sidewalls on both sidewalls of the gate. Forming a spacer and ion implanting a high concentration of impurities using the sidewall spacer as a mask to form a source / drain region; The features.

As described above, in the ion implantation process for forming the n-type well region and the p-type well region, the channel layer is prevented from being damaged by shielding the portion where the channel layer is to be formed at the same time. In order to shield the channel layer, ion implantation is performed after a resist pattern is formed on the channel layer.

At this time, the resist pattern is formed using an exposure mask used when forming a gate.

Hereinafter, a method of forming a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

2A through 2D are cross-sectional views illustrating a method of forming a semiconductor device in accordance with the present invention.

First, as shown in FIG. 2A, a patterned photoresist is coated on a semiconductor substrate, and the trench is formed by anisotropically etching the semiconductor substrate using the photoresist as a mask.

Subsequently, an insulating film is deposited on the entire surface of the semiconductor substrate and then planarized to form the device isolation layer 112 to define the device formation region.

Next, an n-type well 113 is formed in the semiconductor substrate 111 of the pMOS transistor region on the semiconductor substrate 111 on which the device isolation process is performed to divide the logic region and the cell region. An n-type field stop layer 114 is formed in the well 113.

That is, a photoresist is applied on the semiconductor substrate 111 and patterned by exposure and development to form a first mask 130 that shields the region where the gate of the pMOS is to be formed and the region where the nMOS is to be formed, and then, in the pMOS region. Phosphorous (P), an n-type impurity, is ion-implanted to form the n-type well 113 and the n-type fieldstop layer 114 in sequence. Therefore, the channel layer of the pMOS is not damaged by ion implantation.

As shown in FIG. 2B, the p-type well 115 is formed in the semiconductor substrate 111 of the nMOS transistor region, and the p-type field stop layer 116 is formed in the p-type well 115.

That is, after the first mask 130 is removed by a wet or dry ashing process, the photoresist is applied again and patterned by exposure and development to shield the region where the nMOS gate is to be formed and the region where the pMOS is to be formed. The second mask 131 is formed and p-type impurities are implanted into the exposed nMOS region using the second mask 131 to form the p-type well 115 and the p-type field stop layer 116. Therefore, the channel layer of the nMOS is not damaged by ion implantation.

At this time, the photoresist shielding the gate of the nMOS and the gate of the pMOS uses a gate mask used in a later step.

On the other hand, unlike the above-described embodiment in which a mask for shielding an nMOS (or pMOS) and a mask for shielding a gate are formed by using a photoresist, the mask and the gate for shielding an nMOS (or pMOS) are shielded. The mask may be formed by patterning in different processes.

That is, a mask for shielding nMOS (or pMOS) is formed using photoresist, and a mask for shielding the gate is formed separately using polyresist, and then ion implantation is performed. At this time, the mask formed on the gate using the poly resist is removed by a wet method.

Next, after the second mask 131 is removed by a wet ashing process or a dry ashing process, as shown in FIG. 2C, the gate oxide film 117 is disposed on a selected region on the semiconductor substrate 111 of the pMOS transistor and the nMOS transistor. ).

After stacking the polysilicon film, the metal film, and the hard mask on the gate oxide film 117 in the order, patterning the hard mask, the metal film, and the polysilicon film at the same time using the gate mask or patterning the hard mask. The gate 118 is formed by simultaneously patterning a metal film and a polysilicon film.

Here, the gate may be a single layer of polysilicon, but a polysilicon film and a metal film are laminated for the specific resistance and high-speed resistance of the gate electrode, but the diffusion film, the tungsten laminate, and tungsten silicide are mainly used as the metal film. .

Subsequently, after the gate nitride layer 119 is formed on the gate 118, a low concentration of phosphorus (P) is implanted into the entire surface by a blanket ion implantation method to form the n-type LDD region 121 in the nMOS transistor region. Form.

As shown in FIG. 2D, an oxide film is deposited on the entire surface and then etched back to form a sidewall spacer 122 contacting the sidewall of the gate electrode 118. At this time, the gate nitride film 119 and the gate oxide film 117 are also etched back.

Next, a high concentration p-type impurity is implanted into the semiconductor substrate of the pMOS transistor region by using a separate mask to form the p-type source / drain region 123, and high concentration n-type impurity is ionized to the semiconductor substrate of the nMOS transistor region. Implant to form an n-type source / drain region 124.

Although not shown, an interlayer insulating film is formed on the entire surface including the gate, a source / drain electrode penetrating through the interlayer insulating film to be contacted to a source / drain region is formed to complete a transistor of a semiconductor device, and then a wiring process and the like. Completes the logic process.

On the other hand, the present invention described above is not limited to the above-described embodiment and the accompanying drawings, it is possible that various substitutions, modifications and changes within the scope without departing from the technical spirit of the present invention. It will be apparent to those of ordinary skill in Esau.

The method of forming the semiconductor device of the present invention as described above has the following effects.                     

First, in the ion implantation process for forming the n-type well region and the p-type well region, the portion of the channel layer to be formed later is shielded at the same time to completely prevent damage to the channel layer, thereby improving the characteristics of the transistor.

Second, the resist pattern formed to shield the channel layer may be formed using an exposure mask used to form the gate, so that a separate exposure mask is not required. Therefore, it is possible to protect the channel layer from damage without additional equipment of the process equipment.

Claims (8)

forming an isolation layer in the semiconductor substrate divided into a pMOS region and an nMOS region, Forming an n-type well by ion implantation after forming a first mask and a second mask to shield the channel layer of the pMOS and the region where the nMOS is to be formed; Forming a p-type well by ion implantation after forming third and fourth masks for shielding the nMOS channel layer and the region where pMOS is to be formed; Forming a gate oxide film and a gate on the semiconductor substrate; Forming an LDD region by ion implantation of low concentration impurities using the gate as a mask; Forming sidewall spacers on both sidewalls of the gate; Forming a source / drain region by ion implantation of a high concentration of impurities using the sidewall spacers as a mask. The method of claim 1, And the first and third masks are formed using an exposure mask used to form the gate. The method of claim 1, And the first and third masks are formed of polyresist. The method of claim 3, wherein And the first and third masks are removed by a wet method. The method of claim 1, And the first and second masks are formed of photoresist. The method of claim 5, wherein The first and second masks are stripped by a wet ashing process or a dry ashing process. The method of claim 1, And the third and fourth masks are formed of photoresist. The method of claim 7, wherein And the third and fourth masks are stripped by a wet ashing process or a dry ashing process.

Images