KR0174319B1 - Method of forming element isolation region - Google Patents

Abstract

According to the present invention, before forming a silicon nitride (Si ₃ N ₄ ) layer having a thickness of about 200 nm serving as a field oxidation (selective oxidation) mask, amorphous silicon doped with nitrogen is deposited to form a lower layer of the silicon nitride layer. A silicon layer 31 having a thickness of about 50 nm is formed.

Description

Method of forming device isolation region

1A to 1J are diagrams illustrating a continuous process of an embodiment showing a method of forming an isolation region of the present invention.

2A to 2J illustrate a continuous process of another embodiment showing the method for forming the device isolation region of the present invention.

3A to 3K are views illustrating a continuous process of another embodiment showing the method for forming the device isolation region of the present invention.

4A to 4K are views illustrating a continuous process of another embodiment showing the method for forming the device isolation region of the present invention.

5A to 5K illustrate a continuous process of another embodiment showing the method for forming the device isolation region of the present invention.

6A to 6K are views for explaining a continuous process of the conventional poly-buffered LOCOS method.

7A to 7L illustrate a continuous process of another embodiment of the conventional poly-buffer method.

The present invention relates to a method of forming an isolation region in a semiconductor device.

In a silicon semiconductor integrated circuit, the active region to be a future element is separated from other active regions by being surrounded by an element isolation region covered with a field oxide film having a relatively thick film thickness.

Poly-buffered LOCOS (Local Oxidation of Silicon) can be used as a method of forming this field oxide film.

6A to 6K are views for explaining this poly-buffered LOCOS method.

First, as shown in FIG. 6A, a thin oxide film 21 is formed on the surface of the silicon substrate 1. As shown in FIG. 6B, the thin oxide film 21 is formed of a silicon layer 31b made of undoped polysilicon. As shown in FIG. 6C, the silicon nitride layer 4 is formed on the silicon layer 31b.

Next, as shown in Figs. 6D and 6E, the resist pattern 5 is formed by using lithography technique. Using this resist pattern as an etching mask, the silicon nitride layer 4 is partially etched to form the silicon nitride mask 4a. Subsequently, as shown in FIG. 6F, the resist pattern 5 is removed, and as shown in FIG. 6G, the silicon layer 31b and the silicon substrate 1 as a buffer layer are thermally oxidized using the silicon nitride mask 4 as shown in FIG. Is selectively oxidized.

In this case, since the silicon layer 31b is present, the stress acting on the silicon substrate 1 is reduced. In addition, the stress generated in the silicon substrate 1 is also reduced by reducing the amount of oxidation of the silicon substrate 1 at the time of forming the field oxide film.

As shown in Fig. 6J, by removing the silicon nitride mask 4a and the remaining unoxidized silicon layer 31b under the silicon nitride mask 4a, an element isolation region covered with a thick oxide film 22c is formed.

In the poly-buffered LOCOS method described above, the silicon layer 31b in the region to be selectively activated is used without being etched. However, this method is not limited to such a technique, and the following techniques can also be used.

As shown in FIGS. 7A to 7L, a thin oxide film 21 is formed on the silicon substrate 1. Next, the silicon layer 31 made of undoped polysilicon is formed on the thin oxide film 21 as shown in FIG. 7B.

By inserting an undoped polysilicon film between the thin oxide film 21 and the silicon nitride mask 4a (described later), it is possible to reduce the stress acting on the silicon substrate 1 when selectively oxidized. As shown in FIG. 7C, the silicon nitride layer 4 is formed on the silicon layer 31c.

Subsequently, as shown in Figs. 7D to 7F, a resist pattern is formed using a lithography technique. The silicon nitride layer 4 and the silicon layer 31 other than the portions under the resist pattern 5 are removed by an etching technique using the resist pattern 5 as a mask.

Then, as shown in FIG. 7G, the resist pattern 5 is removed. After removing the resist pattern 5, a thick oxide film 22c is selectively formed on the silicon substrate 1 by thermal oxidation using the silicon nitride mask 4a as a mask, as shown in FIG. At this time, since the silicon layer 31 exists, the stress acting on the silicon substrate 1 is reduced.

As shown in FIG. 7K, when the silicon nitride mask 4a and the non-oxidized remaining silicon layer 31c under the silicon nitride mask 4a are removed, an element isolation region covered with a thick oxide film 22c is formed.

The method shown in Figs. 6A to 6I has the following problems.

In the poly-buffered LOCOS method described above, a silicon layer 31b made of undoped polysilicon is inserted between the thick silicon nitride mask 4a and the oxide film 21 as shown in Figs. 6f and 6g.

Therefore, as shown in FIG. 6G, when the silicon layer 31b and the silicon substrate 1 are selectively oxidized using the silicon nitride mask 4a, between the silicon substrate 1 and the silicon layer 31b and silicon Oxidation regions called bird's beaks are formed at two places between the layer 31b and the silicon nitride mask 4a.

As a result, the cross section of the field oxide film at the boundary of the device isolation region shows an overhang structure immediately after selective oxidation. In subsequent processes, such as a gate electrode formation process, inconveniences arise, such as disconnection in a stepped part and an unetched remaining part.

On the other hand, in this poly-buffered LOCOS method, voids (holes) 9 may be formed in a portion where the stress of the silicon substrate 1 is concentrated. If voids 9 are formed, the thin oxide film 21 exposed at the bottom of the voids 9 is etched when the silicon layer 31b is removed after selective oxidation. As shown in Figs. 6J and 6K, when etching the thin oxide film 21, the silicon substrate 1 exposed through the void 9 is sometimes etched. In such a state, if a diffusion layer is formed in a region including the etched portion of the thin oxide film 21 in a subsequent process, the etched portion may cause junction leakage. In addition, when the MOS gate electrode is formed on the thin oxide film 21, a normal channel is not formed and gate oxide film bonding may occur.

In order to prevent the formation of the voids 9, it is conceivable to thicken the thin oxide film 21. However, when the thin oxide film 21 is thickened, the beak region originally intended to be reduced is enlarged, and the effect of adopting the poly-buffered LOCOS method is reduced.

In addition to the problems described above, the poly-buffered LOCOS method has a problem in that the boundary (front end) of the field oxide film between the active zone and the thick oxide film 22c is not flat.

In this poly-buffered LOCOS method, when the exposed silicon layer 31b is selectively oxidized, the oxidation rate is different depending on the plane orientation of each crystal grain of the silicon layer 31b, and therefore, from the end of the silicon nitride mask. Lateral oxidation does not proceed uniformly.

For this reason, as shown in Figs. 6I and 6K, the boundary of the field oxide film zone between the active zone and the oxide film 22c is not flat. This makes it difficult to establish a fine active zone.

In addition, the breakdown voltage of the gate oxide film formed in the active region may change due to the irregularities of the boundary.

On top of this, when forming a fine MOSFET gate electrode of 0.25 mu m or less, this uneven boundary adversely affects pattern formation by lithography.

Similar to the above example, another poly-buffered LOCOS method has the following problems.

One problem is that voids (holes) 9 are formed in areas where stress is concentrated after selective oxidation of the silicon substrate 1 of the silicon layer 31c, as shown in FIG.

If removed at 6j and 6k degrees, the thin oxide film 21 exposed at the bottom of the void 9 is etched. Subsequently, as shown in Figs. 7K and 7L, the silicon substrate 1 itself is exposed and etched.

As a result, holes 9a are formed in the silicon substrate 1.

As described above, thickening the thin oxide film 21 as a pad oxide film to prevent such a hole 9a enlarges the beak region originally intended to be reduced, thereby reducing the effect of the poly-buffered LOCOS method. As shown in Figs. 6I and 6K and 7J and 7L, the boundary of the field oxide zone between the active zone and the oxide film 22c becomes uneven.

In this example, this uneven boundary makes it difficult to establish a fine active zone.

It is therefore a first object of the present invention to provide an improved method for forming a device isolation region, and the present invention generates voids at all in the silicon layer used for forming the device isolation region by the poly-buffered LOCOS method. The device isolation region thus formed is evenly made. Another object of the present invention is to provide a device isolation region forming method which achieves the above objects, without increasing the number of forming steps, compared with the conventional poly-buffered LOCOS method.

In order to achieve the above object, according to the present invention, there is provided a process of forming an oxide film on a semiconductor substrate, a process of forming a silicon layer comprising silicon on which the impurity inhibits silicon crystallization, and a silicon layer on Forming a film having oxidation resistance on the substrate, selectively removing a portion of the oxide film to form an oxide mask made of the oxide film, and oxidizing the silicon layer and the semiconductor substrate using the oxide mask as a mask. Thereby, there is provided a method for forming an element isolation region, which has a step of forming an element isolation region.

Hereinafter, the outline of the present invention will be described before explaining an embodiment of the present invention.

In the present invention, the silicon layer formed under the oxidation mask used for the selective oxidation in forming the field oxide film is composed of a microcrystalline polysilicon layer doped with nitrogen, carbon and oxygen as impurities or an amorphous silicon layer doped with these impurities. . This silicon layer may be a multilayer structure formed by combining layers doped with these impurities or a combination of these layers and an undoped amorphous silicon layer. The microcrystalline polysilicon layer doped with these impurities has slow growth of grains even when annealed. In addition, the amorphous silicon layer doped with these impurities does not easily become an ordinary polycrystalline layer even after annealing. That is, it has the property of microcrystalline layering.

Therefore, even under high temperature annealing to which stress such as thermal oxidation is applied, the silicon atoms constituting the silicon film cannot move easily, and generation of voids can be suppressed. And since the crystal grains are small and the oxidation proceeds uniformly, the boundary portion is not uneven.

In addition, when nitrogen or carbon is used as an impurity, it can be oxidized uniformly and can slow down the oxidation rate. For this reason, void generation which is a problem of the conventional method can be suppressed. As a result, the uneven state of the boundary portion of the field oxide film can be eliminated and the bird beak area can be reduced.

On the other hand, it is possible to control the silicon layer to have a multilayer structure composed of layers doped with different impurities as described above, or to reduce the cross-sectional shape of the field oxide film by changing the concentration of impurities in the silicon layer in the film direction. .

Best Mode for Carrying Out the Invention Embodiments of the present invention will be described below with reference to the accompanying drawings.

Example 1

1A to 1J illustrate a process of manufacturing a device isolation structure for explaining an embodiment of the present invention.

First, as shown in FIG. 1A, annealing is performed at 900 ° C. in a dry oxidation atmosphere to form a thin oxide film 21 having a thickness of 6 to 12 nm on the silicon substrate 1. By forming this oxide film 21, the stress acting on the silicon substrate 1 in the process described later is reduced. The oxide film 21 also serves as an etching stopper when removing the silicon layer formed thereon.

Subsequently, as shown in FIG. 1B, the silicon layer 31 having a thickness of about 50 nm is formed on the thin oxide film 21 by depositing it on the amorphous silicon oxide film 21 by nitrogen-doped using the CVD method. In this step, SiH ₄ or Si ₂ H ₆ and ammonia gas are used as the gas used at a deposition temperature of 500 ° C. Nitrogen doping is carried out simultaneously with the deposition of amorphous silicon.

Nitrogen is used as an impurity doped in the silicon layer 31, but carbon, oxygen, etc. can also be used.

In this Example 1 and Examples 2 to 7 described later, the CVD method is used as an example of a silicon layer deposition method or an impurity doping method. However, the silicon layer deposition method is not limited to the CVD method. For example, the sputtering method can be used to simultaneously deposit and deposit the silicon layer.

The concentration of impurities such as nitrogen, carbon, and oxygen doped in the silicon layer 31 may range from 1 × 10 ²¹ cm ⁻³ to 3 × 10 ²² cm ⁻³ . If the doping amount of each of these impurities is less than 1 × 10 ²¹ cm ⁻³ , the effect of suppressing the growth of crystal grains is not exerted very much. In contrast, when the doping amount of each impurity exceeds 3 x 10 ²² cm ^-3 , the impurity is not doped but the compound is formed. For example, when a large amount of nitrogen is doped into the silicon layer 31, the silicon layer becomes a sublingual film. The silicon layer reduces the stress applied to the substrate in the step of forming the field oxide film. However, if this silicon layer becomes a nitride film, it will not be oxidized at all, and since the nitride film is exceptionally strong, the stress acting on the substrate cannot be relaxed. This also applies to the case of using carbon. When the silicon layer 31 is doped with excess oxygen, the silicon layer 31 becomes an oxide film, and a silicon oxide film is formed in an unnecessary portion.

Subsequently, as shown in FIG. 1C, a silicon nitride (Si ₃ N ₄ ) layer ₄ having a thickness of about 200 nm serving as a mask for field oxidation (selective oxidation) is formed. Next, a photoresist is formed on the silicon nitride layer 4, and as shown in FIG. 1D, a resist pattern 5 is formed by patterning.

In addition, a resist pattern can be formed by lithography using X-rays or electron beams by using a photosensitive resist or an electron beam resist instead of a photoresist layer.

Next, as shown in FIG. 1E, the silicon nitride layer 4 is etched using the resist pattern 5 as a mask to form a silicon nitride mask (oxidation mask) 4a. This etching is performed using the reactive ion etching (RIE) method using a fluorocarbon gas. This etching exposes the silicon layer 31 other than the portion below the silicon nitride mask 4a.

Next, as shown in FIG. 1f, the resist pattern is removed by ashing treatment using oxygen radicals, and then obtained by liquid treatment using a liquid mixture of ammonia and hydrogen peroxide and liquid treatment using a liquid mixture of hydrogen peroxide and hydrochloric acid. The structure is RCA cleaned.

Next, as shown in FIG. 1G, using the silicon nitride mask 4a as a mask, selective oxidation is performed at a temperature of 1000 ° C. in an oxygen atmosphere including water vapor to expose the exposed silicon layer 31 and the silicon substrate 1. Oxidize the surface. As a result, a thick oxide film 22 having a thickness of 450 nm is formed. The oxidation temperature of 1000 ° C. is just one example and can be changed to a temperature in the range of 700 to 1150 ° C. without any problem, for example. Using dilute hydrofluoric acid, the thin oxide film formed on the surface of the silicon nitride mask 4a is etched, and hot siliconic acid is used to selectively remove the silicon nitride mask 4a.

The silicon layer 31 is selectively removed by the RIE method using a chlorine-based gas thereon to obtain a substrate on which a device isolation region covered with a thick oxide film 22 is formed, as shown in FIG. 1H.

Finally, as shown in FIG. 1I, the thin oxide film 21 is removed to expose the surface of the silicon substrate 1 in the region surrounded by the thick oxide film 22. As shown in FIG.

According to this method, unlike in the conventional method, as shown in FIG. 1J, no void is generated in the silicon layer 31, and no hole is formed in the silicon substrate. Moreover, the boundary part of the oxide film 22 does not become uneven.

In addition, since the doping of the impurity into the silicon layer 31 is performed at the time of deposition of the silicon layer 31, the problem can be solved without increasing the number of manufacturing steps as compared with the conventional method.

Example 2

2A to 2J show a process for explaining the second embodiment of the present invention. Like reference numerals in FIGS. 2A through 2J denote like parts in FIGS. 1A through 1J.

In Example 2, as shown in FIG. 2A, the thin oxide film 21 having a thickness of 6 to 12 nm is formed on the silicon substrate 1 by annealing at 900 캜 in a dry oxygen atmosphere. Next, as shown in FIG. 2B, a silicon film 32 made of undoped amorphous silicon having a thickness of about 25 nm is deposited. Subsequently, a silicon film 33 which is about 25 nm thick and doped with nitrogen is deposited on the silicon film 32. The doping state of the silicon film 33 is different from that of the silicon film 32.

The silicon film 32 is deposited at a temperature of about 500 ° C. by the CVD method using SiH ₄ or Si ₂ H ₆ as the raw material gas. After the silicon film 32 is deposited, the silicon film 33 is deposited at a temperature of about 500 ° C. using ammonia gas in addition to SiH ₄ or Si ₂ H ₆ . The doped nitrogen concentration in the silicon film 33 may be in the range of 1 × 10 ²¹ cm ⁻³ to 3 × 10 ²² cm ⁻³ . Since the silicon film 33 is doped with nitrogen, the oxidation rate is lower than that of the silicon film 32.

Next, as shown in FIG. 2C, a silicon nitride (Si ₃ N ₄ ) layer ₄ having a thickness of about 200 nm serving as a mask for field oxidation is formed.

Next, a photoresist layer is formed on the silicon nitride layer 4, and as shown in FIG. 2D, the resist pattern 5 is formed using photolithography technique.

Instead of the photoresist layer, a resist pattern 5 can be formed by a lithography technique using X-rays or electron beams using a photosensitive resist or an electron beam resist.

Next, as shown in FIG. 2E, the silicon nitride layer 4 is etched using the resist pattern 5 as a mask to form the silicon nitride mask 4a. This etching is performed using the RIE method using a fluorocarbon gas. By this etching, the silicon layer 33 other than the lower part of the silicon nitride mask 4a is exposed.

Next, as shown in FIG. 2F, after removing the resist pattern by an incineration process using oxygen radicals, the structure obtained is RCA-washed.

Next, as shown in FIG. 2G, using the silicon nitride mask 4a as a mask, in the oxygen atmosphere containing water vapor, selective oxidation is performed at a temperature of 1000 ° C to expose the exposed silicon films 32 and 33 and silicon. Selectively oxidize the surface of the substrate. As a result, a thick oxide film 22 having a thickness of 450 nm is formed. The oxidation temperature of 1000 ° C. is only one example and can be changed in a temperature range of, for example, 700 to 1150 ° C. without any problem.

Next, the thin oxide film formed on the surface of the silicon nitride mask 4a by this thermal oxidation is removed using dilute hydrofluoric acid, and the silicon nitride mask 4a is selectively removed using hot phosphoric acid.

On top of that, the silicon isolation films 32 and 33 are selectively removed by the RIE method using a chlorine-based gas (process shown in FIG. 2h), and as shown in FIG. 2h, an element isolation region covered with a thick oxide film 22 is formed. Obtain the formed substrate.

Finally, as shown in FIG. 2I, the thin oxide film 21 is removed to expose the surface of the silicon substrate 1 in the region surrounded by the thick oxide film 22. As shown in FIG.

According to this method, unlike the conventional method, as shown in FIG. 2J, no voids are generated in the silicon films 32 and 33, and no holes are formed in the silicon substrate. Moreover, the boundary part of the thick oxide film 22 does not become uneven, and a smooth surface is formed.

In addition, unlike the first embodiment, since the silicon films 32 and 33 having different oxidation rates are used, the cross-sectional shape of the thick oxide film 22a serving as the field oxide film is in a controlled state.

In addition, if the single silicon layer used in Example 1 is doped with nitrogen to gradually increase its concentration toward the upper surface, the same effect as in Example 2 can be obtained.

Example 3

In the embodiment shown in Figs. 2A to 2J, an undoped amorphous silicon film is used as the silicon film 32, but the present invention is not limited to this film material. As the silicon film 32, an amorphous film doped with oxygen to increase the oxidation rate may be used to place the silicon film 32 in a different doping state from the silicon film 33.

By using amorphous silicon doped with oxygen, growth of polycrystalline grains of the silicon film 32 can be suppressed when the thick oxide film 22 is formed as a field oxide film. And since the silicon film 32 is doped with oxygen, its oxidation rate increases. As a result, the difference in oxidation rate between the oxide film 32 and the oxide film 33 doped with nitrogen becomes larger as compared with the second embodiment.

For this reason, the inclination of the cross-sectional shape can be further reduced while suppressing the occurrence of irregularities in the boundary portion of the thick oxide film 22a. In Example 1 and Example 2, amorphous silicon is used as the silicon layer 32, but the same effect as described above can also be obtained by using microcrystalline polysilicon.

In the low pressure CVD method, amorphous silicon can be deposited on the silicon oxide film by setting the deposition temperature to 500 ° C.

In this case, when the deposition temperature is set at 650 ° C., ammonia gas is introduced in addition to SiH ₄ or Si ₂ H ₆ , and nitrogen is used as an impurity, microcrystalline polysilicon doped with nitrogen can be deposited.

In Examples 1 and 2, the silicon layer is doped with one impurity. In addition, one impurity is doped into each silicon layer to be used. However, the present invention is not limited to such a doping structure, and one silicon layer may be doped with more impurities. For example, by using amorphous silicon doped with oxygen and nitrogen as the silicon layer, it is possible to slightly increase the oxidation rate and more effectively suppress grain growth.

In this case, if the silicon layer is doped only with oxygen, the grain growth is not suppressed without increasing the oxidation rate much. On the other hand, if the doping amount of oxygen is increased to more effectively suppress the growth of crystal grains, the oxidation rate becomes too fast.

However, as described above, doping not only oxygen but also nitrogen or carbon simultaneously can prevent the oxidation rate from becoming too fast. That is, by doping the silicon layer with an impurity that increases the oxidation rate and an impurity that decreases the oxidation rate, the oxidation state from the end of the silicon layer can be controlled to a high degree during selective oxidation, and the cross-sectional shape of the field oxide film is more precisely Can be controlled.

Example 4

In Examples 2 and 3, as a method of shortening the oxidation time and controlling the cross-sectional shape of the field oxide film, a method of removing the upper layer portion of the silicon layer in the region to be selectively oxidized, i.e., the doped portion with the slowing oxidation, before selective oxidation This is provided. According to this method, since the silicon layer subjected to the field oxidation treatment does not contain any impurities that lower the oxidation rate, oxidation proceeds faster than in Examples 2 and 3. On the other hand, a layer doped with an impurity under the silicon nitride mask which lowers oxidation and prevents recrystallization remains. This prevents the formation of uneven ends of the beak and generation of voids in the silicon layer under the silicon nitride mask, as in Examples 2 and 3. 3A to 3K show a manufacturing process for explaining the fourth embodiment of the present invention. The same reference numerals in Embodiment 4 denote the same parts as in the above embodiments.

First, as shown in FIG. 3A, annealing is performed at 900 캜 in a dry oxygen atmosphere to form a thin oxide film 21 having a thickness of 6 to 12 nm on the silicon substrate 1.

Next, as shown in FIG. 3B, a silicon film 32 made of undoped amorphous silicon or amorphous silicon doped with oxygen is deposited about 25 nm thick. Subsequently, a silicon film 33 which is about 25 nm thick and doped with nitrogen is deposited on the silicon film 32. The doping state of the silicon film 33 is different from that of the silicon film 32. The silicon film 32 is formed by depositing SiH ₄ or Si ₂ H ₆ at a temperature of about 500 ° C. by CVD using oxygen as a raw material gas or adding SiH ₄ and Si ₂ H ₆ . After the silicon film 32 is deposited, the silicon film 33 is deposited at a temperature of about 500 ° C. using ammonia gas in addition to SiH ₄ or Si ₂ H ₆ .

The doped nitrogen concentration in the silicon film 33 may be in the range of 1 × 10 ²¹ cm ⁻³ to 3 × 10 ²² cm ⁻³ . In addition, since the silicon film 33 is doped with nitrogen, the oxidation rate is lower than that of the silicon film 32.

Next, as shown in FIG. 3C, a silicon nitride (Si ₃ N ₄ ) layer ₄ having a thickness of about 200 nm serving as a mask for field oxidation is formed.

Next, as shown in FIG. 3D, a photoresist layer is formed on the silicon nitride layer 4, and the resist pattern 5 is formed using photolithography technique.

Instead of the photoresist layer, a resist pattern 5 can be formed by a lithography technique using X-rays or electron beams using a photosensitive or electron beam resist.

Next, as shown in FIG. 3E, the silicon nitride layer 4 is etched using the resist pattern 5 as a mask to form the silicon nitride mask 4a. This etching is performed using the RIE method using a fluorocarbon gas. By this etching, the silicon layer 33 other than the lower part of the silicon nitride mask 4a is exposed.

As shown in FIG. 3F, the silicon film 33 is etched by the RIE method using a chlorine-based gas and a resist pattern as a mask. At this time, the silicon film 32 under the silicon film 33 is not etched.

Next, as shown in FIG. 3G, after removing a resist pattern by the incineration process using oxygen radical, the structure obtained is RCA-washed.

Next, as shown in FIG. 3H, using the silicon nitride mask 4a as a mask, selective oxidation is performed at an oxygen temperature including water vapor at a temperature of 1000 ° C to expose the exposed silicon film 32 and the silicon film ( The film edge and the surface of the silicon substrate of 33 are selectively oxidized. As a result, a thick oxide film 22 having a thickness of 450 nm is formed. The oxidation temperature of 1000 ° C is only one day and can be changed without a problem, for example, in the temperature range of 700 to 1150 ° C.

Next, the thin oxide film formed on the surface of the silicon nitride mask 4a by this thermal oxidation is removed using dilute hydrofluoric acid, and the silicon nitride mask 4a is selectively removed using hot phosphoric acid.

Thereon, the silicon films 32 and 33 are selectively etched by the RIE method using a chlorine-based gas (FIG. 3I), and as shown in FIG. 3H, a substrate having an element isolation region covered with a thick oxide film 22 is formed. Get

Finally, as shown in FIG. 3j, the thin oxide film 21 is removed to expose the surface of the silicon substrate 1.

According to this method, unlike in the conventional method, as shown in FIG. 3K, no voids are generated in the silicon layers composed of the silicon films 32 and 33, and no holes are formed in the silicon substrate. Moreover, the boundary part of the thick oxide film 22 does not become uneven.

In addition, unlike the first embodiment, since the silicon films 32 and 33 having different oxidation rates are used, the cross-sectional shape of the thick oxide film 22a serving as the field oxide film is in a controlled state.

Further, in Example 1, the monosilicon layer is formed such that the nitrogen doped into the monosilicon layer gradually increases its concentration toward the upper surface, and the heavily doped region is etched to have the same effect as in Example 2. You can get it.

In Example 1, the silicon layer 31 is thermally oxidized without processing (1f to 1g also), but the present invention is not limited thereto.

As in the following examples, the silicon layer may be selectively removed after etching the nitride film serving as the oxidation mask using the resist pattern as a mask to surround the device isolation region.

In this selective removal step, the entire silicon layer other than the bottom of the silicon nitride mask may be removed. Alternatively, the silicon layer may be left to some thickness. In other words, the silicon layer other than the bottom of the silicon nitride mask may be thinned. In this process, when the device isolation region is formed by thermal oxidation, it is possible to reduce the difference in level between the surface of the oxide film in the device isolation region and the surface of the silicon layer in the active region. This improves the degree and yield of pattern formation in the gate electrode wiring layer forming step.

Example 5

4A to 4J show a process for explaining the fifth embodiment of the present invention. The same reference numerals in Embodiment 5 denote the same parts as in the above embodiments.

First, as shown in FIG. 4A, the thin oxide film 21 having a thickness of 6 to 12 nm is formed on the silicon substrate 1 by annealing at 900 캜 in a dry oxidation atmosphere. By forming this oxide film 21, the stress acting on the silicon substrate 1 in the process described later is reduced. The oxide film 21 also serves as an etching stopper when removing the silicon layer formed thereon.

Subsequently, as shown in FIG. 4B, nitrogen-doped amorphous silicon is deposited on the oxide film 21 using the CVD method to form a silicon layer 31 having a thickness of about 50 nm on the thin oxide film 21. In this deposition process by the CVD method, the deposition temperature is set to 500 ° C, and ammonia gas is used in addition to SiH ₄ or Si ₂ H ₆ as the gas to be used. Nitrogen doping is performed simultaneously with amorphous silicon deposition.

This nitrogen is an impurity that interferes with the crystallization of silicon and slows down the oxidation rate.

The concentration of nitrogen doped in the silicon layer 31 may be in the range of 1 × 10 ²¹ cm ⁻³ to 3 × 10 ²² cm ⁻³ . If the doping amount of each impurity such as nitrogen, carbon or oxygen is less than 1 × 10 ²¹ cm ^-3 , the effect of suppressing the growth of crystal grains is not much increased. In contrast, when the doping amount of each impurity exceeds 3 x 10 ²² cm ^-3 , the impurity is not doped but the compound is formed. For example, when a large amount of nitrogen is doped into the silicon layer 31, the silicon layer becomes a nitride film. The silicon layer (buffer layer) is partially oxidized in the step of forming the field oxide film, thereby reducing the stress applied to the substrate. Further, since the silicon layer is made of amorphous silicon or microcrystalline polysilicon, it is not exceptionally strong and can reduce stress.

However, if this silicon layer becomes a nitride film, it will not be oxidized at all, and since the nitride film is exceptionally strong, the stress acting on the substrate cannot be relaxed. This also applies to the case of using carbon. When the silicon layer 31 is doped with an excess of coral, the silicon layer 31 becomes an oxide film, and a silicon oxide film is formed in an unnecessary portion.

Next, as shown in FIG. 4C, a silicon nitride (Si ₃ N ₄ ) layer ₄ having a thickness of about 200 nm serving as a mask for field oxidation (selective oxidation) is formed. Next, a photoresist is formed on the silicon nitride layer 4, and as shown in FIG. 4D, the resist pattern 5 is formed by patterning.

In addition, a resist pattern can be formed by lithography using X-rays or electron beams by using a photosensitive resist or an electron beam resist instead of a photoresist layer.

Next, as shown in FIG. 4E, the silicon nitride layer 4 is etched using the resist pattern 5 as a mask to form a silicon nitride mask (oxidation mask) 4a. This etching is performed using the reactive ion etching (RIE) method using a fluorocarbon gas. This etching exposes the silicon layer 31a other than the lower portion of the silicon nitride mask 4a.

Next, as shown in FIG. 4F, the exposed portion of the silicon layer 31a is etched by the RIE method using the chlorine-based gas and the resist pattern as a mask.

Next, as shown in FIG. 4G, the resist pattern is removed by an ashing process using oxygen radicals. The exposed thin oxide film 21 on the silicon substrate 1 is removed by an etching technique using dilute hydrofluoric acid to expose the surface of the silicon substrate 1 other than the portion below the silicon nitride mask 4a.

Next, RCA cleaning of the silicon substrate 1 is carried out by liquid treatment using a liquid mixture of ammonia and hydrogen peroxide and liquid treatment using a liquid mixture of hydrogen peroxide and hydrochloric acid. Next, as shown in FIG. 4h, using the silicon nitride mask 4a as a mask, thermal oxidation is performed at a temperature of 1000 ° C. in an oxygen atmosphere containing water vapor, and the exposed side surface of the silicon layer 31a and The surface of the silicon substrate 1 is oxidized. As a result, a thick oxide film 22 having a thickness of 450 nm is formed.

Using dilute hydrofluoric acid, the thin oxide film formed on the surface of the silicon nitride mask 4a is etched, and hot siliconic acid is used to selectively remove the silicon nitride mask 4a.

On top of that, the silicon layer 31a is selectively removed by the RIE method using a chlorine-based gas to obtain a substrate on which a device isolation region covered with a thick oxide film 22 is formed, as shown in FIG. 4I.

Finally, as shown in FIG. 4J, the thin oxide film 21 is removed to expose the surface of the silicon substrate 1 in the region surrounded by the thick oxide film 22. As shown in FIG.

According to this method, unlike in the conventional method, as shown in FIG. 4K, no void is generated in the silicon layer 31a, and no hole is formed in the silicon substrate. Moreover, the boundary part of the oxide film 22 does not become uneven.

In addition, since doping of the impurity to the silicon layer 31a is performed at the time of deposition of the silicon layer 31a, compared with the conventional method, the problem can be solved without increasing the number of manufacturing steps.

On top of that, in the fifth embodiment, since the silicon layer 51a is doped with nitrogen, the oxidation rate is reduced and the bird beak can be shortened.

Example 6

5A to 5K show a process for explaining the sixth embodiment of the present invention. The same reference numerals in FIGS. 5A to 5K denote the same parts as in the above embodiments.

As shown in FIG. 5A, annealing is performed at 900 캜 in a dry oxygen atmosphere to form a thin oxide film 21 having a thickness of 6 to 12 nm on the silicon substrate 1.

Next, as shown in FIG. 5B, a silicon film 32a of about 25 nm in thickness and made of undoped amorphous silicon is deposited. Subsequently, a silicon film 33a having a thickness of about 25 nm and doped with nitrogen is deposited on the silicon film 32a.

The silicon film 32a is deposited at a temperature of about 500 ° C. by the CVD method using SiH ₄ or Si ₂ H ₆ as the raw material gas. After the silicon film 32a is deposited, the silicon film 33a is deposited at a temperature of about 500 ° C. using ammonia gas in addition to SiH ₄ or Si ₂ H ₆ . The doped nitrogen concentration in the silicon film 33a may be in the range of 1 × 10 ²¹ cm ⁻³ to 3 × 10 ²² cm ⁻³ . Since the silicon film 33a is doped with nitrogen, the oxidation rate is slower than that of the silicon film 32a.

Next, as shown in FIG. 5, a silicon nitride (Si ₃ N ₄ ) layer ₄ having a thickness of about 200 nm serving as a mask for field oxidation is formed.

Next, a photoresist is formed on the silicon nitride layer 4, and as shown in FIG. 5D, the resist pattern 5 is formed using photolithography technique.

In addition, instead of the photoresist layer, the resist pattern 5 can be formed by a lithography technique using X-rays or electron beams using a photosensitive or electron beam resist.

Next, as shown in FIG. 5E, the silicon nitride layer 4 is etched using the resist pattern 5 as a mask to form the silicon nitride mask 4a. This etching is performed using the RIE method using a fluorocarbon gas. By this etching, the silicon layer 33a other than the lower part of the silicon nitride mask 4a is exposed.

Next, as shown in FIG. 5F, the silicon layers 32a and 33a are selectively removed by the RIE method using a chlorine-based gas to expose the surface of the thin oxide film 1 other than the lower portion of the resist pattern 5.

Next, as shown in FIG. 5G, the resist pattern 5 is removed by an incineration process using oxygen radicals.

The exposed thin oxide film 21 is removed by an etching technique using an etchant made of carbon fluoride. Next, the silicon substrate 1 is cleaned by RCA cleaning.

Next, as shown in FIG. 5H, the silicon nitride mask 4a is used as a mask, and thermal oxidation is performed at a temperature of 1000 ° C. in an oxygen atmosphere containing water vapor to expose the silicon films 32 and 33. The surface and the surface of the silicon substrate are selectively oxidized. As a result, a thick oxide film 22 having a thickness of 450 nm is formed.

Using thin hydrofluoric acid, the thin oxide film formed on the surface of the silicon nitride mask 4a by this thermal oxidation is etched, and the silicon nitride mask 4a is selectively etched using hot phosphoric acid.

On top of that, the silicon layers 32a and 33a are selectively removed (FIG. 5i) by the RIE method using a chlorine-based gas to form an element isolation region covered with the thick oxide film 22. As shown in FIG.

Finally, as shown in FIG. 5J, the thin oxide film 21 is removed to expose the surface of the silicon substrate 1.

According to this method, unlike in the conventional method, as shown in FIG. 5K, no void is generated in the silicon layer composed of the silicon layers 32a and 33a, and no hole is formed in the silicon substrate. Moreover, the boundary part of the oxide film 22 does not become uneven.

In addition, unlike the fifth embodiment, since the silicon films 32a and 33a having different oxidation rates are used, the cross-sectional shape of the thick oxide film 22a serving as the field oxide film is in a controlled state.

In addition, in Example 5, even if a single silicon layer is formed so that the concentration of nitrogen doped in the single silicon layer gradually increases toward the upper surface, the same effect as in Example 6 can be obtained.

Example 7

In the above embodiment, an undoped amorphous silicon film is used as the silicon film 32a, but the present invention is not limited to this film material. As the silicon film 32a, an amorphous film having a doping state different from that of the silicon film 33a doped with oxygen that increases the oxidation rate may be used.

By using amorphous silicon doped with oxygen, when the thick oxide film 22 is formed as a field oxide film, the growth of the polycrystalline grains of the silicon film 32a can be suppressed. And since the silicon film 32 is doped with oxygen, its oxidation rate starting from the lower end of the silicon nitride mask 4a increases. As a result, the difference in oxidation rate between the oxide film 32a and the oxide film 33 doped with nitrogen becomes larger than in the above embodiment.

For this reason, the inclination of the cross-sectional shape can be further reduced while suppressing the occurrence of irregularities in the boundary portion of the thick oxide film 22a. In Examples 4 and 7, amorphous silicon is used as the silicon layer 32, but the same effect as described above can also be obtained by using microcrystalline polysilicon.

In the low pressure CVD method, amorphous silicon can be deposited on the silicon oxide film by setting the deposition temperature to 500 ° C.

In this case, when the deposition temperature is set at 650 ° C., ammonia gas is introduced in addition to SiH ₄ or Si ₂ H ₆ , and nitrogen is used as an impurity, microcrystalline polysilicon doped with nitrogen can be deposited.

In this embodiment, one silicon layer is doped with one impurity. However, the present invention is not limited to this, and one silicon layer may be doped with more impurities. For example, by using amorphous silicon doped with oxygen and nitrogen as the silicon layer, it is possible to slightly increase the oxidation rate and more effectively suppress grain growth.

In this case, if the silicon layer is doped only with oxygen, the grain growth is not suppressed without increasing the oxidation rate much. On the other hand, if the doping amount of oxygen is increased to more effectively suppress the growth of crystal grains, the oxidation rate becomes too fast.

However, as described above, doping not only oxygen but also nitrogen or carbon simultaneously can prevent the oxidation rate from becoming too fast. That is, by doping the silicon layer with an impurity that increases the oxidation rate and an impurity that decreases the oxidation rate, the oxidation state from the end of the silicon layer can be controlled to a high degree during selective oxidation, and the cross-sectional shape of the field oxide film is more precisely Can be controlled.

As described above, according to the present invention, when forming a local oxidation region (field oxide film) by the LOCOS method, nitrogen, carbon, oxygen, or the like is formed in a silicon layer formed on a thin oxide film (pad oxide film) formed on a semiconductor substrate. Microcrystalline polysilicon doped with impurities is used.

For this reason, the boundary (bowl end) of the field oxide film region (element isolation region) is not uneven, and generation of voids can be suppressed.

In addition, the cross-sectional shape of the field oxide film can be controlled by making the silicon layer have a multilayer structure having different doping materials.

Similarly, since the impurity doping amount of the silicon layer is changed in the film direction, the cross-sectional shape of the field oxide film can be controlled.

Since the silicon layer is doped by combining two or more impurities, the oxidation rate starting at the end of the silicon layer can be finely controlled and the growth of crystal grains can be suppressed. Therefore, the formation of the field oxide film can be more precisely defined.

Claims (11)

Forming an oxide film on the semiconductor substrate; Forming a silicon layer made of silicon added with an impurity which inhibits crystallization of silicon on the oxide film; Forming a film having oxidation resistance on the silicon layer; Selectively removing a portion of the oxidation resistant film to form an oxide mask comprising the oxidation resistant film; And forming a device isolation region by oxidizing the silicon layer and the semiconductor substrate using the oxide mask as a mask. The method of claim 1, wherein after the oxide mask is formed on the silicon layer, the same region as the region where the oxidation resistant film is selectively removed is selectively etched, at least a portion of the silicon layer is removed, and the oxide mask is used as a mask. A method of forming an isolation region, further comprising the step of forming the isolation region. The method of claim 1, wherein the forming of the silicon layer comprises forming the silicon layer by changing an impurity concentration in a film direction. The method of claim 1, wherein the forming of the silicon layer includes forming a first silicon film and a second silicon film thereon, wherein the first silicon film and the second silicon film are doped in different states. A method of forming a device isolation region. The device isolation method according to claim 4, wherein the step of forming the first silicon film and the second silicon film thereon has a step of changing a factor selected from the group consisting of impurity type, impurity concentration, and distribution shape. Method of forming the area. The method of claim 4, wherein the second silicon film is made of a silicon material having a lower oxidation rate than the silicon material of the first silicon film. The method of claim 1, wherein the silicon layer is doped with impurities that inhibit crystallization of silicon and lower the oxidation rate of silicon. The method of claim 1, wherein the silicon layer is doped with a combination of an impurity that inhibits silicon crystallization and lowers the oxidation rate of silicon and an impurity that inhibits crystallization and increases the oxidation rate. . The method of claim 1, wherein the silicon layer contains at least one element selected from the group consisting of nitrogen, carbon, and oxygen as an impurity. The method of claim 1, wherein the silicon layer is formed by a CVD method. The method of claim 1, wherein the silicon layer is formed by a sputtering method.