JPS63111030U

JPS63111030U -

Info

Publication number: JPS63111030U
Application number: JP121987U
Authority: JP
Priority date: 1987-01-08
Filing date: 1987-01-08
Publication date: 1988-07-16

Description

[Brief explanation of the drawing]

第１図はこの考案の一実施例を示す回路の構成
図、第２図は従来の回路を示す構成図である。図において１は電圧比較型コンパレータ、２は
逐次比較レジスタ、３は基準電圧回路、４はＤ／
Ａ変換器、５はタイミング回路、６はオフセツト
回路、７はレジスタ、８はデイジタル型コンパレ
ータ、９はＡ／Ｄ変換装置出力信号である。なお
図中同一符号は同一または相当部分を示す。 FIG. 1 is a block diagram of a circuit showing an embodiment of this invention, and FIG. 2 is a block diagram showing a conventional circuit. In the figure, 1 is a voltage comparison type comparator, 2 is a successive approximation register, 3 is a reference voltage circuit, and 4 is a D/
A converter, 5 is a timing circuit, 6 is an offset circuit, 7 is a register, 8 is a digital comparator, and 9 is an output signal of the A/D converter. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims

[Scope of utility model registration request]

a voltage comparison type comparator that compares an externally applied analog signal with the output voltage of the offset circuit; a successive approximation register to which the output voltage of the voltage comparison type comparator is input and whose operating speed is controlled by a timing circuit; D/ that converts the output of the successive approximation register into an analog voltage
The A/A converter consists of an A converter, a reference voltage circuit that supplies a reference voltage to the D/A converter, and an offset circuit that generates an offset voltage under the control of a timing circuit and adds it to the output of the D/A converter. In the D conversion circuit, the above-mentioned successive approximation register outputs an A/D conversion value when no offset voltage is added to the output of the above-mentioned D/A converter, and the output of the above-mentioned successive approximation register is accumulated under the control of a timing circuit. A register that outputs an A/D conversion value when adding an offset voltage to the output of the D/A converter, and a successive approximation register that outputs an A/D conversion value when adding an offset voltage to the output of the D/A converter, and a digital value comparison between the output of the successive approximation register and the output of the register. An A/D conversion device characterized by being provided with a digital comparator.