JPS6076187A - Method of producing printed circuit board - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a method of manufacturing a printed wiring board, and more particularly to a method of partially plating a portion of a circuit with a dissimilar metal.

(Description of Prior Art) As a method of partially plating a part of a circuit with a dissimilar metal, as shown in FIG. Take out the lead wire 1b and pull out the other part 1 including the lead wire.
After masking the outside of line 1d and performing electrolytic plating, the mask is inserted. Note that FIG. 1B is similar to FIG. 1A X,
-X/, is a cross-sectional view taken along the line. In addition, as shown in Figure 2, if it is difficult to secure a lead wire for partial plating because the conductor is surrounded by turns 2b and 2c, the circuit including the part 2a where you want to perform partial plating. The entire pattern will be electrolytically plated with different metals.

In the former case, in order to carry out partial plating after circuit/gut pattern formation, the portions to be partially plated are left and the remaining portions are masked with precision. In the latter case, full electrolytic plating of dissimilar metals for partial plating is performed when circuits and turns are formed. The above two methods are considered common, but each has the following drawbacks. In the former case, it is necessary to secure lead wires for partial plating, and the area where partial plating can be performed is limited due to the influence of the conductive pattern density, and when applying resist, the unevenness of the conductive pattern Possibility of coating leakage and after plating,
This involves the troublesome work of cutting the lead wires.

The latter method involves electrolytically plating a dissimilar metal for partial plating on the entire surface of the circuit during circuit formation, and therefore has the disadvantage that, especially when performing noble metal plating, unnecessary parts are also plated, making it expensive.

(Objective of the Invention) An object of the present invention is to provide a method for manufacturing a printed wiring board that does not require an I-line for partial plating and can keep partial plating to a necessary minimum.

(Structure of the Invention) The present invention includes a step of applying a first renost to the entire surface of a substrate provided with a thin copper foil as an upper layer, removing the first resist of the circuit A' turn portion from the resist, and said first
a step of plating to approximately the same thickness as the resist, and applying a second lenost over the entire surface of the first lenost,
A step of patterning and partially plating the desired circuit pattern portion of the second layer;
．． The method of manufacturing a printed wiring board includes the steps of removing a second resist and a portion of the copper foil other than the circuit/mother turn.

(Example) FIG. 3 shows a plan view of an intermediate process of a printed wiring board used in an example of the present invention. As shown in FIG. 3, when the circuit portions 3b + 3c are close to the pattern 3a on which dissimilar metals are to be partially plated by partial plating, it is difficult to secure lead wires for performing partial plating. That is, the case of the conventional example shown in FIG. 2 is shown. FIG. 3 shows a state in which a photosensitive resin film is attached, a conductive pattern is printed by exposure, and after development, a plating mask film 3d is formed and copper plating and nickel plating are applied. At this time, it is important that the total thickness of the copper plating and nickel plating be the same as that of the plating mask film 3d.

If such consideration is taken, when pasting or applying the mask for partial plating in the next process, the circuit parts 3b, 3
Since a step is formed between the plating mask film 3d and the plating mask film 3d, the contact area between the partial plating mask and the circuit portion 3b l 3C becomes smaller, and the adhesion between the partial plating mask and the circuit portion decreases. Therefore, the partial plating mask peels off during partial plating, and the partial plating ends up adhering to unnecessary areas. In other words, the plating mask film 3d is suitable for the total thickness of the copper and nickel plating.
is to use. In addition, Fig. 4 is the same as Fig. 3 x 2-
It is a sectional view along the x'2 line. In Figure 4, 3
b and 3C are the circuit parts that surround the pattern 7 J a that you want to partially plate, 3d is a mask film for plating, and pattern 3a that you want to partially plate is a pattern with nickel plating on the surface layer and copper plating on the bottom layer. Yes, board 4
@ foil 5 is pasted on both sides. Next, as shown in Fig. 5, the ie turn 3a and circuit portion 7b to be partially plated are
, 3 Without peeling off the mask 3d with the same thickness as the thickness of c, a photosensitive resin film is further pasted or a photosensitive resin liquid is applied on top of the mask 3d, and a mask for partial plating by exposure and turn baking development are performed. A partial plating mask 6 is formed. 6 is a sectional view taken along the line Xa-X'a in FIG. 5. FIG.

In FIG. 6, 6 is a partial plating mask made of a photosensitive resin film or a photosensitive resin liquid.

Next, as shown in FIG. 7, after applying partial gold plating 8 to the portions 7 that are not covered by the partial plating mask 6, the partial plating mask 6 and the conductive/gutter plating mask 3d
After sequentially peeling off the copper foil 5, unnecessary copper foil 5 on the substrate 4 is removed by etching as shown in FIG. 8, and the printed wiring board is completed. As a result, partial gold plating 8 is applied only to the pattern 3a to be partially plated.

(Effects of the Invention) According to the present invention, there is no need to take lead wires for partial plating, there is no need to perform expensive precious metal plating on unnecessary parts, and there is an advantage that partial plating can be performed only on desired parts. be.

[Brief explanation of drawings]

Figures 1A and 2 are plan views of conventional printed wiring boards, and Figure 1B
The figures are x, -x' line cross-sectional views of Figure 1A, Figures 3 to ? The figure is a process explanatory diagram of an embodiment of the present invention. 3a... i4 turn for partial plating, 3bg3c... circuit pattern, 3d... mask for circuit plating, 4... substrate, 5...
・・・Copper foil, 6...Mask for partial plating, 7...Turn part for partial plating, 8...Gold plating 6 Patent applicant Oki Electric Industry Co., Ltd. Figure 1A Figure 2 Figure 1B Figure 4 Figure 5 Figure 6 Figure 7

Claims (1)

[Claims] A step of applying a first resist to the entire surface of a substrate provided with a thin copper foil as an upper layer, and removing the first resist from the turn portion of the circuit to the resist, and applying a layer to the groove approximately equal to the first resist. plating to the same thickness, applying a second resist to the entire surface on the first resist, and applying the second resist to the entire surface of the first resist.
a step of patterning the desired portion of the circuit pattern of the resist and partially plating the resist; A method for manufacturing a printed wiring board, comprising the step of removing a second resist and a portion of the copper foil other than the circuit pattern 7.