JPS58103102U - thick film integrated circuit - Google Patents

thick film integrated circuit

Info

Publication number
JPS58103102U
JPS58103102U JP1982000342U JP34282U JPS58103102U JP S58103102 U JPS58103102 U JP S58103102U JP 1982000342 U JP1982000342 U JP 1982000342U JP 34282 U JP34282 U JP 34282U JP S58103102 U JPS58103102 U JP S58103102U
Authority
JP
Japan
Prior art keywords
thick film
integrated circuit
film integrated
film element
abstract
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1982000342U
Other languages
Japanese (ja)
Inventor
吉村　喜代和
弘幸 中野
Original Assignee
オムロン株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by オムロン株式会社 filed Critical オムロン株式会社
Priority to JP1982000342U priority Critical patent/JPS58103102U/en
Publication of JPS58103102U publication Critical patent/JPS58103102U/en
Pending legal-status Critical Current

Links

Landscapes

  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Non-Adjustable Resistors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は従来の厚膜集積回路における厚膜素子の平面図
、第２図は、本考案の厚膜集積回路における調整用厚膜
素子の平面図、そして第３図は本考案の厚膜集積回路に
おいて従来よりも仏法な調整を行なった場合の調整用厚
膜素子部分の縦断面図である。 ｉａ、　　ｌｂ・・・導体ランド、２・・・厚膜体、３
・・・厚膜素子、４ａ、　　４ｂ・・・接着樹脂、５・
・・チップ抵抗、６・・・抵抗体、７・・・セラミック
基板。FIG. 1 is a plan view of a thick film element in a conventional thick film integrated circuit, FIG. 2 is a plan view of an adjustment thick film element in a thick film integrated circuit of the present invention, and FIG. 3 is a plan view of a thick film element of the present invention. FIG. 7 is a longitudinal cross-sectional view of a thick film element for adjustment when a more advanced adjustment than the conventional one is performed in an integrated circuit. ia, lb...conductor land, 2...thick film body, 3
...Thick film element, 4a, 4b...Adhesive resin, 5.
...Chip resistor, 6...Resistor, 7...Ceramic substrate.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 回路機能の調整用厚膜素子を有する厚膜集積回路におい
て、前記調整用厚膜素子の導体ランドをチップ部品が搭
載できる形状、寸法に形成したことを特徴とする厚膜集
積回路。1. A thick film integrated circuit having a thick film element for adjusting circuit functions, characterized in that a conductive land of the thick film element for adjustment is formed in a shape and size that allows chip components to be mounted thereon.
JP1982000342U 1982-01-07 1982-01-07 thick film integrated circuit Pending JPS58103102U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1982000342U JPS58103102U (en) 1982-01-07 1982-01-07 thick film integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1982000342U JPS58103102U (en) 1982-01-07 1982-01-07 thick film integrated circuit

Publications (1)

Publication Number Publication Date
JPS58103102U true JPS58103102U (en) 1983-07-13

Family

ID=30013424

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1982000342U Pending JPS58103102U (en) 1982-01-07 1982-01-07 thick film integrated circuit

Country Status (1)

Country Link
JP (1) JPS58103102U (en)

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