JPS5748266A - Transistor - Google Patents

Transistor

Info

Publication number
JPS5748266A
JPS5748266A JP12308580A JP12308580A JPS5748266A JP S5748266 A JPS5748266 A JP S5748266A JP 12308580 A JP12308580 A JP 12308580A JP 12308580 A JP12308580 A JP 12308580A JP S5748266 A JPS5748266 A JP S5748266A
Authority
JP
Japan
Prior art keywords
region
emitter
electrode
resistance
epitaxial layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12308580A
Other languages
Japanese (ja)
Other versions
JPH0132667B2 (en
Inventor
Tadahiko Tanaka
Tsutomu Nozaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP12308580A priority Critical patent/JPS5748266A/en
Publication of JPS5748266A publication Critical patent/JPS5748266A/en
Publication of JPH0132667B2 publication Critical patent/JPH0132667B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0804Emitter regions of bipolar transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To realize high emitter resistance of a transistor by a method wherein a P<-> type epitaxial layer having high resistance is constituted on a P<+> type substrate. CONSTITUTION:A transistor cell 22 is formed in an island region 13 being partitioned by a lattice type isolation region 12. Size of a buried layer 16 provided at the lower part of an epitaxial layer 11 is designed as to contain a base region 14 and a collector contact region 17. In an oxide film 23 on the surface, contact holes are formed on the cellector contact region 17, the base region 14, an emitter region 15 and the isolation region 12 using the photo etching technique. After then a conductive metal is evaporated on the oxide film 23 and etching is performed to form a collector electrode 18, a base electrode 19, a connecting electrode 20 to connect the emitter region 15 and the isolaion region 12. Moreover an emitter electrode 21 is formed on the back main face of the substrate 10. The value of emitter resistance can be designed freely by adjusting specific resistance and thickness of the P<-> type epitaxial layer 102.
JP12308580A 1980-09-04 1980-09-04 Transistor Granted JPS5748266A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12308580A JPS5748266A (en) 1980-09-04 1980-09-04 Transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12308580A JPS5748266A (en) 1980-09-04 1980-09-04 Transistor

Publications (2)

Publication Number Publication Date
JPS5748266A true JPS5748266A (en) 1982-03-19
JPH0132667B2 JPH0132667B2 (en) 1989-07-10

Family

ID=14851828

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12308580A Granted JPS5748266A (en) 1980-09-04 1980-09-04 Transistor

Country Status (1)

Country Link
JP (1) JPS5748266A (en)

Also Published As

Publication number Publication date
JPH0132667B2 (en) 1989-07-10

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