JPS57199370A - Synchronizing signal resetting circuit of video camera - Google Patents
Synchronizing signal resetting circuit of video cameraInfo
- Publication number
- JPS57199370A JPS57199370A JP56084364A JP8436481A JPS57199370A JP S57199370 A JPS57199370 A JP S57199370A JP 56084364 A JP56084364 A JP 56084364A JP 8436481 A JP8436481 A JP 8436481A JP S57199370 A JPS57199370 A JP S57199370A
- Authority
- JP
- Japan
- Prior art keywords
- reset
- synchronizing signal
- signal
- video camera
- synchronizing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
- H04N5/12—Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Synchronizing For Television (AREA)
Abstract
PURPOSE:To easily reset a synchronizing signal of a camera without correcting an oscillating IC by a video camera using a synchronizing signal IC having no external reset terminal, by detecting a vertical or horizontal synchronizing signal of a video camera. CONSTITUTION:A vertical synchronizing signal V is generated together with an input clock by a synchronizing signal generating IC 1 having no synchronizing signal reset terminal of a synchronizing signal resetting circuit. Immediately before this signal V, an RSFF 3 is set by a preparation signal S, its output Q is set to H and the synchronizing reset processing is started. Subsequently, by the first signal V, an RSFF 2 is reset through an AND gate 5, and its output Q is set to L. In this state, supply of an original oscillator 6 to the IC 1 is stopped, subsequently the FF 2 is set by a reset signal R outputted from the outside, the output Q is reset to H, supply of a clock of the oscillator 6 is reopened, and simultaneously the FF 3 is reset by the signal R so that the next reset processing can be executed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56084364A JPS57199370A (en) | 1981-06-03 | 1981-06-03 | Synchronizing signal resetting circuit of video camera |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56084364A JPS57199370A (en) | 1981-06-03 | 1981-06-03 | Synchronizing signal resetting circuit of video camera |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57199370A true JPS57199370A (en) | 1982-12-07 |
JPS6126870B2 JPS6126870B2 (en) | 1986-06-23 |
Family
ID=13828462
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56084364A Granted JPS57199370A (en) | 1981-06-03 | 1981-06-03 | Synchronizing signal resetting circuit of video camera |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57199370A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59219080A (en) * | 1983-05-26 | 1984-12-10 | Nippon Kogaku Kk <Nikon> | Disc recording device |
JPS6040164U (en) * | 1983-08-27 | 1985-03-20 | ソニー株式会社 | Display clock generation circuit |
JPS62126781A (en) * | 1985-11-27 | 1987-06-09 | Mitsubishi Electric Corp | Video recorder |
JPS62150970A (en) * | 1985-12-24 | 1987-07-04 | Fujitsu Ltd | Phase synchronizing circuit |
JP2007060129A (en) * | 2005-08-23 | 2007-03-08 | Victor Co Of Japan Ltd | Image synchronization device |
-
1981
- 1981-06-03 JP JP56084364A patent/JPS57199370A/en active Granted
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59219080A (en) * | 1983-05-26 | 1984-12-10 | Nippon Kogaku Kk <Nikon> | Disc recording device |
JPH0430788B2 (en) * | 1983-05-26 | 1992-05-22 | ||
JPS6040164U (en) * | 1983-08-27 | 1985-03-20 | ソニー株式会社 | Display clock generation circuit |
JPS62126781A (en) * | 1985-11-27 | 1987-06-09 | Mitsubishi Electric Corp | Video recorder |
JPS62150970A (en) * | 1985-12-24 | 1987-07-04 | Fujitsu Ltd | Phase synchronizing circuit |
JPH0418751B2 (en) * | 1985-12-24 | 1992-03-27 | Fujitsu Ltd | |
JP2007060129A (en) * | 2005-08-23 | 2007-03-08 | Victor Co Of Japan Ltd | Image synchronization device |
Also Published As
Publication number | Publication date |
---|---|
JPS6126870B2 (en) | 1986-06-23 |
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