JPS54141596A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS54141596A
JPS54141596A JP5031578A JP5031578A JPS54141596A JP S54141596 A JPS54141596 A JP S54141596A JP 5031578 A JP5031578 A JP 5031578A JP 5031578 A JP5031578 A JP 5031578A JP S54141596 A JPS54141596 A JP S54141596A
Authority
JP
Japan
Prior art keywords
type
region
impurity concentration
layer
guard ring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5031578A
Other languages
Japanese (ja)
Inventor
Masato Nakajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5031578A priority Critical patent/JPS54141596A/en
Publication of JPS54141596A publication Critical patent/JPS54141596A/en
Pending legal-status Critical Current

Links

Landscapes

  • Bipolar Transistors (AREA)
  • Light Receiving Elements (AREA)

Abstract

PURPOSE: To improve dielectric strength by providing an operation region of opposite conductivity type within a semiconductor substrate of one conductivity type, encircling the outer side thereof with a first guard ring of the same conductivity type and a low impurity concentration and further encircling this with a second guard ring of the same conductivity type as that of the substrate and a low concentration.
CONSTITUTION: A π type first epitaxial layer 2 of an extremely low impurity concentration and a P type second epitaxial layer 3 of an impurity concentration slightly higher than this are epitaxially grown in lamination on a P+ type Si substrate 1. Next, an N+ type operating region 4 is diffusion formed in the layer 3 to grow a PN junction between these. Thereafter an N- type first guard ring 5 is provided in contact with the surface region of the region 4 within the layer 3 and further a P- type second guard ring 6 of a impurity concentration lower than that of the layer 3 is diffusion formed in contact with the outer side thereof. Next, a shallow P+ type channel stopper region 7 entering this ring 6 is provided on the outer side of this ring and the portions other than the region 4 are covered with a protecting film 8 such as SiO2.
COPYRIGHT: (C)1979,JPO&Japio
JP5031578A 1978-04-26 1978-04-26 Semiconductor device Pending JPS54141596A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5031578A JPS54141596A (en) 1978-04-26 1978-04-26 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5031578A JPS54141596A (en) 1978-04-26 1978-04-26 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS54141596A true JPS54141596A (en) 1979-11-02

Family

ID=12855457

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5031578A Pending JPS54141596A (en) 1978-04-26 1978-04-26 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS54141596A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58115873A (en) * 1981-12-28 1983-07-09 Fujitsu Ltd Semiconductor light-receiving element
US5032878A (en) * 1990-01-02 1991-07-16 Motorola, Inc. High voltage planar edge termination using a punch-through retarding implant
EP0518605A2 (en) * 1991-06-11 1992-12-16 Honeywell Inc. Bi-directional surge suppressor circuit
JPH06268239A (en) * 1993-03-12 1994-09-22 Rohm Co Ltd Surge absorbing diode

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58115873A (en) * 1981-12-28 1983-07-09 Fujitsu Ltd Semiconductor light-receiving element
JPS6259904B2 (en) * 1981-12-28 1987-12-14 Fujitsu Ltd
US5032878A (en) * 1990-01-02 1991-07-16 Motorola, Inc. High voltage planar edge termination using a punch-through retarding implant
EP0518605A2 (en) * 1991-06-11 1992-12-16 Honeywell Inc. Bi-directional surge suppressor circuit
JPH06268239A (en) * 1993-03-12 1994-09-22 Rohm Co Ltd Surge absorbing diode
US5990534A (en) * 1993-03-12 1999-11-23 Rohm Co., Ltd. Diode

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