JPH11162989A - Epitaxial silicon wafer and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an epitaxial silicon wafer which is given gettering function to make the other than a device active region catch metallic impurities without fail in simple process, without adopting such a means as to apply complicated multistage heat treatment requiring long time before and after conventional epitaxial growth. SOLUTION: Thermal oxidation (1000-1200 deg.C) is applied to a wafer for epitaxial growth which has capability of producing oxidation inductive stacking fault or a wafer for epitaxial growth which has the above capability by performing processing such as sand blast method, ion implantation method, etc., so as to introduce distortion. Then, OSF(oxidation inductive stacking fault) is produced in the surface layer of the wafer, and in the case of the wafer where the sand blast method or the like is applied, specular processing is applied further to the surface so as to form a wafer mirror face where OSF is exposed, and then an epitaxial layer is formed. As a result, the gettering function can be simply given to it.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an epitaxial silicon wafer having a gettering ability for trapping metal impurities outside a device active region. The present invention relates to an epitaxial silicon wafer having a reliable gettering capability of metal impurities in a simple process by forming an induced stacking fault, and thereafter performing mirror polishing as needed, and then forming an epitaxial layer, and a method of manufacturing the same.

[0002]

2. Description of the Related Art At present, integration of silicon semiconductor devices is rapidly increasing, and characteristics required for silicon wafers are becoming more severe. In a highly integrated device, if a device is formed, that is, a so-called device active region contains a crystal defect or a metal impurity other than a dopant, electrical characteristics such as an increase in leak current are deteriorated.

Conventionally, CZ-Si substrates grown by the CZ method have been used for highly integrated silicon semiconductor devices. These CZ-Si substrates contain supersaturated interstitial oxygen at about 10 ¹⁸ atoms / cm 2. included in the ^third order, the oxygen precipitates and dislocation, the crystal defects such as stacking faults is induced are well known in the device process.

However, in the past, heat treatment was performed at a high temperature of 1100 to 1200 ° C. for several hours to form a LOCOS and a WELL diffusion layer. In this method, a so-called DZ (Deluded Zone) layer having no crystal defects was formed during a device process, and generation of crystal defects in a device active region on a wafer surface was naturally suppressed.

However, with the miniaturization of semiconductor devices, high-energy ion implantation is used for WELL formation, and when the device process is performed at a low temperature of 1050 ° C. or less, the above-described oxygen outward diffusion occurs sufficiently. However, it has become difficult to form a DZ layer near the surface during device processing. For this reason, oxygen reduction of the substrate has been performed, but it has been difficult to completely suppress generation of crystal defects.

For these reasons, epitaxial wafers in which an epitaxial layer substantially free of crystal defects is grown on a substrate are widely used in today's highly integrated devices. However, even when an epitaxial wafer having high crystal integrity is used, metal impurity contamination of the epitaxial film in the subsequent device process deteriorates the characteristics of the device, so that the metal impurity is captured at a location (sink) remote from the device active region. Gettering technology is required.

[0007] Conventional gettering techniques include intrinsic gettering (IG) using a crystal defect caused by oxygen naturally induced during heat treatment in a device process as a sink, back surface distortion by sand blast on the back surface of the wafer, and the like. Extrinsic gettering (EG) typified by the backside coating of a polycrystalline silicon film by LPCVD has been used.

[0008]

In the epitaxial process, a high-temperature heat treatment at 1050 ° C. to 1200 ° C. is performed to reduce or eliminate oxygen precipitation nuclei existing in the CZ-Si substrate. In this case, it is difficult to induce a sufficient crystal defect in the substrate. Therefore, not only at the beginning of the device process but also throughout the process, the I
There is a new problem that the G effect is reduced.

In order to solve this problem, an IG has been used in which a crystal defect intentionally generated by subjecting a wafer to a heat treatment before and after the epitaxial process is used as a sink.

This heat treatment is basically a high-temperature heat treatment (1000-1200 ° C.) for reducing the oxygen concentration on the wafer surface by outward diffusion of oxygen and suppressing the formation of oxygen precipitates in the device active region, and for forming defect nuclei. And a medium temperature heat treatment (800-1000 ° C.) for growth, and these processes require a lot of time, and thus have a problem of cost increase.

In order to control the generation and growth of oxygen-induced crystal defects in these crystals, it is necessary to strictly control the oxygen concentration in the substrate when pulling the CZ crystal, in addition to the control by the above-mentioned heat treatment method. is there. As a technique for strictly controlling the oxygen concentration during CZ crystal growth, MC
Since the Z method is used, there is a problem of an increase in cost.

Regarding the EG processing, there is a problem in the sand blast processing that particles are generated from a distorted surface. In addition, in the method of attaching a polycrystalline silicon film to the back surface, there is a problem that the flatness is reduced due to a variation in film thickness because mirror processing is performed after the polycrystalline film is formed, in addition to the problem of cost. Further, there is a problem that the polycrystalline film is recrystallized during the device heat process, and the gettering ability is reduced during the device process.

According to the present invention, a getter for reliably capturing metal impurities outside a device active region by a simple process without employing a conventional multi-step heat treatment requiring a complicated and long time before and after epitaxial growth is adopted. The purpose is to provide an epitaxial silicon wafer with a ring ability.

[0014]

The inventors of the present invention have conducted various studies on a manufacturing method capable of easily providing a gettering ability for capturing metal impurities outside the device active region on an epitaxial silicon wafer. As the epitaxial layer grows on a silicon epitaxial growth substrate wafer having stacking faults (hereinafter referred to as OSF), the OSF exposed on the substrate surface propagates to the epitaxial layer and is completely closed at a certain epitaxial thickness. I learned.

The inventor has further studied to utilize the above phenomenon, and as a result, has performed a process such as an epitaxial growth wafer having a capability of generating oxidation-induced stacking faults by itself, or a sandblast method or an ion implantation method to reduce distortion. A wafer for epitaxial growth having the above capability is subjected to high-temperature thermal oxidation (1000 to 1200 ° C.) to generate OSF on the surface layer of the wafer. In the case of a wafer subjected to sandblasting or the like, the surface is further mirror-finished, After forming the OSF exposed wafer mirror surface,
The present inventors have found that the gettering ability can be easily provided by forming an epitaxial layer, and completed the present invention.

That is, the present invention relates to an epitaxial silicon wafer characterized by having an oxidation-induced stacking fault in the surface layer of the silicon wafer and an epitaxial layer formed thereon, wherein the epitaxial thickness is L, When the maximum stacking fault diameter is D and the required device active layer thickness is M, by providing an epitaxial layer having a thickness equal to or greater than the thickness obtained from the relational expression of L = 1.41D + M,
OS that is a gettering sink directly under the device active layer
An epitaxial wafer having an F layer can be obtained, and the object can be achieved.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention relates to a silicon epitaxial wafer substrate having an OSF on the mirror surface, as the epitaxial layer grows, the OSF exposed on the substrate surface is propagated to the epitaxial layer, and a certain epitaxial thickness is obtained. Is completely closed.

The OSF is a plane defect on the (111) plane. In this case, dislocations around the defect are missing on the surface. As shown in FIG. 1, the dislocation lines extend in the <110> series of directions perpendicular to the OSF plane orientation and at an angle of 45 ° C. with respect to the wafer surface, and the OSF shrinks with the epitaxial growth due to the dislocation. . At this time, in a wafer having a (100) surface, when the length of the OSF on the substrate surface is D and the epitaxial thickness is L, the OSF is completely closed at an epitaxial thickness of L = 1.41D.

Therefore, by controlling the oxidation temperature and time during the formation of the OSF, the size of the OSF to be introduced into the surface layer of the substrate is controlled, and the epitaxial layer having a thickness equal to or greater than the thickness obtained from the above relation from the relational expression L = 1.41D + M Is provided, a device active layer and an OSF layer serving as a gettering sink can be formed within a predetermined epitaxial thickness.

In the present invention, a wafer for epitaxial growth, which has the ability to generate oxidation-induced stacking faults by introducing mechanical strain such as sandblasting, needs to be mirror-polished after heat treatment and before epitaxial growth. However, wafers for epitaxial growth, which have the ability to generate oxidation-induced stacking faults by themselves, or have the ability to generate oxidation-induced stacking faults by introducing strain by performing processes such as ion implantation, especially before epitaxial growth There is no need to perform mirror polishing again.

[0021]

EXAMPLE 1 As a sample, a 4-inch diameter p-type (100): resistivity 17
~ 23Ωcm, interstitial oxygen concentration 11 ~ 15 × 10 ¹⁷ at
oms / cm ³ , a CZ-Si wafer was used. Sandblasting these sample wafers,
Heat treatment was performed at 1150 ° C. for 2 hours in a dry oxygen atmosphere to form an OSF. Next, the wafer surface was mirror-polished and shaved by about 3 μm, so that the OSF was completely exposed on the surface. Further, in an epitaxial reactor, after etching about 0.5 μm with hydrogen chloride gas at 1010 ° C.,
To grow a silicon layer of about 15 μm.

FIG. 2 is a cross-sectional TEM observation photograph showing the result of observing the sample prepared by the above method after processing it as a transmission electron microscope (TEM) sample in the cross-sectional direction of the wafer, that is, the wafer (100) in the (110) direction. ,Also,
FIG. 3 shows a planar TEM observation photograph. From FIG. 2, it was confirmed that the OSF was contracted with the epitaxial growth,
Further, as shown in the schematic diagram of FIG. 1, when the epitaxial thickness is L and the OSF diameter is D with the growth of the epitaxial layer, the OSF disappears at the epitaxial thickness determined by the relational expression of L = 1.34D.

Example 2 The following evaluation was performed to examine the gettering ability of the wafer. A wafer prepared by the above method was used as a sample, and a polycrystalline film was formed on the back of the
The following evaluations were performed using three types of wafers, one on which m deposition was performed and the other on which no treatment was performed.

The surfaces of these wafers were treated with 3 ppm of Cu.
(NO ₃ ) ₂ After contamination with an aqueous solution by a spin coater,
A simple heat treatment assuming the device process shown in FIG. 4 is performed in a dry oxygen atmosphere, and A to C shown in FIG.
Wafers were extracted from each of the three points.

Next, after removing the thermal oxide film with hydrofluoric acid,
Oxidation is performed in a dry oxygen atmosphere at 000 ° C. for 2 hours to form a gate oxide film having a thickness of about 75 nm.
Perform sintering in a nitrogen atmosphere at 50 ° C for 30 minutes,
A 1 mm × 1 mm gate electrode having a guard electrode was formed. Next, gettering evaluation was performed based on the generation lifetime of the MOS.

FIG. 5 shows the results of measuring the occurrence lifetime. From this result, the wafer prepared by the manufacturing method of the present invention shows a substantially constant lifetime from the beginning to the end of the process as compared with the wafer on which the IG processing and the polycrystalline silicon film are deposited. It can be seen that uniform gettering ability is maintained.

[0027]

According to the present invention, by introducing a strain into a wafer surface and then performing a heat treatment in an oxygen-containing atmosphere to form oxidation-induced stacking faults and then forming an epitaxial layer,
A gettering sink can be formed immediately below the device active layer. Thereby, a gettering layer can be formed at a position very close to the device active layer, and gettering can be performed efficiently.

In the present invention, since the OSF is formed once and maintains a stable state in the thermal process, it hardly disappears during the device process.
Therefore, the gettering ability can be stably maintained throughout the epitaxial growth process and the initial stage of the device process.

[Brief description of the drawings]

FIG. 1 is a schematic diagram illustrating a state in which an OSF on a wafer surface is closed with epitaxial growth.

FIG. 2 is a cross-sectional photograph showing the result of observing a transmission electron microscope (TEM) in the (110) direction of the epitaxial silicon wafer (100) produced by the method of the present invention.

FIG. 3 is a plan photograph of the TEM sample of FIG. 2;

FIG. 4 is a heat pattern diagram showing a temperature change in a thermal simulation assuming a device process.

FIG. 5 shows A, B, and C shown in FIG. 4 of the heat pattern diagram.
It is a graph which shows the measurement result of generation lifetime of each wafer taken out from three places.

Claims (4)

[Claims] 1. An epitaxial silicon wafer having an oxidation-induced stacking fault on a surface layer of a silicon wafer and an epitaxial layer formed thereon. 2. An epitaxial layer having a thickness equal to or greater than a thickness obtained from a relational expression of L = 1.41D + M, where L is an epitaxial thickness, D is a maximum diameter of oxidation-induced stacking faults, and M is a thickness of a necessary device active layer. An epitaxial silicon wafer having a layer. 3. An epitaxial growth method comprising: heat-treating a silicon epitaxial growth wafer capable of generating oxidation-induced stacking faults in an atmosphere containing oxygen to introduce oxidation-induced stacking faults into a surface layer; and forming an epitaxial layer on the wafer surface. Silicon wafer manufacturing method. 4. The method for producing an epitaxial silicon wafer according to claim 3, wherein the silicon epitaxial growth wafer is a wafer having a surface with strain introduced.