JPH10261800A - Formation of fixed charge in insulating film and manufacture of thin film transistor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce off current and increase on current with respect to a method for the manufacture of a thin film transistor of offset gate structure. SOLUTION: The forming and manufacturing method contains a process wherein a gate insulating film 14a and a gate electrode 15a to be an offset gate are formed on a semiconductor layer 13a; a process wherein the gate insulating film 14a in the offset region C around the gate electrode 15a is ion- implanted with component elements common to the gate insulating film 14a and the semiconductor layer 13a; and a process wherein the entire surface is irradiated with impurity ions simultaneously with, before, or after the component element ion implantation to form fixed charge in the gate insulating film 14a in the offset region C and further form a drain region in the semiconductor layer 13b adjacent to the offset region.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming fixed charges in an insulating film, a thin film transistor and a method for manufacturing the same, and more particularly, to a method for forming fixed charges in an insulating film, and a method for manufacturing the same. The present invention relates to a thin film transistor having an offset gate structure and a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, thin film transistors have been widely used as elements for driving liquid crystal displays, electroluminescence, and the like, and improvements have been made. Although an insulated gate field effect transistor is used as the thin film transistor, due to the structure that the drain region is located near the gate,
Since a high electric field is applied to the end of the drain region, the off-state current increases. In addition, since the silicon layer as the operating semiconductor layer is formed over the insulating film, the silicon layer becomes polycrystalline, and it is inevitable that the leakage current of the transistor becomes larger than that of a single crystal. This is in addition to the off-state current, and the off-state current increases.

When a transistor having a large off-state current is used in a liquid crystal display, there arise problems such as that a reference voltage is shifted and a normal voltage is not applied to the liquid crystal, and a battery is quickly consumed. Therefore, the off-state current needs to be reduced as much as possible. For this reason, an offset gate structure or an LDD (Lightly Doped Drain) structure is employed.

FIGS. 7A to 7C are cross-sectional views showing a method of manufacturing a thin film transistor having an LDD structure. FIG. 7A shows a state after forming the gate electrode and before forming the offset gate structure. An insulating film 2 is formed on a glass substrate 1, on which an operating semiconductor layer 3 made of polysilicon and a gate electrode 4 and a gate electrode 5 made of an insulating film are formed. The active semiconductor layer 3 that is not covered with the insulating film 4 becomes a high-concentration source region and a drain region (B), and the gate electrode 5 and the exposed active semiconductor layer 3
The region just below the insulating film 4 between the lightly
Drain) area (A).

In this state, first, as shown in FIG. 7B, phosphorus (P) ions are implanted. In this case, the insulating film 4
Such that high-concentration P ions are introduced into the operating semiconductor layer 3 which is not covered with the gate electrode 5 and low-concentration P ions are introduced into the operating semiconductor layer 3 under the insulating film 4 around the gate electrode 5. Do with. FIGS. 8A and 8B show the impurity distribution introduced in this manner.

Next, as shown in FIG. 7C, after an interlayer insulating film 6 is formed, openings 7a to 7c are formed in the interlayer insulating film 6.
Is formed, and a source electrode 8a, a gate extraction electrode 8b, and a drain electrode 8c that are in contact with the source region, the gate electrode 5, and the drain region through the openings 7a to 7c are formed. Thus, a thin film transistor is completed. LDD above
In the thin film transistor having the structure, the electric field is relaxed by the LDD region (A), so that off current can be reduced.

On the other hand, in the offset gate structure, the same region as the low-concentration LDD region is used as an offset region into which impurities are not introduced, and the distance between the end of the gate electrode 5 and the end of the drain region is widened to reduce the electric field. It is. This can also reduce the off-state current.

[0008]

However, in the thin film transistor having the LDD structure, the LDD region (A)
As the dose to the operating semiconductor layer 3 increases, the number of defects therein increases, which may affect the effect of negating the electric field relaxation effect of the LDD structure, making it impossible to reduce the off-current.

On the other hand, when the offset gate structure is used, impurities are not introduced into the offset region (electric field relaxation region), so that introduction of defects into the offset region can be avoided.
The resistance in the offset region increases, and the on-current decreases. For this reason, there is a problem that it is not possible to increase the density and the operation speed. SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the related art, and provides a method of forming fixed charges in an insulating film capable of stabilizing fixed charges, and applying the forming method. Accordingly, it is an object of the present invention to provide a thin film transistor capable of reducing an off current and increasing an on current, and a method for manufacturing the same.

[0010]

The first object of the present invention is to form an insulating film on a semiconductor layer, to fix impurity ions introduced into the insulating film, and to reduce the charge. A step of ion-implanting an element to be stabilized into the insulating film, and a step of implanting the impurity ion into the insulating film simultaneously with, before, or after ion-implanting the element into the insulating film. A second aspect of the present invention, which is solved by a method of forming fixed charges in an insulating film, wherein the element is a constituent element or an inert element of the insulating film. The third aspect of the present invention is a method for forming fixed charges in an insulating film, wherein the material of the insulating film is an insulating material containing silicon and oxygen, and the material of the semiconductor layer is silicon. Structure of membrane The element is silicon or oxygen, which is solved by the method for forming fixed charges in an insulating film according to the second invention, and is a fourth invention, wherein a gate insulating film and an offset gate are formed on a semiconductor layer. Forming a gate electrode to be formed, and ion-implanting those constituent elements common to the gate insulating film and the semiconductor layer into a gate insulating film in an offset region around the gate electrode. Simultaneously with or before or after the ion implantation of the element, the entire surface is irradiated with impurity ions to form fixed charges in the gate insulating film of the offset region, and a drain region is formed in the semiconductor layer adjacent to the offset region. Forming a thin film transistor.
The fourth invention is characterized in that a material of the gate insulating film is an insulating material containing silicon and oxygen, a material of the semiconductor layer is silicon, and a constituent element of the gate insulating film is silicon. A method for forming a gate insulating film and a gate electrode serving as an offset gate on a semiconductor layer, which is solved by the method for manufacturing a thin film transistor according to the invention of the sixth aspect, and a step of forming an insulating film on the entire surface, Ion-implanting the constituent elements of the insulating film into the insulating film, patterning the insulating film and leaving it in an offset region around the gate electrode, and implanting impurity ions over the entire surface, Forming fixed charges in the insulating film in the offset region, and forming a drain region in the semiconductor layer adjacent to the offset region. In a seventh aspect of the present invention, the material of the insulating film is an insulating material containing silicon and oxygen, the material of the semiconductor layer is silicon, and the constituent element of the insulating film is oxygen. An eighth invention is solved by the method for manufacturing a thin film transistor according to the sixth invention, characterized in that:
The problem is solved by a thin film transistor formed by the method for manufacturing a thin film transistor according to any one of the fourth to seventh inventions.

According to the method of forming fixed charges in an insulating film of the present invention, an element for fixing impurity ions introduced into the insulating film and stabilizing the charges is ion-implanted into the insulating film. In addition, it becomes possible to introduce impurity ions into the insulating film and form stable fixed charges therein.
For example, when an element constituting the insulating film or an inert element such as argon is used as an element for fixing the impurity ions and stabilizing the charge thereof, the introduction of such an element into the insulating film may result in an excessive or unacceptable amount of the constituent elements. A bond or the like is cut by the active element, and a dangling bond or the like is generated. It is considered that these fix the impurity ions and stabilize the charges.

Therefore, when this stable fixed charge is used for inducing carriers in the operating semiconductor layer, it is possible to suppress the fluctuation of the amount of induced carriers due to the fluctuation of the fixed charge. it can. Thus, a variation in element characteristics can be prevented, and a highly reliable semiconductor device can be obtained. In the thin film transistor of the present invention in which the above forming method is applied to the insulating film in the offset region of the offset gate, carriers having charges opposite to the fixed charges are induced in the active semiconductor layer in the offset region by the fixed charges in the insulating film. The resistance value of the offset region can be substantially reduced. Thereby, the ON current can be increased.

Moreover, since impurity ions are not introduced into the active semiconductor layer in the offset region, the introduction of defects into the active semiconductor layer due to the introduction of the impurity ions can be suppressed, and the off-current can be reduced. This is particularly effective when polysilicon is used as the material of the operating semiconductor layer. Furthermore, since these constituent elements common to the insulating film and the operating semiconductor layer are used as elements for fixing the impurity ions and stabilizing the charge, when the element is implanted into the insulating film, the element operates. Even if it is introduced into the semiconductor layer, it does not become a different element for the operating semiconductor layer, and the influence on the characteristics and the like of the operating semiconductor layer can be suppressed as much as possible.

Further, since the charges of the impurity ions are stabilized, the charges of the impurity ions can be retained even if the heat treatment is performed at a considerably high temperature after the introduction of the impurity ions. Accordingly, the range of application to the manufacturing process is widened, and a semiconductor device with high stability over time and high reliability can be obtained.

[0015]

Embodiments of the present invention will be described below with reference to the drawings. (1) First Embodiment FIGS. 1 and 2 are cross-sectional views showing a method of manufacturing a thin film transistor according to a first embodiment of the present invention.

First, as shown in FIG. 1A, a glass substrate 11 is put into a chamber of a plasma CVD apparatus, and the pressure is reduced. The flow rate is 20 sccm of SiH ₄ gas and ₂ slm of N ₂ O.
A gas mixture with a gas is introduced. At a gas pressure of 100 Pa, an RF power (13.56 MHz) of 300 W is applied to generate a plasma, and a silicon oxide film (Si
An O ₂ film 12 is formed on the glass substrate 11.

Subsequently, while maintaining the reduced pressure in the chamber, the reaction gas was supplied with SiH ₄ gas at a flow rate of 200 sccm, H ₂ gas at a flow rate of 800 sccm, and B ₂ H _{6 at a} flow rate of 4 × 10 ^-4 sccm.
Switch to gas mixture with gas, gas pressure 100Pa,
Under the condition of RF power (13.56 MHz) 80 W, the film thickness 5
A 0 nm amorphous silicon film (a-Si film) 13 is continuously formed on the silicon oxide film 12.

Next, the glass substrate 1 is placed in an N ₂ gas atmosphere.
1 is heated to a temperature of 450 ° C. and maintained for one hour, and hydrogen is discharged from the inside of the a-Si film 13. Subsequently, as shown in FIG. 1B, while the glass substrate 11 was heated to a temperature of 200 ° C., XeCl excimer laser light having an energy density of 400 mJ / cm ² was irradiated to further raise the substrate temperature. -S
The i film 13 is crystallized. Thereby, the a-Si film 13
Becomes a polysilicon film (p-Si film) 13a.

Next, as shown in FIG. 1C, p-Si
The film 13a is patterned to form the operating semiconductor layer 13b. Next, as shown in FIG. 1D, a 150 nm-thick silicon oxide film 1 is formed by the plasma CVD method described in FIG. 1A under the same gas conditions and plasma generation conditions.
After forming 4, an aluminum film 15 having a thickness of 300 nm is formed by a sputtering method.

Next, as shown in FIG. 2A, the aluminum film 15 is patterned to form a gate electrode 15a having a width of about 5 μm above the operating semiconductor layer 13b. Subsequently, the silicon oxide film 14 is patterned and left in the offset region (C region) immediately below the gate electrode 15a and its peripheral portion. The operating semiconductor layer 13b is exposed in a region (D region) outside the offset region (C region).

Next, as shown in FIG. 2 (b), an acceleration voltage of 30 keV and a non-mass separation type ion implantation apparatus were used.
Silicon ions (Si ions) are implanted under ion implantation conditions of a dose of 1 × 10 ¹⁵ cm ⁻² . Offset area (C
FIG. 3A shows an expected concentration distribution of Si in the gate insulating film 15a (region). At this time, the operating semiconductor layer 13
Although Si is also implanted into b, since the constituent elements are used, it is not a different element for the operating semiconductor layer 13b, and the influence on the characteristics and the like of the operating semiconductor layer 13b can be suppressed as much as possible.

Next, as shown in FIG. 2 (c), acceleration voltage 30 keV, phosphorous ions are implanted (P ions) by ion implantation a dose of 4 × 10 ¹⁵ cm ^-2. FIG. 3A shows the concentration distribution of P in the gate insulating film 15a in the offset region (C region), and FIG. 3B shows the concentration distribution of P in the operating semiconductor 13b in the drain region (D region). . At this time, the phosphorus ions are less likely to be neutralized due to the action of Si implanted immediately before, and approximately 10% of all the implanted phosphorus ions are formed in the film 15a as P ⁺ having a positive charge.

Next, in order to activate phosphorus implanted in the operating semiconductor layer 13b, an energy density of 250 mJ /
The working semiconductor layer 13b is irradiated with a laser beam of cm ⁻² . At this time, the process is performed in such a short time that electrons are not captured by P ⁺ in the gate insulating film 14a. Therefore, laser light is applied in a pulsed manner. Next, as shown in FIG. 2D, a silicon oxide film 16 having a thickness of 300 nm is formed by a plasma CVD method and then patterned to form contact holes on the source diffusion region, the gate electrode 15a, and the drain diffusion region, respectively. 17a, 17b and 17c are formed.

Next, after an aluminum film is formed on the entire surface by sputtering, patterning is performed to form a source electrode 18a, a gate lead electrode 18b, and a drain electrode 18c that are in contact with the source diffusion region, the gate electrode 15a, and the drain diffusion region, respectively. . Thus, a thin film transistor (TFT) is completed. Thereafter, if necessary, annealing is performed in a hydrogen plasma at a temperature of 350 ° C. for 2 hours to terminate dangling bonds of the polysilicon film that is the operating semiconductor layer 13b.

According to the thin film transistor formed as described above, since the thin film transistor has an offset gate structure and does not introduce impurities into the active semiconductor layer 13b in the offset region, a thin film transistor having a small off current can be obtained. .
FIG. 4 shows the result of the investigation of the ON current (drain current).
Shown in The vertical axis is a drain current (A) expressed on a logarithmic scale.
And the horizontal axis represents the gate voltage (V) expressed on a linear scale. For comparison, the on-current (drain current) of the thin film transistor having the offset structure according to the conventional example was also investigated.

According to the results shown in FIG. 4, the thin film transistor having the offset gate structure according to the present invention has a larger on-state current than the thin film transistor having the normal offset gate structure. This is because, since P ⁺ in the gate insulating film 14a induces electrons in the active semiconductor layer 13b in the offset region, the resistance there is lower than that of a normal offset gate structure. Conceivable.

Next, the P formed in the gate insulating film 14a is formed.
^In order to examine the stability of ⁺ , the state of the change of the _VFB shift with respect to the annealing treatment was examined. FIG. 5 shows the result.
The vertical axis shows the V _FB shift (V) expressed on a linear scale, and the horizontal axis shows the annealing temperature (° C.) expressed on a linear scale. For comparison, a sample in which only phosphorus ions were implanted under the same conditions as above without implanting silicon ions was similarly examined.

According to the results shown in FIG. 5, in the thin film transistor according to the first embodiment, the V _FB starts to fluctuate only at an annealing temperature of 400 ° C. or higher, while the heating temperature of the sample in which only phosphorus ions are implanted is increased. From around 300 ° C
_FB shift occurs. This indicates that the phosphorus ions in the gate insulating film 14a according to the present invention are stable without capturing electrons or the like up to a considerably high temperature. This is because, due to the Si ion implantation in the step of FIG. 2B, dangling bonds and the like due to excess Si are generated in the gate insulating film 15a, which has a function of fixing phosphorus ions and stabilizing the charges. It is thought that it is.
From this, it can be said that a similar effect can be obtained even when a bond of a constituent element of the gate insulating film 15a is cut using an inert element.

Further, as described above, after forming the source / drain diffusion region by the thin film transistor,
The present invention can be applied to the case where the present invention is formed through the above-described high-temperature treatment, for example, a hydrogen termination treatment at a heating temperature of 320 ° C., and thereby the range of application to the manufacturing process is widened. It is also stable over time because it is thermally stable,
Reliability can be improved.

(2) Second Embodiment FIGS. 6A and 6B are cross-sectional views showing a method of manufacturing a thin film transistor according to a second embodiment of the present invention. The difference from the first embodiment is that the element which fixes the impurity ions and stabilizes the charge thereof is
That is, ions of oxygen which is a constituent element of the silicon oxide film are used.

In this case, after the step of FIG.
As shown in FIG. 2A, the aluminum film 15 and the silicon oxide film 14 are etched using the same resist film as a mask to form a gate electrode 15b and a gate insulating film 14b. Subsequently, a silicon oxide film 19 having a thickness of 150 nm is formed by covering these. Next, an acceleration voltage of 20 keV,
O ions are implanted into the silicon oxide film 19 under ion implantation conditions of a dose of 5 × 10 ¹⁴ cm ⁻² . At this time, since the gate electrode 15b and the active semiconductor layer 13b are covered with the silicon oxide film 19, it is possible to prevent a reaction between them and O ions.

Next, the silicon oxide film 19 is patterned, and is left only on the gate electrode 15b and its peripheral portion. The remaining silicon oxide film is indicated by reference numeral 19a. In a region outside the region, a part of the operating semiconductor layer 13b serving as a source region and another part of the operating semiconductor layer 13b serving as a drain region are exposed. Next, an acceleration voltage of 20 keV and a dose of 6 × 10 ¹⁴
P ions are implanted under an ion implantation condition of cm ⁻² . As a result, P ions are transferred to the silicon oxide film 1 in the offset region.
9a and into the source region and the drain region of the operating semiconductor layer 13b.

At this time, about 10% of the total phosphorus ions in the silicon oxide film 19a in the offset region is fixed as P ⁺ , and the inflow and outflow of electric charges are suppressed and stabilized. In this case as well, the implantation of O ions causes an excess oxygen state, and defects such as dangling bonds occur in the silicon oxide film 19a as in the case of implanting Si ions. This is considered to be for fixing the phosphorus ions and stabilizing the charge.

Thereafter, through the step of FIG. 2D, a thin film transistor is completed. Also in the second embodiment,
The introduction of O ions into the silicon oxide film 19a stabilizes the charge of P ⁺ introduced into the silicon oxide film 19a, so that the source region and the drain region are formed and then subjected to a high-temperature treatment of 300 ° C. or more. The present invention can be applied to a case where a thin film transistor is manufactured. Also, P
⁺ Is stable over time because it is thermally stable, and can improve reliability.

In the first and second embodiments, Si ions and O ions are implanted before P ions. However, these ions may be implanted at the same time. May be performed after the P ion implantation. Further, insulating films 14a for forming fixed charges,
Although a silicon oxide film is used as 19a, a silicon nitride film or another insulating film may be used. In this case, silicon or nitrogen which is a constituent element of the insulating film is used as ions to be ion-implanted into the insulating film. In some cases, an inert element such as argon may be used.

Further, the present invention is applied to an insulating film in an offset region of an offset gate structure as an insulating film for forming fixed charges, but can be applied to an insulating film for other uses.

[0037]

As described above, according to the present invention, the element for fixing the impurity ions introduced into the insulating film and stabilizing its charge is ion-implanted into the insulating film. It becomes possible to introduce impurity ions therein and form stable fixed charges therein.

Therefore, when the present invention is applied to, for example, inducing a predetermined amount of carriers in the semiconductor layer, it is possible to suppress the amount of induced carriers from fluctuating. And a highly reliable semiconductor device can be obtained. In addition, since the fixed charge is thermally stable, the range of application to a manufacturing process including a heat treatment is widened.

According to the thin film transistor and the method of manufacturing the same of the present invention, since fixed charges are formed in the insulating film in the offset region adjacent to the drain region, carriers are substantially induced by the induction of carriers. The value can be reduced, thereby increasing the on-state current. In addition, since an impurity that enhances conductivity is not introduced into the active semiconductor layer in the offset region, the off-state current can be reduced.

Further, since the constituent elements of the working semiconductor layer are used, when the element is injected into the insulating film, even if the element is introduced into the working semiconductor layer, it does not become a different element to the working semiconductor layer, The influence on the characteristics and the like of the semiconductor layer can be suppressed as much as possible.

[Brief description of the drawings]

FIGS. 1A to 1D are cross-sectional views (part 1) illustrating a method for manufacturing a thin film transistor according to a first embodiment of the present invention.

FIGS. 2A to 2D are cross-sectional views (part 2) illustrating a method for manufacturing a thin film transistor according to the first embodiment of the present invention.

FIG. 3A is a diagram showing a concentration distribution of Si and P in a silicon oxide film in an offset region in the method for manufacturing a thin film transistor according to the first embodiment of the present invention; (B) is a diagram showing a concentration distribution of P in the polysilicon layer in the drain region.

FIG. 4 is a characteristic diagram illustrating a state of a change in a drain current with respect to a gate voltage of the thin film transistor according to the first embodiment of the present invention.

FIG. 5 is a characteristic diagram illustrating a state of a change in a _VFB shift with respect to an annealing temperature of the thin film transistor according to the first embodiment of the present invention.

FIGS. 6A and 6B are cross-sectional views illustrating a method of manufacturing a thin film transistor according to a second embodiment of the present invention.

FIGS. 7A to 7C are cross-sectional views showing a method for manufacturing a thin film transistor according to a conventional example.

FIG. 8A is a diagram showing a concentration distribution of P in a silicon oxide film and a polysilicon layer in an electric field relaxation region in a method for manufacturing a thin film transistor having an LDD structure according to a conventional example. FIG. 8B is a diagram showing the concentration distribution of P in the polysilicon layer in the drain region.

[Explanation of symbols]

 Reference Signs List 11 glass substrate (substrate), 12, 14, 16, 19, 19a silicon oxide film, 13 amorphous silicon film, 13a polysilicon film, 13b operating semiconductor layer, 14a, 14b gate insulating film, 15 aluminum film, 15a, 15b gate Electrodes, 17a, 17b, 17c Opening, 18a Source electrode, 18b Gate extraction electrode, 18c Drain electrode.

Claims (7)

[Claims] A step of forming an insulating film on the semiconductor layer; a step of fixing an impurity ion introduced into the insulating film and ion-implanting an element for stabilizing the charge into the insulating film; Implanting the impurity ions into the insulating film simultaneously with, before, or after ion-implanting the element into the insulating film. 2. The method according to claim 1, wherein the element is a constituent element or an inactive element of the insulating film. 3. The material of the insulating film is an insulating material containing silicon and oxygen, the material of the semiconductor layer is silicon, and a constituent element of the insulating film is silicon or oxygen. 3. The method for forming fixed charges in an insulating film according to item 2. 4. A step of forming a gate insulating film and a gate electrode serving as an offset gate on the semiconductor layer; and forming the gate insulating film and the semiconductor layer in a gate insulating film in an offset region around the gate electrode. Step of ion-implanting those constituent elements in common with, and simultaneously with, before or after the ion-implantation of the constituent elements, irradiating the entire surface with impurity ions to fix the fixed charges in the gate insulating film of the offset region. While forming
Forming a drain region in a semiconductor layer adjacent to the offset region. 5. A method according to claim 1, wherein a material of said gate insulating film is an insulating material containing silicon and oxygen, a material of said semiconductor layer is silicon, and a constituent element of said gate insulating film is silicon. 5. The method for manufacturing a thin film transistor according to 4. 6. A step of forming a gate insulating film and a gate electrode serving as an offset gate on a semiconductor layer; a step of forming an insulating film over the entire surface; and ion-implanting constituent elements of the insulating film into the insulating film. Patterning the insulating film and leaving it in an offset region around the gate electrode; implanting impurity ions over the entire surface to form fixed charges in the insulating film in the offset region; Forming a drain region in a semiconductor layer adjacent to the offset region. 7. The method according to claim 6, wherein a material of the insulating film is an insulating material containing silicon and oxygen, a material of the semiconductor layer is silicon, and a constituent element of the insulating film is oxygen. A method for manufacturing the thin film transistor according to the above.