JPH08149490A - Convergence corrector - Google Patents

Abstract

PURPOSE: To reduce memory capacity. CONSTITUTION: This device is provided with a memory 6 for setting the central part of a screen as a non-correction area and storing the correction data of adjusting points excepting for the non-correction area and a non-correction area setting part 9 for outputting a non-correction recognizing signal to a data converting part 5 when processing enters the non-correction area. In any area out of the non-correction area, the correction data in the memory 6 are read out and these correction data are converted to a correction level value and outputted by the data converting part 5. In the non-correction area, the non- correction recognizing signal is outputted and the data converting part 5 outputs the correction level value of correction amount zero.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a convergence (concept including registration) correction device for aligning RGB on a screen in a projector, a monitor (in particular, a high resolution monitor for a computer or a workstation), and the like. .

[0002]

2. Description of the Related Art Analog type convergence adjustment is
An appropriate correction waveform is obtained by preparing a plurality of types of original correction waveforms and combining these original correction waveforms.
However, it is difficult for the analog type to specify the correction area for correction, that is, if an original correction waveform that matches a certain point to be selected is selected, new convergence will occur at other points, so it will be difficult to adjust. However, the adjustment could not be performed quickly. Therefore, FIG. 8 shows a conventional example in which a digital convergence adjustment is proposed and the digital convergence adjustment is applied to a projector.

In FIG. 8, the operation unit 1 is provided with an input key such as a ten-key pad, and data (for example, correction data) input from the operation unit 1 is supplied to the CPU 2 '. CP
The U 2 ′ controls the character generator 3 ′, the memory control unit 4 ′, the data conversion unit 5, etc. based on the instruction from the operation unit 1. The CPU 2'also performs high-order interpolation calculations.

The character generator 3'which is an adjustment pattern generating means is constructed so as to be able to output an adjustment pattern signal for displaying a plurality of adjustment points on the screen to each CRT 10 of RGB. As shown in FIG. 9, each intersection of the vertical broken line and the horizontal broken line is an adjustment point, and the total of 150 adjustment points is 15 points in the horizontal direction × 10 points in the vertical direction.
It is a point. Then, the cross-hatching pattern shown in FIGS. 10 and 11 is displayed on the screen 11 by the adjustment pattern signal, and each intersection of the cross-hatching pattern is an adjustment point.

Returning to FIG. 8 again, the memory control unit 4 is a CPU.
Writing and reading of the memory 6'are controlled based on the control signal 2 '. The memory 6'has a storage capacity capable of storing correction data for all adjustment points, and one adjustment point requires horizontal and vertical data for each of RGB, so a total of six types of correction data are stored. To be done. The RGB correction data (horizontal and vertical) sent from the CPU 2'is written at a predetermined address, and the read correction data is output to the CPU 2'and the data conversion unit 5 '.

The data conversion unit 5'converts the six types of correction data serially sent for one adjustment point into actual correction level values, and outputs the RGB correction level values in parallel. Further, low-order interpolation (primary interpolation) is calculated based on the input correction data, and the correction level value of the interpolation point between the adjustment points is created and output. That is, the data conversion unit 5 ′ sequentially outputs each correction level value of the adjustment point and the interpolation point to the D / A converter 7. D
The / A converter 7 converts the correction level value into an analog signal,
The high-frequency component of this converted output is passed through a low-pass filter (LP
F) By cutting at 8, an analog correction waveform is generated. This analog correction waveform is supplied to the deflection yoke for convergence correction. In a device without the deflection yoke for convergence correction, the analog correction waveform is superimposed on the deflection waveform and supplied to the H and V deflection yokes.

In the above structure, when the correction mode is selected, a cross-hatching pattern as shown in FIG. 10 is displayed on the screen 11, and the correction data is input for all adjustment points by observing the state of the cross-hatching pattern. To do. The input correction data is written in the memory 6 ', and a new cross-hatching pattern is displayed by generating a correction waveform based on this correction data. When this operation is repeated and the cross-hatching pattern is displayed in an accurate grid pattern as shown in FIG. 11, the correction is completed.

[0008]

However, according to the above-mentioned conventional example, since the correction data are input for all the adjustment points and all the correction data are stored in the memory 6 ', the memory 6'has a large capacity. Is necessary and
It took a long time to adjust.

Further, according to the above-mentioned conventional example, as shown in FIG. 9, the interval d ₁ between all the adjustment points is constant. Although a low-order waveform is sufficient for the convergence correction waveform in the center of the screen, a high-order waveform is required around the screen. Therefore, conventionally, the interval d ₁ between the adjustment points is determined according to the order of the high-order waveform. Therefore, the number of adjustment points is large and the memory 6'needs a large capacity.

Therefore, it is an object of the present invention to provide a convergence correction device which has a small memory capacity and a short adjustment time.

[0011]

SUMMARY OF THE INVENTION A convergence correction device of the present invention for achieving the above object comprises an adjustment pattern generating means for outputting an adjustment pattern signal for displaying a plurality of adjustment points on a screen, and an adjustment pattern generating means for adjusting the adjustment points. Convergence correction device including a memory that stores correction data, a memory control unit that controls reading and writing of the memory, and a data conversion unit that converts the correction data read from the memory into an actual correction level value In the above, the central portion of the screen is set as a non-correction area, and in this non-correction area, the data conversion unit outputs a correction level value of zero correction amount.

Further, another convergence correcting apparatus of the present invention comprises an adjustment pattern generating means for outputting an adjustment pattern signal for displaying a plurality of adjustment points on a screen, a memory for storing correction data of the adjustment points, and A memory control unit that controls reading and writing of the memory,
In a convergence correction device that generates a correction waveform based on the correction data read from the memory, the interval between adjustment points at the center of the screen is set wider than at the periphery of the screen.

[0013]

According to the former invention, at the time of convergence correction, the central portion of the screen is generally in the uncorrected state, and
Since it can be adjusted intentionally, the central part of the screen can be set as the non-correction area, and the data conversion unit outputs the correction level value of zero correction amount for the non-correction area. No need to allocate memory.

According to the latter invention, the distance between the adjustment points is narrow around the screen where a high-order waveform is required as usual, and the interval between the adjustment points is wide in the center of the screen where a low-order waveform is sufficient, so the number of adjustment points is reduced. The storage capacity of the memory can be reduced accordingly.

[0015]

Embodiments of the present invention will be described below with reference to the drawings. 1 to 3 show a first embodiment of the present invention. FIG. 1 shows a circuit block diagram when the present invention is applied to a projector. In FIG. 1, the operation unit 1 is provided with an input key such as a numeric keypad, and data (for example, correction data) input from the operation unit 1 is supplied to the CPU 2. The CPU 2 controls the character generator 3, the memory control unit 4, the data conversion unit 5, the non-correction area setting unit 9 and the like based on a command from the operation unit 1. And CPU
2 controls the memory control unit 4 to temporarily stop the reading of data in the uncorrected area A of FIG. Also, C
PU2 also performs high-order interpolation calculations.

The character generator 3, which is an adjustment pattern generating means, is constructed so as to be able to output an adjustment pattern signal for displaying a plurality of adjustment points on the screen to each of the RGB CRTs 10. As shown in FIG. 2, the intersections of the vertical broken lines and the horizontal broken lines are the adjustment points, but the inside of the uncorrected area A in the central portion of the screen is excluded. Specifically, the cross-hatching pattern shown in FIG. 3 is displayed on the screen 11 by the adjustment pattern signal, and each intersection point of the cross-hatching pattern excluding the uncorrected area A is the adjustment point.

Returning to FIG. 1 again, the memory controller 4 is a CPU.
The writing and reading of the memory 6 are controlled based on the control signal 2 of FIG. The memory 6 does not have a storage area for the adjustment points in the non-correction area A, but only a storage area for the other adjustment points. Since one adjustment point requires data in the horizontal and vertical directions for each of RGB, a total of six types of correction data are stored. The RGB correction data (horizontal and vertical) sent from the CPU 2 is written at a predetermined address, and the read correction data is output to the CPU 2 and the data conversion unit 5. The uncorrected area setting unit 9 outputs an uncorrected recognition signal to the data conversion unit 5 in the uncorrected area A in the center of the screen shown in FIG.

The data converter 5 converts six types of correction data serially sent from the memory 6 for one adjustment point into actual correction level values, and outputs RGB correction level values in parallel. . Further, low-order interpolation (primary interpolation) is calculated based on the input correction data, and the correction level value of the interpolation point between the adjustment points is created and output. Furthermore, the data conversion unit 5 includes a non-correction area setting unit 9
When a non-correction recognition signal is output from, the correction level value of zero correction amount is output. That is, the data conversion unit 5 sequentially outputs each correction level value of the adjustment point and the interpolation point to the D / A converter 7. The D / A converter 7 converts the correction level value into an analog signal and cuts the high frequency component of the converted output with a low pass filter (LPF) 8 to generate an analog correction waveform. This analog correction waveform is supplied to the deflection yoke for convergence correction.
In a device without the deflection yoke for convergence correction, the analog correction waveform is superimposed on the deflection waveform and supplied to the H and V deflection yokes.

The operation of the above configuration will be described below. In the main correction (generally correction) before the convergence correction,
The central portion of the screen 11 is in the uncorrected state. Alternatively, the center portion of the screen 11 is intentionally corrected so as not to be corrected. When the correction mode is selected, the CPU 2 issues an output command to the character generator 3 and the character generator 3 outputs an adjustment pattern signal to each CRT 10. A cross-hatching pattern as shown in FIG. 3 is displayed on the screen 11, and the adjuster looks at the state of the cross-hatching pattern and inputs correction data for each adjustment point other than the non-correction area A. The correction data input from the operation unit 1 is written in a predetermined address position of the memory 6.

On the other hand, the CPU 2 issues a read command to the memory control unit 4 in synchronization with the adjustment pattern signal, and the memory control unit 4 sequentially outputs the read addresses to the memory 6.
The correction data read from the memory 6 is the data conversion unit 5
To the correction level value. The data conversion unit 5 also creates a correction level value for the interpolation point based on the correction data. Then, the correction level values of the adjustment points and the interpolation points output from the data conversion unit 5 are D / A.
The conversion unit 7 converts it to analog.

Further, when entering the uncorrected area A shown in FIG.
The CPU 2 issues a read stop command to the memory control unit 4, and the data output from the memory 6 is stopped. On the other hand, the non-correction area setting unit 9 outputs the non-correction recognition signal to the data conversion unit 5, and the data conversion unit 5 outputs the correction level value of zero correction amount. When entering the area other than the uncorrected area A, CP
U2 again outputs a read command to the memory control unit 4.
That is, since the correction waveform is created by the correction data stored in the memory 6 and the correction level value of the correction amount of zero created by the data converter 5, the storage capacity of the memory 6 is smaller than that of the conventional one by the amount of the non-correction area A. I'm done.

In the first embodiment, the data converter 5 outputs the data value of the correction amount of zero based on the uncorrected recognition signal when the uncorrected area A is entered. The correction data of the correction amount of zero may be stored in advance, and the memory control unit 4 may be configured to repeatedly read the specific address when the non-correction area A is entered. or,
In the first embodiment, the non-correction area A is fixed, but the non-correction area A may be variable. By doing so, the correction area can be minimized, and the input operation of correction data can be reduced.

In the first embodiment, the data conversion unit 5 creates the correction level value of the interpolation point.
The PU 2 or the data conversion unit 5 and the CPU 2 may be configured to selectively create the correction level value.

In the first embodiment, the case where the present invention is applied to a projector is shown, but it is also applied to various monitors such as a high resolution monitor for a personal computer and a high resolution monitor for a workstation in substantially the same manner. it can.

A second embodiment of the present invention is shown in FIGS. FIG. 4 shows a circuit block diagram when the present invention is applied to a projector. In FIG. 4, the character generator 3, which is an adjustment pattern generating means, outputs an adjustment pattern signal for displaying a plurality of adjustment points on the screen 11 as described in the conventional example, but unlike the conventional example, FIG. A cross-hatching pattern as shown in is displayed. That is, in the present embodiment, as shown in FIG. 5, the distance between the adjustment points is a narrow distance d around the screen.
_A wide interval d ₂ is set to ₁ (the same interval as the conventional _one ) in the center of the screen, and a cross hatching pattern corresponding to this is displayed. The adjustment points in the second embodiment are a total of 84 points, which is 12 horizontal points × vertical points 7.

Conventionally, the memory control unit 4 should always read the correction data at regular intervals, but in the present embodiment, the correction data is read at a timing corresponding to the interval of the adjustment points. The memory 6 has a storage capacity capable of storing the correction data at all the adjustment points, but since the number of the adjustment points is smaller than the conventional one, the storage capacity is also reduced accordingly. The data conversion unit 5 converts the correction data sent from the memory 6 into the actual correction level value and creates the correction data of the interpolation points as in the conventional case. However, as shown in FIG. In this case, there is one place between adjustment points, but in the center of the screen there are two places between adjustment points. Since other configurations are similar to those of the conventional example, the same reference numerals are given to the drawings and the description thereof will be omitted.

The operation of the above configuration will be described below. When the correction mode is selected, the CPU 2 issues an output command to the character generator 3, and the character generator 3 outputs an adjustment pattern signal to each CRT 10. A cross-hatching pattern as shown in FIG. 6 is displayed on the screen 11, and the adjuster inputs correction data for each adjustment point by observing the state of the cross-hatching pattern. The correction data input from the operation unit 1 is written in a predetermined address position of the memory 6.

On the other hand, the CPU 2 issues a read command to the memory control unit 4 in synchronization with the adjustment pattern signal, and the memory control unit 4 sequentially outputs the read addresses to the memory 6 in synchronization with the timing of the adjustment point. The correction data read from the memory 6 is sent to the data conversion unit 5 and converted into a correction level value here. The data conversion unit 5 also creates an interpolation level value of the interpolation point based on the correction data.
Then, the correction level values of the adjustment points and the interpolation points output from the data conversion unit 5 are passed through the D / A converter 7 and the low-pass filter 8 to generate an analog correction waveform.

FIG. 7 shows the deflection waveform of the actual horizontal deflection, and the central section (3'-8 ') of the screen has a vertical period (1).
The shape of the envelope of (V) is almost linear, that is, a low-order waveform, and the shape of the envelope in the screen peripheral section (1 ′ to 2 ′, 9 ′ to 10 ′) suddenly changes, that is, high. This is the next waveform. In addition, since the interval between adjustment points is narrow around the screen where high-order waveforms are required as in the past, and the interval between adjustment points is wide in the center of the screen where low-order waveforms are sufficient. A precise correction waveform can be obtained.
In the second embodiment, the case where the present invention is applied to a projector is shown, but the present invention can be applied to various monitors such as a high resolution monitor for a personal computer and a high resolution monitor for a workstation in a similar manner.

In the second embodiment, the data conversion unit 5 creates the interpolation data of the interpolation points. However, the CPU 2 or the data conversion unit 5 and the CPU
2 may be configured to selectively create interpolation data. In particular, when a high-order calculation is required, the CPU 2 creates it.

[0031]

As described above, according to the present invention, the central portion of the screen is set as the non-correction area, the correction data stored in the memory is read out in the area other than the non-correction area, and based on the correction data. Since the correction level value is output and the correction level value of the correction amount of zero is output in the non-correction area, it is not necessary to store the correction data of the non-correction area in the memory. This has the effect of reducing the size and cost. Further, it is not necessary to input the correction data for the non-correction area, and the adjustment time can be shortened.

Further, according to another aspect of the present invention, the interval between the adjustment points is set to be narrow at the periphery of the screen and wide at the center of the screen, so that correction data according to the order of the correction waveform of the convergence can be obtained. (Precision) correction waveform can be obtained, and further, the storage capacity of the memory is small, and the cost can be reduced. Moreover, since the number of adjustment points is small, the adjustment time is shortened.

[Brief description of drawings]

FIG. 1 is a circuit block diagram of a convergence correction device (first embodiment).

FIG. 2 is a diagram showing an uncorrected area on the screen (first embodiment).

FIG. 3 is a diagram showing a projected state of a cross hatching pattern (first embodiment).

FIG. 4 is a circuit block diagram of a convergence correction device (second embodiment).

FIG. 5 is a diagram showing a relationship between adjustment points and a screen (second embodiment).

FIG. 6 is a diagram showing a projected state of a cross hatching pattern (second embodiment).

FIG. 7 is a diagram showing an actual deflection waveform (second embodiment).

FIG. 8 is a circuit block diagram of a convergence correction device (conventional example).

FIG. 9 is a diagram showing a relationship between adjustment points and a screen (conventional example).

FIG. 10 is a diagram showing a projected state of a cross-hatching pattern before convergence correction (conventional example).

FIG. 11 is a view showing a projected state of a cross hatching pattern after convergence correction (conventional example).

[Explanation of symbols]

 3 ... Character generator (adjustment pattern generating means) 4 ... Memory control unit 5 ... Data conversion unit 6 ... Memory 9 ... Uncorrected area setting unit

Claims (3)

[Claims] 1. An adjustment pattern generating means for outputting an adjustment pattern signal for displaying a plurality of adjustment points on a screen,
A memory that stores the correction data of the adjustment points, a memory control unit that controls reading and writing of this memory,
In a convergence correction device including a data conversion unit that converts the correction data read from the memory into an actual correction level value, a central portion of the screen is a non-correction region, and the data conversion unit is in the non-correction region. Is configured to output a correction level value of zero correction amount. 2. An uncorrected area setting section for outputting an uncorrected recognition signal to the data conversion section in the uncorrected area, and when the uncorrected recognition signal is output, the data conversion section corrects a correction amount of zero. 2. The level value is output.
Convergence corrector according to. 3. An adjustment pattern generating means for outputting an adjustment pattern signal for displaying a plurality of adjustment points on a screen,
In a convergence correction device that has a memory that stores correction data of adjustment points and a memory control unit that controls reading and writing of the memory, and that generates a correction waveform based on the correction data read from the memory, The convergence correction device is characterized in that the distance between the adjustment points in the center of the screen is set wider than that in the periphery.