JPH07112107B2 - Printed wiring board and manufacturing method thereof - Google Patents
Printed wiring board and manufacturing method thereofInfo
- Publication number
- JPH07112107B2 JPH07112107B2 JP33989592A JP33989592A JPH07112107B2 JP H07112107 B2 JPH07112107 B2 JP H07112107B2 JP 33989592 A JP33989592 A JP 33989592A JP 33989592 A JP33989592 A JP 33989592A JP H07112107 B2 JPH07112107 B2 JP H07112107B2
- Authority
- JP
- Japan
- Prior art keywords
- conductive pad
- bonding tool
- wiring board
- printed wiring
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は、プリント配線板に関
し、特にボンディングツールを使用して部品を搭載する
プリント配線板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board, and more particularly to a printed wiring board on which components are mounted using a bonding tool.
【０００２】[0002]
【従来の技術】図３（ａ）及び（ｂ）はそれぞれ従来の
プリント配線板の平面図及びＢＢ′断面図である。基板
１上には電子部品のリードがはんだ付けされる導電性パ
ッド２が設けられ、さらに基板１はソルダーレジスト３
で覆われるが、ソルダーレジスト３の導電性パッド２に
対応する部分に開口８が設けられている。2. Description of the Related Art FIGS. 3A and 3B are a plan view and a BB 'sectional view of a conventional printed wiring board, respectively. A conductive pad 2 to which a lead of an electronic component is soldered is provided on the substrate 1, and the substrate 1 further includes a solder resist 3
However, an opening 8 is provided in a portion of the solder resist 3 corresponding to the conductive pad 2.
【０００３】また、ソルダーレジスト３の厚さを導電性
パッド２の厚さより厚くすることにより、電子部品の実
装時に位置合わせがやりやすく、かつ、導電性パッド２
の間のはんだによるショートを減少させるようにしてい
た（例えば、特開平２−６８９８５号公報）。Further, by making the thickness of the solder resist 3 thicker than the thickness of the conductive pad 2, alignment can be easily performed when mounting electronic parts, and the conductive pad 2 can be easily aligned.
The short circuit due to the solder between the two is reduced (for example, Japanese Patent Application Laid-Open No. 2-68985).
【０００４】[0004]
【発明が解決しようとする課題】この従来のプリント配
線板では、基板１上に並べて設けられた複数の導電性パ
ッド２に載せられた複数のリードを１枚の板状のボンデ
ィングツールを使用してはんだ付けする場合、ボンディ
ングツールが導電性パッド２上のリードより先にソルダ
ーレジストにあたってしまい、はんだ未接続やはんだ付
け不完全といった不具合が生じるという問題点があっ
た。In this conventional printed wiring board, a plurality of leads mounted on a plurality of conductive pads 2 arranged side by side on the substrate 1 are used by using a single plate-shaped bonding tool. In the case of soldering by soldering, there is a problem in that the bonding tool hits the solder resist before the leads on the conductive pad 2, causing problems such as unconnected solder and incomplete soldering.
【０００５】[0005]
【課題を解決するための手段】本発明のプリント配線板
は、基板と、集積回路装置の複数のリードが接続される
並べられた複数の導電性パッドと、前記導電性パッドに
対応する開口及び前記複数のリードを前記並べられた複
数の導電性パッドに接続するためのボンディングツール
の下端面に対応するボンディングツール逃げを除き前記
基板の全面または前記導電性パッドの周辺部を前記導電
性パッドより厚く覆うソルダーレジストとを備えてい
る。A printed wiring board according to the present invention includes a substrate, a plurality of conductive pads arranged to connect a plurality of leads of an integrated circuit device, an opening corresponding to the conductive pad, and The entire surface of the substrate or the peripheral portion of the conductive pad except for the bonding tool relief corresponding to the lower end surface of the bonding tool for connecting the plurality of leads to the plurality of arranged conductive pads is formed from the conductive pad. It has a thick solder resist.
【０００６】[0006]
【実施例】次に本発明について図面を参照して説明す
る。The present invention will be described below with reference to the drawings.
【０００７】図１（ａ）及び（ｂ）はそれぞれ本発明の
一実施例のプリント配線板の上面図及びＡ−Ａ′断面図
である。1A and 1B are a top view and a sectional view taken along the line AA 'of a printed wiring board according to an embodiment of the present invention, respectively.
【０００８】本実施例のプリント配線板は、基板１に複
数の導電性パッド２が並べて設けられ、基板１を覆うソ
ルダーレジスト３には導電性パッド２の部分の開口８お
よび並べられた複数のパッド２にわたって位置する直線
構状のボンデイングツール逃け４が設けられている。In the printed wiring board of the present embodiment, a plurality of conductive pads 2 are provided side by side on a substrate 1, and a solder resist 3 covering the substrate 1 has openings 8 at the conductive pad 2 portion and a plurality of aligned pads. A linear bonding tool relief 4 is provided which is located across the pad 2.
【０００９】図２は本実施例のプリント配線板の部品実
装後の断面図である。上述のようにして作成したプリン
ト配線板にＬＳＩ搭載のテープキャリアパッケージ５を
ボンディングツール７を使用して実装する。まず、あら
かじめはんだペースト印刷やはんだメッキ等によって導
電性パッド３上に適量のはんだを供給しておく。テープ
キャリアパッケージ５のアウターリード６を切断・形成
しアウターリード６を導電性パッド３に位置合わせし搭
載する。FIG. 2 is a sectional view of the printed wiring board of this embodiment after components are mounted. The tape carrier package 5 having the LSI mounted thereon is mounted on the printed wiring board created as described above using the bonding tool 7. First, an appropriate amount of solder is supplied onto the conductive pad 3 in advance by solder paste printing, solder plating, or the like. The outer lead 6 of the tape carrier package 5 is cut and formed, and the outer lead 6 is aligned and mounted on the conductive pad 3.
【００１０】次にボンディングツール７を加熱してボン
ディングツール逃げ４の位置に合わせて、ボンディング
ツール７を下降させ、導電性パッド３とアウターリード
６を熱圧着によって接続する。ボンディングツール７を
冷却したあと上昇させ、テープキャリアパッケージ５の
実装を完了する。Next, the bonding tool 7 is heated to match the position of the bonding tool relief 4, and the bonding tool 7 is lowered to connect the conductive pad 3 and the outer lead 6 by thermocompression bonding. The bonding tool 7 is cooled and then raised to complete the mounting of the tape carrier package 5.
【００１１】ボンディングツール逃げ４はボンディング
ツール７の下端面の大きさにプリント配線板との位置ズ
レを考慮した分だけ広くした大きさとする。これによ
り、ボンディングツール７は全てのアウターリード６と
接触し、加熱をおこなう。さらに、ボンディングツール
７を加圧することにより、導電性パッド３にあらかじめ
供給されているはんだを溶融し、アウターリード６を溶
融はんだ中に押し込み、導電性パッド３との接続をおこ
なうことができる。したがって、はんだ未接続やはんだ
付け不完全といった不具合が発生するのを防ぐことがで
きる。[0011] The bonding tool flank 4 and magnitude wider by an amount considering the positional deviation of the printed wiring board to the size of the lower end surface of the bonding tool 7. As a result, the bonding tool 7 comes into contact with all the outer leads 6 and heats them. Further, by pressing the bonding tool 7, the solder previously supplied to the conductive pad 3 is melted, the outer lead 6 is pushed into the molten solder, and the connection with the conductive pad 3 can be performed. Therefore, it is possible to prevent problems such as unconnected solder and incomplete soldering from occurring.
【００１２】本実施例のプリント配線板の製造は導電性
パッド２の形成後にソルダーレジスト３を形成する場合
は、ソルダーレジスト用のマスクに開口８及びボンディ
ングツール逃げ４のパターンを設けておき、印刷または
露光等を行い、ソルダーレジスト３の形成時にボンディ
ングツール逃げ４を形成する。このとき、ソルダーレジ
スト３の厚さは、導電性パッド２の厚さより厚くなるよ
うにする。[0012] Production of printed wiring board of the present embodiment is a case of forming a solder resist 3 after formation of the conductive pads 2 may be provided a pattern of openings 8 and the bonding tool relief 4 to mask for solder resist, Printing or exposure is performed to form the bonding tool relief 4 when the solder resist 3 is formed. At this time, the solder resist 3 is thicker than the conductive pad 2.
【００１３】また、無電解めっきで導電性パッド３を形
成する場合の本実施例のプリント配線板の製造は、基板
１をパッド２の部分を除いてめっき用レジストで覆い、
基板１にめっきにより導電性パッド２を形成した後にめ
っき用レジストのボンディングツール逃げ４の部分だけ
取り除き、その他の部分はそのまま残してソルダーレジ
スト３とする。このとき、導電性パッド２のメッキ厚
は、ソルダーレジスト３の厚さより薄くなるようにす
る。When the conductive pad 3 is formed by electroless plating, the printed wiring board of this embodiment is manufactured by covering the substrate 1 with the plating resist except the pad 2.
After forming the conductive pads 2 on the substrate 1 by plating, only the portion of the bonding resist escape 4 of the plating resist is removed, and the other portions are left as they are to form the solder resist 3. At this time, the plating thickness of the conductive pad 2 is made thinner than the thickness of the solder resist 3.
【００１４】[0014]
【発明の効果】以上説明したように本発明は、導電性パ
ッド部のボンディングツールがあたる場所にソルダーレ
ジストの逃げを設けたので、はんだ接続の信頼性および
生産性を向上させるという効果がある。As described above, the present invention has the effect of improving the reliability and productivity of solder connection because the relief of the solder resist is provided at the position where the bonding tool of the conductive pad portion hits.
【図１】（ａ）および（ｂ）はそれぞれ本発明の一実施
例の部分的な平面図及びＡ−Ａ′断面図である。1A and 1B are a partial plan view and an AA ′ sectional view of an embodiment of the present invention, respectively.
【図２】図１に示す実施例の部品実装後の断面図であ
る。FIG. 2 is a cross-sectional view after mounting the components of the embodiment shown in FIG.
【図３】（ａ）および（ｂ）はそれぞれ従来のプリント
配線板の平面図及びＢ−Ｂ′断面図である。3A and 3B are a plan view and a BB ′ cross-sectional view of a conventional printed wiring board, respectively.
１ プリンド配線板 ２ 導電性パッド ３ ソルダーレジスト ４ ボンディングツール逃げ ５ テープキャリアパッケージ ６ アウターリード ７ ボンディングツール 1 Printed wiring board 2 Conductive pad 3 Solder resist 4 Bonding tool escape 5 Tape carrier package 6 Outer lead 7 Bonding tool
Claims (3)
接続される並べられた複数の導電性パッドと、前記導電
性パッドに対応する開口及び前記複数のリードを前記並
べられた複数の導電性パッドに接続するためのボンディ
ングツールの下端面に対応するボンディングツール逃げ
を除き前記基板の全面または前記導電性パッドの周辺部
を前記導電性パッドより厚く覆うソルダーレジストとを
含むことを特徴とするプリント配線板。1. A substrate, a plurality of arranged conductive pads to which a plurality of leads of an integrated circuit device are connected, an opening corresponding to the conductive pad, and the plurality of arranged conductive pads. And a solder resist covering the entire surface of the substrate or the peripheral portion of the conductive pad with a thickness greater than that of the conductive pad except for the escape of the bonding tool corresponding to the lower end surface of the bonding tool for connecting to the conductive pad. Printed wiring board.
した後に、導電性パッドに対応する開口及び前記導電性
パッドに集積回路装置のリードを接続するためのボンデ
ィングツールの下端面に対応するボンディングツール逃
げを除き前記基板の全面または前記導電性パッドの周辺
部を覆うソルダレジストをマスクを用いて前記導電性パ
ッドより厚く形成することを特徴とするプリント配線板
の製造方法。 After forming by arranging a plurality of conductive pads 2. A substrate, corresponding to the lower end face of the bonding tool for connecting a lead of the integrated circuit device into the opening and the conductive pads corresponding to the conductive pad A method of manufacturing a printed wiring board, characterized in that a solder resist covering the entire surface of the substrate or the peripheral portion of the conductive pad except the escape of the bonding tool is formed to be thicker than the conductive pad using a mask. .
する複数の開口を除いてソルダーレジストで覆い、前記
基板の前記開口の部分に無電解めっきで導電性パッドを
前記ソルダーレジストより薄く形成し、次に前記複数の
並べられた導電性パッドに集積回路装置の複数のリード
を接続するためのボンディングツールの下端面に対応す
るボンディングツール逃げの部分の前記ソルダーレジス
トを取り除くことを特徴とするプリント配線板の製造方
法。3. A substrate is covered with a solder resist except a plurality of openings corresponding to a plurality of conductive pads arranged side by side, and a conductive pad is formed thinner than the solder resist by electroless plating on a portion of the opening of the substrate. And then removing the solder resist in a portion of the bonding tool escape corresponding to the lower end surface of the bonding tool for connecting the plurality of leads of the integrated circuit device to the plurality of arranged conductive pads. Manufacturing method of printed wiring board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33989592A JPH07112107B2 (en) | 1992-12-21 | 1992-12-21 | Printed wiring board and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33989592A JPH07112107B2 (en) | 1992-12-21 | 1992-12-21 | Printed wiring board and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH06204655A JPH06204655A (en) | 1994-07-22 |
| JPH07112107B2 true JPH07112107B2 (en) | 1995-11-29 |
Family
ID=18331818
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP33989592A Expired - Lifetime JPH07112107B2 (en) | 1992-12-21 | 1992-12-21 | Printed wiring board and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07112107B2 (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0823160A (en) | 1994-05-06 | 1996-01-23 | Seiko Epson Corp | Method for bonding printed board with electronic component |
| SG65717A1 (en) | 1995-06-06 | 1999-06-22 | Ibiden Co Ltd | Printed circuit boards |
| JPH09191169A (en) * | 1996-01-10 | 1997-07-22 | Nec Corp | Printed wiring board |
| JP3050807B2 (en) | 1996-06-19 | 2000-06-12 | イビデン株式会社 | Multilayer printed wiring board |
| JP3050812B2 (en) | 1996-08-05 | 2000-06-12 | イビデン株式会社 | Multilayer printed wiring board |
-
1992
- 1992-12-21 JP JP33989592A patent/JPH07112107B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH06204655A (en) | 1994-07-22 |
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