JPH01179583A - Reproducing circuit for magnetic recording and reproducing device - Google Patents

Abstract

PURPOSE:To project a picture with a clear-cut outline part by clipping a signal component over a signal amplitude peak level limited by the characteristics of a recording and reproducing system and replacing the clipped signal component with a false pulse which never includes noise. CONSTITUTION:For a signal from a pedestal clipping circuit 21, a peak waveform part S2' to appear over a white peak level is clipped by voltage from a DC level shift circuit 26. Although another peak waveform part S1' to include the noise caused by an emphasis clip and the S2' are removed from the signal, the outline obtained by the signal as it is, from which the S1' and the S2' are removed, is not clear-cut. Therefore, false pulses P5 and P6, which are from pulses P3 and P4 formed by respective waveform comparing circuits 27 and 28 and can be replaced with the peak waveform parts S1' and S2', are added to the signal. Thus, the noise to appear in a deemphasis output caused by an emphasis clip waveform can be eliminated, a reproduced picture with high picture quality can be projected, and outline correcting quantity can be made variable with attenuators 29 and 30.

Description

[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) The present invention provides a magnetic recording/reproducing device that clips an emphasis-processed video signal in accordance with FM modulation/demodulation performance and records it as an FM. The present invention relates to a reproducing circuit for a magnetic recording/reproducing device that suppresses the occurrence of noise in a reproduced signal.

(Prior Art) In general, a magnetic recording/reproducing device (hereinafter referred to as a VTR) that records a video signal using FM modulation modulates the input signal and before recording it, an emphasis circuit is applied to the characteristics of the rising and falling portions of the waveform. is made steeper to improve the quality of the reproduced image.

3rd v! FIGS. 4 and 4 show block configurations of a recording circuit and a reproducing circuit in a conventional VTR, with FIG. 3 showing the recording circuit and FIG. 4 showing the reproducing circuit. First, in Figure 3, 1
is an input terminal for a video signal to be recorded and reproduced, and the signal from this input terminal 1 is input to a clamp circuit 3 via a gain control circuit 2.

The clamp circuit 3 is a circuit that clamps, for example, the pedestal level or synchronization tip level of the video signal, and the output of the clamp circuit 3 is sent to the FM modulation circuit 6 via the emphasis circuit 4 and the white/dark clip circuit 5. is supplied to

The emphasis circuit 4 is constituted by a bypass filter, and improves the waveform characteristics of the contour portion by emphasizing the high frequency range of the video signal. Further, the white/dark clipping circuit 5 clips the white peak waveform part on the white level side from the white peak level appearing in the output from the emphasis circuit 4 and the peak waveform part on the black level side from the synchronization signal side peak level. By doing so, the FM luminance signal before recording is made to have characteristics that match the band of the recording and reproducing system, that is, it does not have a signal band that exceeds the recording and reproducing band capability.

The output of the FM modulation circuit 6 is amplified by a recording amplifier 7, supplied to a video head 8, and recorded on a magnetic tape.

On the other hand, the reproduction circuit inputs the reproduction signal from the video head 8 to the rMI modulation circuit 10 via the preamplifier 9, demodulates it in this circuit 10, and inputs it to the de-emphasis circuit 11. The day shift circuit 11 suppresses the high frequency range of the input signal so that it matches the video signal waveform before recording. The clamp circuit 12 reproduces a DC level that matches that of the recording system.

FIG. 5 is a waveform diagram that does not show the operation in the VTR,
a indicates an input video signal, b indicates a J emphasis output waveform, C indicates a clip output waveform, and d indicates a reproduction amount signal. As shown in FIG. 5, when the input video signal a passes through the emphasis circuit 4, a waveform portion that changes toward the black level side and a waveform portion that changes toward the white level side have peak waveform portions Pi.
, P2 are formed. Of these waveform parts, the waveform part P2 that appears in the white peak signal and the waveform part P1 that appears on the synchronization leading edge side are part of the band that is not modulated and demodulated by the FM modulation circuit in the recording system and the FM demodulation circuit in the reproduction system. F
Since these are M signal components, they are clipped by predetermined levels V2 and Vl corresponding to each waveform portion P2 and Pl. FIG. 5C shows the waveform after the white clip and dark clip. However, when clipping is performed on a signal before recording in this way, the waveform at the clipped portion is not faithfully demodulated, so that noise appears in the reproduced output waveform. As shown in Fig. 5d, such noise appears conspicuously in the clipped waveform part of the white peak signal and the clipped waveform part exceeding the pedestal level, and the reproduced image has a glare in the contour part and a polar emphasis waveform. A conventional VTR that clips the peak waveform portion that exceeds its own peak level and pedestal level according to the recording and playback performance.
The clipped waveform causes noise to appear in the reproduced output waveform, which is one of the causes of deterioration in image quality.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned problems and provide a VTR reproducing circuit that does not cause deterioration in image quality due to emphasis processing.

[Structure of the Invention] This invention includes a clamp circuit that clamps a signal from an FM demodulation circuit at a predetermined pedestal voltage, and a signal from the clamp circuit that controls the pedestal voltage. , a voltage holding means for forming a white level voltage corresponding to the white peak level, and a peak waveform portion exceeding the pedestal level and white in the signal from the clamp circuit by the pedestal voltage and the white level voltage from the voltage holding means. A clipping means for clipping the peak waveform portion exceeding the level, and a waveform shaping means for forming pseudo pulses corresponding to each of the waveform portions and adding these pulses to the signal from the clipping means to shape the waveform. It is configured as follows.

(Function) According to the present invention, the
The signal component that exceeds the signal amplitude peak level is clipped and replaced by a noise-free pseudo pulse, so the reproduced signal does not contain the noise that appears due to the emphasis clipping waveform.
A clear image of the outline can be projected.

(Example) This invention will be explained below with reference to Examples.

FIG. 1 is a circuit diagram showing an embodiment of a reproducing circuit for a VTR according to the present invention.

In FIG. 1, 14 is a video head, 154 is a preamplifier, 16 is an FM demodulation circuit, 17 is a de-emphasis circuit, and 18 is a pedestal clamp circuit. This circuit is characterized in that the signal from the pedestal clamp circuit 18 has a gate switch that passes the signal from the circuit 18 during the pedestal period, and a peak that appears in the signal from the pedestal clamp circuit 18 above the pedestal level. The signals are respectively supplied to a pedestal clip circuit 21 that clips the waveform portion.

First, the pedestal clip circuit 21 then leads an output signal to the white clip circuit 22. White clip circuit 22 (pedestal level j2) This is a circuit that clips the peak waveform portion that appears on the white level side of the 100% modulated white peak signal, and the output is output from the delay circuit 23.
is led to an adder circuit 24 for waveform synthesis.

Next, the signal that has passed through the gate switch 19 is held at a pedestal level voltage by a DC holding circuit 20. The output voltage of the DC holding circuit 20 is input to the pedestal clip circuit 21 as a voltage that determines the clip level of the circuit 21, and is also input to the first input terminal (non-inverting input terminal) of the waveform comparator 27. . Further, the output voltage of the DC holding circuit 20 is determined by the DC level shift circuit 26.
The signal is inputted to the first input terminal of the waveform comparator 28 via the waveform comparator 28.

The voltage level shift circuit 2G is a circuit that shifts the pedestal level voltage to a voltage (white level voltage) that matches the level of the white peak signal, and this white level voltage determines the clip level of the white clip circuit 22. voltage.

On the other hand, each of the waveform comparators 27 and 28 receives the signal from the pedestal clamp circuit 18 at its second input terminal (inverting input terminal). As a result, the waveform comparator 27 outputs a pulse P3 corresponding to the black peak waveform portion exceeding the pedestal level, and the waveform comparator 28 outputs a pulse P4 corresponding to the white peak waveform portion exceeding the white level voltage. Output. And each of these pulse waveforms P3
, P4 are sent to the adder circuit 24 via differential capacitors CI and Q2, attenuators 29 and 30, and shaping capacitors C3 and C4, respectively, for waveform shaping pseudo pulses P5,
Enter as P6. The adder 24 outputs the above-mentioned pseudo pulse P5. A signal to which P6 is added is outputted and guided to the reproduced signal output terminal 25.

Next, the operation of the above configuration will be explained.

As is clear from a comparison between FIG. 1 and FIG. 4, the output signal of the pedestal clamp circuit 18 contains noise caused by the emphasis clipping operation of the recording system as explained in FIG. 5d. FIG. 2 shows the output waveform of the pedestal clamp circuit 18.

On the other hand, the gate switch 19 performs a sampling operation during the pedestal period of the output signal of the pedestal clamp circuit 1B, and derives the sampling output. The DC holding circuit 20 has, for example, a human-capacitor capacitor, and holds the sampling output in this capacitor. Than this,
A DC voltage (see FIG. 2) matching the pedestal level is applied to the pedestal clip circuit 21, and demodulation is performed in which the peak waveform portion 81' appearing above the pedestal level in the output signal of the pedestal clamp circuit 18 is clipped. A signal is output from the pedestal clip circuit 21. Subsequently, in the signal from the pedestal clipping circuit 21, a peak waveform portion 82' appearing above the white peak level is clipped by the voltage from the DC level shift circuit 26. The amount of shift voltage set in the DC level shift circuit 26 is F which is 100% modulated from the pedestal level.
Since it is the difference voltage between the MMo2 demodulation level and the pedestal level, the voltage from the DC level shift circuit 26 is
As shown in the figure, the white level voltage matches the white peak level, and the peak waveform portion S2' containing noise due to the emphasis clipping waveform can be clipped.

As mentioned above, the peak waveform portions $1' and 82' containing noise due to emphasis clipping are removed, but the signal as it is will have an irregular contour! Since it is Y Ming,
Pulse P3. formed by each waveform comparison tri-path 27,28. From P4, pseudo pulses P5 and P6 are added to replace the peak waveform portions S1' and S2'. In this case, when the waveform comparator 27 receives a voltage (81') lower than the pedestal voltage, it outputs a low level, and this low level forms a negative pulse corresponding to P3.

The waveform comparator 28 also outputs a voltage higher than the white level voltage.
When 82') is input, it exhibits a high level as an output, and this high level forms a positive pulse corresponding to P4.

Each pulse P3. P4 is differentiated by capacitors CI and C2, and when it passes through an attenuator 29.30, pseudo pulses P5 and 82 corresponding to S1' are generated.
The pseudo pulse P6 corresponds to '.

Since the adder circuit 24 adds these pseudo pulses P5 and P6 to the signal from the delay circuit 23, the output terminal 25
From then on, the waveform is the same as that shown in Figure 2, and the peak waveform portions S1' and S
2', a video signal containing no noise is output. still,
The delay circuit 23 includes a DC holding circuit 20 and a waveform comparator 2.
7. The delay of the pseudo pulses P5 and P6 caused by the DC level shift circuit 26 and the waveform comparator 28 is corrected.

In this way, this embodiment removes the noise that appears in the de-emphasis output due to the emphasis clipping waveform,
Displays high-quality playback images. Further, there is an advantage that the amount of contour correction can be varied by J: using the attenuators 29 and 30.

In the above embodiment, the pedestal level was used as the clamp level, but the processing according to the present embodiment may be applied to a signal whose synchronization tip is clamped.

[Effects of the Invention] As described above, according to the present invention, noise appearing in the de-emphasis output due to the emphasis waveform exceeding the FM recording/reproduction range can be easily removed.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of a reproducing circuit of a magnetic recording/reproducing apparatus according to the present invention, FIG. 2 is a waveform diagram for explaining the operation of the embodiment of FIG. 1, and FIGS. FIG. 4 is a block diagram of a conventional magnetic recording/reproducing device, and FIG. 5 is a waveform diagram for explaining the operation of the conventional device. 15... Video head, 16... FM demodulation circuit, 1
7... De-emphasis circuit, 18... Pedestal clamp circuit, 19... Gate switch, 20...
DC holding circuit, 21... pedestal clip circuit, 2
2... White clip circuit, 24... Addition circuit (
waveform shaping means), 26... DC level shift circuit, 2
7.28... Waveform comparator, C1C2... Differential capacitor. Agent Patent Attorney Noriyuki Chika
Hirohi Uji's Retirement Period - Figure 5

Claims (1)

[Scope of Claims] An FM demodulation circuit that demodulates a signal from a reproducing head that reproduces an FM luminance signal recorded on a magnetic tape; A clamp circuit that clamps the signal from this FM demodulation circuit at a pedestal potential; voltage holding means for forming a pedestal voltage indicating the clamp level and a white level voltage matching a white peak of a predetermined level according to a signal from a circuit; clipping means for clipping a peak waveform portion exceeding a pedestal level and a peak waveform portion exceeding a white peak level in a signal from a circuit; forming pseudo pulses corresponding to each of the waveform portions and transmitting these pulses from the clipping means; 1. A reproducing circuit for a magnetic recording/reproducing device, comprising a waveform shaping means for shaping a reproduced signal in addition to the signal.