JP6221243B2 - Thin film transistor array and image display device - Google Patents

Description

The present invention relates to a thin film transistor array及beauty picture image display device.

  In recent years, from the viewpoint of flexibility, weight reduction, cost reduction, etc., research on thin film transistors by a printing method has been actively conducted, and application to driving circuits such as organic EL and electronic paper, electronic tags, and the like is expected. However, in general, the printing method has a lower pattern resolution than the photolithography method, and the coating type organic semiconductor generally has a low carrier mobility. Therefore, for practical use of a thin film transistor by a printing method, fine formation of various electrodes (a gate electrode and a source / drain electrode) is particularly important and is one of technical problems.

  As examples of the printing methods for the various electrodes, many examples using screen printing or ink jet have been reported so far, but these printing methods do not have sufficient pattern resolution. For example, in screen printing, it is difficult to stably form a pattern when the fineness of the pattern is 20/20 μm or less in line / space due to restrictions on the fineness of the screen mesh. Further, when the pattern becomes fine, it is necessary to use a printing paste having a high viscosity and low fluidity, which causes a problem of surface smoothness such as rubbing and surface irregularities remaining on the pattern due to insufficient leveling after printing.

  On the other hand, inkjet has no problems with printing plates and surface smoothness problems are small, but the ink landing accuracy is not sufficient for fine pattern formation, and ink for ink jet has low viscosity and high fluidity Therefore, the pattern resolution is worse than screen printing. In order to deal with this problem, there are examples in which a fine pattern is formed by performing various patterning processes for restricting the flow of ink on the substrate surface in advance, but the process becomes complicated, so the cost is reduced and the area is increased. Effectiveness is limited.

  In contrast to these printing methods, a reverse offset printing method is known as a method capable of forming a fine pattern. In the reverse offset printing, a transfer material is applied and formed on the entire surface of a printing blanket having a peelable surface, and this printing blanket is brought into close contact with the relief printing plate to remove the portion of the transfer material that has contacted the relief printing plate from the printing blanket. Subsequently, this printing blanket is a printing patterning method in which the transfer material is transferred by bringing the printing blanket into close contact with the transfer object. There have been reported examples of a thin film transistor array in which an electrode pattern having a line width of 10 μm or less and a line interval of 5 μm or less is formed by reverse offset printing (Patent Document 1). Furthermore, an example of forming a stripe-shaped sealing layer on a semiconductor (Patent Document 2) and the like has been reported in order to suppress deterioration in characteristics of the thin film transistor array (such as a decrease in mobility and ON / OFF ratio of the semiconductor). .

  As a method for suppressing the deterioration of the characteristics of the thin film transistor array, there is a patent proposal for improving the structure of the thin film transistor, while a patent proposal focusing on the circuit of the thin film transistor array is also reported. For example, by fabricating a thin film transistor array with a protective element at the edge of the thin film transistor array, the influence of transient voltage due to electrostatic discharge is suppressed, and device degradation and damage represented by shifts in threshold voltage are avoided. (Patent Documents 3 and 4).

JP 2006-332165 A JP 2008-270744 A JP-A-8-179366 JP 7-287250 A

  However, when various electrodes (source electrode, drain electrode, etc.) of the protective element are formed by a transfer printing method such as a reverse offset printing method, the side surface of the via opening of the gate insulating film formed on the gate electrode There is a problem that the blanket cannot contact. Furthermore, if the surface energy of the gate electrode exposed from the via opening is small, the source electrode / drain electrode cannot be transferred to the via opening, and the conduction between the gate electrode and the source electrode / drain electrode cannot be obtained. is there.

  The present invention provides a thin film transistor array, a protection element, and an image display device capable of avoiding a transfer failure caused by a transfer printing method even for a gate insulating film via opening.

According to a first aspect of the present invention, there is provided a gate electrode and a capacitor electrode formed on an insulating substrate, a gate insulating film formed on the gate electrode and the capacitor electrode, and the gate insulating film. Thin film transistors having a source electrode and a drain electrode formed thereon, a semiconductor layer formed between the source electrode and the drain electrode, and a sealing layer formed on the semiconductor layer are arranged in a matrix And having a gate common electrode and a source common electrode around the thin film transistors arranged in a matrix, a gate protection element being connected between the gate common electrode and the gate wiring, and the source common electrode and the source wiring a thin film transistor array source protection element is connected to the front Symbol gate protection element and the source between the Der taper angle is 60 ° or less of the gate insulating film via the opening of the protection element is, on the surface of the gate electrode exposed from the gate insulating film via the opening, formed by compounds containing both amino and mercapto groups It characterized that you have a monomolecular film.

According to a second aspect , in the first aspect , the gate insulating film has a thickness of 1.5 μm or less.

A third invention is an image display device comprising the thin film transistor array of the first invention and an image display medium.

According to a fourth invention, in the third invention, the image display medium is of an electrophoretic method.

  According to the present invention, the taper angle of the gate insulating film via opening in the gate protection element and the source protection element is set to 60 ° or less, and the surface of the gate electrode exposed from the via opening is amino group, epoxy group, mercapto group When the source and drain electrodes are formed on the monomolecular film by the transfer printing method, the surface is treated with a monomolecular film having a functional group at the end, such as for the gate insulating film via opening. Can also be formed without transfer defects. Therefore, conduction between the gate electrode and the source / drain electrodes can be achieved, the influence of transient voltage due to electrostatic discharge can be suppressed, and device deterioration and damage represented by threshold voltage shift can be avoided. A highly reliable thin film transistor array and image display device can be provided.

1, showing an embodiment of the present invention, is a pattern layout plan view showing a schematic configuration of an entire thin film transistor array. FIG. It is a pattern layout top view which shows a part of schematic structure of the thin-film transistor array in this invention. 2 is a cross-sectional structure of a thin film transistor of the present invention. 3 is a cross-sectional structure of a gate protection element and a source protection element of the present invention.

  Hereinafter, embodiments of a thin film transistor and an image display device according to the present invention will be described with reference to the drawings. In the embodiments, the same components are denoted by the same reference numerals, and redundant description among the embodiments is omitted.

  As shown in the pattern layout plan views of the thin film transistor array of FIGS. 1 and 2, the thin film transistors 1 are arranged in a matrix, and have a gate common electrode 4 and a source common electrode 5 around them, and the gate common electrode 4 and the gate wiring 2 A gate protection element 6 is connected between them, and a source protection element 7 is connected between the source common electrode 5 and the source wiring 3. The gate common electrode 4 and the source common electrode 5 are connected to the ground potential or connected to the ground potential via a resistor. In FIG. 2, the gate protection element 6 and the source protection element 7 are described in the case of a single floating gate transistor. However, a thin film transistor that is diode-connected (that is, the gate electrode and the drain electrode are short-circuited) is reversed 2 Two of them connected in parallel or two diodes of thin film transistors connected in series may be used.

  As shown in FIG. 3, the thin film transistor 1 has a bottom gate / bottom contact structure, and includes an insulating substrate 8, a gate electrode 9, a capacitor electrode 10, a gate insulating film 11, a source electrode 12, a drain electrode 13, and a semiconductor layer. 14 and the sealing layer 15.

  As shown in FIG. 4, the gate protection element 6 and the source protection element 7 include an insulating substrate 8, a gate electrode 9, a capacitor electrode 10, a gate insulating film 11, a source electrode 12, a drain electrode 13, a monomolecular film 16, and a via opening. The unit 17 is configured. A monomolecular film 16 is formed on the gate electrode 9 exposed from the gate insulating film 11 and the gate insulating film via opening 17. The gate insulating film via opening 17 has a tapered shape.

  The insulating substrate 8 of the present invention includes polymethylene methacrylate, polyacrylate, polycarbonate, polystyrene, polyethylene sulfide, polyethersulfone, polyolefin, polyethylene terephthalate, polyethylene naphthalate, cycloolefin polymer, polyethersulfone, triacetylcellulose, polyvinyl Fluoride film, ethylene-tetrafluoroethylene, copolymer resin, weather resistant polyethylene terephthalate, weather resistant polypropylene, glass fiber reinforced acrylic resin film, glass fiber reinforced polycarbonate, transparent polyimide, fluorine resin, cyclic polyolefin resin, etc. are used. However, the present invention is not limited to these. These can be used alone or as a composite substrate in which two or more kinds are laminated. A substrate having a resin layer such as a color filter on a glass or plastic substrate can also be used.

For the gate electrode 9, the capacitor electrode 10, the source electrode 12, and the drain electrode 13 of the present invention, a low resistance metal material such as Au, Ag, Cu, Cr, Al, Mg, Li, or an oxide material is preferably used. Specifically, indium oxide (In ₂ O ₃ ), tin oxide (SnO ₂ ), zinc oxide (ZnO), cadmium oxide (CdO), indium cadmium oxide (CdIn ₂ O ₄ ), cadmium tin oxide (Cd ₂ SnO) ₄ ), zinc tin oxide (Zn ₂ SnO ₄ ), indium zinc oxide (InZnO), and the like. Moreover, what doped this oxide material with the impurity is also preferable. For example, indium oxide doped with molybdenum or titanium, tin oxide doped with antimony or fluorine, zinc oxide doped with indium, aluminum, or gallium. Among them, indium tin oxide (ITO) in which tin is doped in indium oxide exhibits a particularly low resistivity. Organic conductive materials such as PEDOT / PSS (polyethylenedioxythiophene / polyanionic poly (styrene sulfonate)) are also suitable, and they are preferably used in the case of a single substance or a plurality of laminated layers with a conductive oxide material. It is done. The gate electrode 9, the capacitor electrode 10, the source electrode 12, and the drain electrode 13 may all be made of the same material or different materials. However, in order to reduce the number of steps, it is desirable to use the same material for the gate electrode 9 and the capacitor electrode 10 and the source electrode 12 and the drain electrode 13. In addition, in order to print a fine line width and thin film electrode, all electrodes (gate electrode 9, capacitor electrode 10, source electrode 12, drain electrode 13) are formed by a transfer printing method such as a reverse offset printing method. Is desirable.

The gate insulating film 11 of the present invention includes an inorganic material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, tantalum oxide, yttrium oxide, hafnium oxide, hafnium aluminate, zirconia oxide, titanium oxide, or PMMA (polyethylene oxide). Examples thereof include polyacrylates such as methyl methacrylate), PVA (polyvinyl alcohol), and PVP (polyvinylphenol), but the present invention is not limited thereto. In order to suppress the gate leakage current, a preferable resistivity of the insulating material is 10 ¹¹ Ωcm or more, more preferably 10 ¹⁴ Ωcm or more. The thickness of the gate insulating film is preferably 1.5 μm or less. When the film thickness is thicker than 1.5 μm, since the capacitance is small, the voltage for starting the transistor must be increased. Therefore, power consumption is required. In addition, the via opening 17 of the gate insulating film 11 is printed by photolithography, and the taper angle 18 of the via opening 17 can be controlled by the development time and the developer concentration. In consideration of easiness, it is desirable to control the taper angle 18 by the development time.

  The taper angle 18 of the via opening 17 is desirably 60 ° or less. Since the thickness of the gate insulating film 11 is 1.5 μm or less, if it is larger than 60 °, the source electrode 12 and the drain electrode 13 are formed on the gate electrode 9 exposed from the via opening 17 by the transfer printing method. At this time, it is difficult for the blanket to come into contact with the side surface of the gate electrode 9, which may cause a transfer failure.

  Examples of the semiconductor layer 14 used in the present invention include an oxide semiconductor and an organic semiconductor. As an oxide semiconductor material, an oxide containing one or more elements selected from zinc, indium, tin, tungsten, magnesium, gallium, etc., that is, zinc oxide, indium oxide, indium zinc oxide, tin oxide, tungsten oxide, zinc oxide Known materials such as gallium indium can be used. Organic semiconductor materials include high molecular organic semiconductor materials such as polythiophene, polyallylamine, fluorenebithiophene copolymers, and derivatives thereof, and pentacene, tetracene, copper phthalocyanine, perylene, 6,13-bis (triisopropylsilyl) Low molecular organic semiconductor materials such as ethynyl) pentacene (TIPS-pentacene) and their derivatives, and precursors that are converted into organic semiconductors by heat treatment or the like can be used as the semiconductor material ink. Carbon compounds such as carbon nanotubes or fullerenes, semiconductor nanoparticle dispersions, and the like can also be used as the semiconductor layer material. When the semiconductor material ink is used, examples of the solvent include toluene, xylene, indane, tetralin, propylene glycol methyl ether acetate, and the like, but are not limited thereto. These semiconductor layers are formed by a vacuum deposition method, an ion plating method, a sputtering method, a laser ablation method, a plasma CVD method, a photo CVD method, a hot wire CVD method, or the like. In addition, it is possible to form the conductive material in the form of ink or paste by applying it by screen printing, flexographic printing, ink jet method or the like and drying it, but the present invention is not limited to these. Absent.

  The material used as the sealing layer 15 used in the present invention is a polymer solution such as polyvinylphenol, polymethyl methacrylate, polyimide, polyvinyl alcohol, epoxy resin, fluororesin, or a solution in which particles such as alumina or silica gel are dispersed. Preferably used. In addition, as a method for forming the sealing layer, a method of directly forming a pattern using a wet method such as screen printing, letterpress printing, or an inkjet method is preferably used, but is not limited thereto.

  The compound of the monomolecular film 16 used in the present invention includes, but is not limited to, a thiol compound, a disulfide compound, a silane coupling agent, a phosphonic acid compound, or the like. These compounds include ethanethiol, propanethiol, butanethiol, pentanethiol, hexanethiol, heptanethiol, octanethiol, decanethiol, octadecanethiol and other alkanethiols, benzenethiol, fluorobenzenethiol, pentafluorobenzenethiol, etc. Aromatic thiols, disulfide compounds such as diphenyl disulfide, methyltrimethoxysilane, ethyltrimethoxysilane, propyltrimethoxysilane, octyltrimethoxysilane, octyltriethoxysilane, octyltrichlorosilane, octadecyltrimethoxysilane, octadecyltriethoxy Silane coupling agents such as silane and octadecyltrichlorosilane, and phosphonation of octadecylphosphonic acid Goods and the like, but not limited thereto.

  A method for forming the monomolecular film 16 used in the present invention is not particularly limited, but a wet process such as a dip coating method, a spray coating method, or a spin coating method is desirable, but a dry process such as a vacuum deposition method is also used. be able to. Wet processes such as dip coating, spray coating, and spin coating can be simplified in process and equipment compared to dry processes such as vacuum deposition, and surface treatment can be performed at a lower cost. it can.

  The thickness of the monomolecular film 16 used in the present invention is about several nm, and the surface free energy on the monomolecular film 16 can be controlled by replacing the end of the monomolecular film 16 with main functional groups. . For example, the monomolecular film 16 modified with an amino group, an epoxy group, a mercapto group or the like generally tends to have a large surface free energy. Therefore, by forming the monomolecular film 16 having a large surface free energy on the gate insulating film 11 and the gate insulating film via opening 17, the source electrode 12 and the drain electrode 13 are formed on the monomolecular film 16 by the transfer printing method. It can be formed without transfer defects.

  In this embodiment, a manufacturing method of the bottom gate / bottom contact type thin film transistor array shown in FIGS. This transistor array has a pixel size of 500 μm × 500 μm, a wiring width of 25 μm, a channel length of 5 μm, a channel width of 25 μm, and a pixel number of 240 × 320.

  First, a polyethylene naphthalate (PEN) film (manufactured by Teijin DuPont) was used as the insulating substrate 8. Silver ink (manufactured by Harima Chemicals) was transferred and printed on the PEN film and dried at 180 ° C. for 1 hour to form a gate electrode 9, capacitor electrode 10, and gate wiring 2 having a film thickness of 100 nm.

  Subsequently, a positive photosensitive polyimide (manufactured by Asahi Kasei) was applied with a die coater so as to cover the entire surface of the gate electrode 9, the capacitor electrode 10, and the gate wiring 2 and then dried at 60 ° C. for 30 minutes. Next, after exposure, development was performed for 75 seconds using 2.38% of a tetraammonium hydroxide aqueous solution. Thereafter, the resist was peeled off and dried at 180 ° C. for 1 hour to form a via opening 17 having a taper angle 18 of 60 ° in the gate insulating film 11.

  Thereafter, 9-amino 1-octanethiol (manufactured by Kanto Chemical Co., Ltd.) is added to isopropanol (manufactured by Kanto Chemical Co., Ltd.) as a surface treatment agent for forming the monomolecular film 16 in the gate insulating film 11 and the via opening 17. The solution was dissolved so as to be% and immersed for 30 minutes. After soaking, it was washed with isopropanol and dried by air blow. The surface free energy was measured and found to be 65 mN / m.

  Subsequently, in the same manner as in the method of manufacturing the thin film transistor 1, a silver ink (manufactured by Harima Kasei) is formed to a thickness of 100 nm by a transfer printing method, whereby the source electrode is also formed on the gate electrode 9 exposed from the gate insulating film via opening 17. 12. The drain electrode 13 could be formed.

  As a semiconductor layer forming material, a mixed solution of tetralin (manufactured by Kanto Chemical) and 1,13-bis (triisopropylsilylethynyl) pentacene (TIPS-pentacene) (manufactured by Aldrich) was used. The flexographic printing method was used for forming the semiconductor layer. For flexographic printing, a photosensitive resin flexographic plate and a 150-wire anilox roll were used. After the semiconductor material was printed in stripes, the semiconductor layer 14 was formed by drying at 100 ° C. for 60 minutes.

  Subsequently, the sealing layer 15 was formed. Cytop (manufactured by Asahi Glass) was used as the sealing layer forming material. Flexographic printing was used for forming the sealing layer. A photosensitive resin flexographic plate was used as the flexographic plate, and a 150-wire anilox roll was used.

  After that, when the display according to this example is driven with an electrophoretic medium sandwiched between the counter electrode and the threshold voltage shift is within ± 1%, a thin film transistor array with little device degradation can be manufactured. It was.

Comparative Example 1

  In the same procedure as in Example 1, a gate electrode 9, a capacitor electrode 10, a gate insulating film 11, a source electrode 12, a drain electrode 13, a semiconductor layer 14, and a sealing layer 15 are formed on the PEN film 8, and the thin film transistor 1 is formed. Produced.

  Subsequently, a gate electrode 9 was formed on the PEN film 8 in the same manner as in Example 1 in order to produce the gate protection element 6 and the source protection element 7.

  Subsequently, positive photosensitive polyimide (manufactured by Asahi Kasei) was applied as a gate insulating material on the produced gate electrode 9 by a die coater, and photolithography was performed. Development was carried out for 30 seconds using 2.38% of an aqueous tetraammonium hydroxide solution. Thereafter, the resist was peeled off and dried at 180 ° C. for 1 hour to form a via having a taper angle 18 of 80 ° in the gate insulating film 11.

  Thereafter, 9-amino 1-octanethiol (manufactured by Kanto Chemical Co., Ltd.) is added to isopropanol (manufactured by Kanto Chemical Co., Ltd.) as a surface treatment agent for forming the monomolecular film 16 in the gate insulating film 11 and the via opening 17. The solution was dissolved so as to be% and immersed for 30 minutes. After soaking, it was washed with isopropanol and dried by air blow. The surface free energy was measured and found to be 65 mN / m.

  Subsequently, an attempt was made to form the source electrode 12 and the drain electrode 13 by depositing silver ink (manufactured) on the monomolecular film 16 by a transfer printing method to a thickness of 100 nm, but the gate exposed from the gate insulating film via opening 17 Silver ink was not transferred onto the electrode, and the gate electrode 9 and the source electrode 12 / drain electrode 13 could not be electrically connected.

  Subsequently, the semiconductor layer 14 and the sealing layer 15 were formed in the same manner as in Example 1.

  Finally, when the display according to the present example was driven with the electrophoretic medium sandwiched between the counter electrode and the counter electrode, the threshold voltage shift was ± 10% or more, resulting in large device degradation.

Comparative Example 2

  In the same procedure as in Example 1, a gate electrode 9, a capacitor electrode 10, a gate insulating film 11, a source electrode 12, a drain electrode 13, a semiconductor layer 14, and a sealing layer 15 are formed on the PEN film 8, and the thin film transistor 1 is formed. Produced.

  Subsequently, in order to manufacture the gate protection element 6 and the source protection element 7, the gate electrode 9, the gate insulating film 11, and the via opening 17 were formed on the PEN film 8 as in Example 1.

  Thereafter, octyltrichlorosilane (manufactured by Kanto Chemical Co., Ltd.) is added to isopropanol (manufactured by Kanto Chemical Co., Ltd.) as a surface treatment agent for forming the monomolecular film 16 in the gate insulating film 11 and the via opening 17 so as to be 0.5% by weight. The solution dissolved in was used for 30 minutes. After soaking, it was washed with isopropanol and dried by air blow. The surface energy was measured and found to be 16 mN / m.

  Subsequently, the source electrode 12 and the drain electrode 13 were formed by depositing silver ink (manufactured) to a thickness of 100 nm by transfer printing in the same manner as the method for manufacturing the thin film transistor 1. The silver ink was not transferred onto the gate electrode exposed from the above, and the continuity between the gate electrode 9 and the source electrode 12 / drain electrode 13 could not be achieved.

  Subsequently, the semiconductor layer 14 and the sealing layer 15 were formed in the same manner as in Example 1.

  Thereafter, when the electrophoretic medium was sandwiched between the counter electrode and the display according to this example was driven, the threshold voltage shift was ± 10% or more, resulting in a large device deterioration.

  The present invention can be applied to a drive circuit, an electronic tag, and the like of a display device such as organic EL and electronic paper.

DESCRIPTION OF SYMBOLS 1 ... Thin-film transistor 2 ... Gate wiring 3 ... Source wiring 4 ... Gate common electrode 5 ... Source common electrode 6 ... Gate protection element 7 ... Source protection element 8 ... Insulation Substrate 9 ... Source electrode 10 ... Capacitor electrode 11 ... Gate insulating film 12 ... Source electrode 13 ... Drain electrode 14 ... Semiconductor layer 15 ... Sealing layer 16 ... Single Molecular film 17 ... via opening 18 ... taper angle

Claims (4)

A gate electrode and a capacitor electrode formed on an insulating substrate, a gate insulating film formed on the gate electrode and the capacitor electrode, a source electrode and a drain electrode formed on the gate insulating film, and the source electrode A thin film transistor having a semiconductor layer formed between the semiconductor layer and the drain electrode and a sealing layer formed on the semiconductor layer is arranged in a matrix, and the gate is shared around the thin film transistor arranged in the matrix A thin film transistor array having an electrode and a source common electrode, wherein a gate protection element is connected between the gate common electrode and the gate wiring, and a source protection element is connected between the source common electrode and the source wiring Because
The taper angle of the gate insulating film via the opening of the gate protection element and the source protection element Ri der 60 ° or less,
On the surface of the gate electrode exposed from the gate insulating film via the opening, and wherein Rukoto to have a monomolecular film formed of a compound containing both an amino group and a mercapto group, a thin film transistor array. The thin film transistor array according to claim 1, wherein a thickness of the gate insulating film is 1.5 μm or less.   An image display device comprising the thin film transistor array according to claim 1 and an image display medium. The image display device according to claim 3 , wherein the image display medium is of an electrophoretic type.