JP5432445B2 - Thin film transistor manufacturing method and photomask for manufacturing thin film transistor - Google Patents

Description

  The present invention relates to a method for manufacturing a thin film transistor and a photomask for manufacturing the thin film transistor.

  Liquid crystal display (LCD) is widely used for OA, consumer, and industrial applications as a flat panel display essential in the information and communication era, taking advantage of its thin, lightweight, and low power consumption features. . In the manufacturing process of such a liquid crystal display device, a photoengraving technique is used to transfer a pattern onto a substrate.

  In the photoengraving technique, a substrate coated with a photosensitive resin (hereinafter referred to as a resist) is first exposed through a photomask on which a pattern is formed. By the exposure process, the pattern formed on the photomask is projected and exposed on the substrate. The resist is obtained by dissolving a chemical substance that reacts with light in a solvent, and there are a positive type in which the exposed portion is dissolved and a negative type in which the exposed portion remains. Then, the exposed resist is subjected to a development process with a developer, and an excessive portion of the resist is removed. Thereby, the pattern image of the photomask is transferred to the resist, and a resist pattern is formed.

  Usually, a photomask has a pattern formed on a transparent substrate by a light shielding film such as chromium. In the portion where the pattern is not formed on the photomask, light passes through the transparent substrate, and the resist is exposed to become a so-called exposed portion. On the other hand, the pattern forming portion of the photomask is shielded from light, and the resist is an unexposed portion. In this way, the pattern on the photomask is transferred to the resist.

  A thin film transistor (hereinafter also referred to as “TFT”) is widely used as a pixel driving transistor in an active matrix liquid crystal display (AMLCD). Among TFTs, those using an amorphous silicon (Si) film as a semiconductor film can be manufactured with a small number of manufacturing steps, and the size of the insulating substrate can be easily increased, resulting in high productivity. Has been widely applied. In the manufacturing process of the TFT array substrate, at least five different etching processes are required. For this reason, in order to form a resist pattern corresponding to each etching process, five photoengraving steps are required, and five photomasks have been used to perform five photoengraving steps. .

  In recent years, in order to further reduce the number of manufacturing steps and reduce the manufacturing cost, development of a four-mask technique has been advanced (Patent Documents 1 to 3). The four-mask technique is a technique for manufacturing a process that uses two photomasks by using one photomask, and uses a so-called multi-tone exposure technique. . According to the multi-tone exposure technique, it is possible to intentionally create a film thickness difference in the resist. In order to form a difference in film thickness in the resist, it is necessary to form an intermediate gradation region through which a smaller amount of light passes through the transparent substrate than on the photomask. As a method for forming the intermediate gradation region, a method using a gray tone mask and a method using a halftone mask are known. The gray tone mask is a pattern in which minute patterns that are unresolved during the photoengraving process are arranged in a slit or lattice shape, and the amount of transmitted light in that portion is controlled. The halftone mask is for forming an intermediate gradation region with a semitransparent film.

  A method of manufacturing an inverted stagger type TFT by the four-mask technique will be described. Conventionally, island formation of a semiconductor layer (amorphous silicon) and pattern formation of a source electrode or the like have been individually performed by film formation, a photoengraving process, an etching process, and the like. On the other hand, in the case of manufacturing by a four-mask technique, after forming a pattern such as a gate electrode, a conductive film for forming a gate insulating film, a semiconductor layer, a source electrode, a drain electrode, and the like is continuously formed. Film. Then, a resist is applied to the upper layer by spin coating.

  In the resist exposure process, a multi-tone exposure technique is used, and a photomask is used in which the resist film thickness on the TFT back channel region is smaller than the resist film thickness on the source electrode formation region. To perform an exposure process. Then, a first resist pattern is formed by development processing, and etching processing is performed using the first resist pattern as a mask. Thereafter, the resist formed in the upper layer of the back channel region is removed, and ashing is performed so that a pattern such as a source electrode remains. As a result, a second resist pattern is obtained, and the second etching is performed using the second resist pattern as a mask. By this step, a back channel is formed and a TFT is obtained. When a TFT is mounted on a liquid crystal display device, it is necessary to remove the resist formed on the pattern region such as the source electrode and to perform a process (two photolithography processes) such as formation of an interlayer insulating film and a pixel electrode. It becomes.

  FIG. 11A is a plan view of a photomask 170 according to Conventional Example 1, and FIG. 11B is a plan view of a first resist pattern 150 patterned using the photomask 170 of FIG. 11A. Show. As shown in FIG. 11A, the photomask 170 has a source electrode formation pattern 171, a drain electrode formation pattern 173, and a linear pattern 176. The length of the linear pattern 176 in the long side direction is the same as the length of the sides of the drain electrode forming patterns 173 facing each other. The width of the linear pattern 176 in the short side direction is set to a value not more than the exposure resolution limit.

  FIG. 12A is a plan view of a photomask 170a for manufacturing a TFT described in Patent Document 2 according to Conventional Example 2, and FIG. 12B is a plan view using the photomask 170a of FIG. The top view of the principal part of manufactured TFT101 is shown. In FIG. 12B, reference numeral 106 denotes a gate electrode, reference numeral 131 denotes a source electrode, and reference numeral 133 denotes a drain electrode. A source electrode forming pattern 171a, a drain electrode forming pattern 173a, and a linear pattern 176a are formed on the photomask 170a. As shown in the figure, the source electrode forming pattern 171a and the drain electrode forming pattern 173a have opposing sides of the same length arranged opposite to each other. And the side of the linear pattern 176a is made to protrude 1.5-3.0 micrometers with respect to these sides.

  In the TFT 101, the edge 114 in the channel width direction of the channel region of the semiconductor layer 110 is formed as the concave shape 115 and the convex shape 116, and a TFT capable of realizing a reduction in light leakage current is obtained by ensuring a certain channel width or more. (See FIG. 12B).

FIG. 13A is a plan view of a photomask 170b for manufacturing a TFT described in Patent Document 3 according to Conventional Example 3, and FIG. 13B is a photomask 170b of FIG. 13A. The top view of the principal part of manufactured TFT102 is shown. The source electrode forming pattern 171b and the drain electrode forming pattern 173b formed on the photomask 170b have opposing sides of the same length arranged opposite to each other as in the conventional example 2. Further, the photomask 170b is formed with vertically arranged opening slits 175b and light shielding regions 176b, and both side edges of the channel region in the channel width direction (Y direction in FIG. 13A) are arranged horizontally. A slit 178 and a light shielding region 179 are included. A structure in which a wide semiconductor film 110b is formed by using a photomask 170b as shown in FIG. 13B is disclosed.
Japanese Patent Laying-Open No. 2005-72135, page 10-12, FIGS. 3-9 JP, 2005-228826, pp. 6, line 46, page -7, line 17, FIG. 1, FIG. JP-A-2002-55364, page 3-4, FIGS. 9-10

  As shown in FIG. 11B, the first resist pattern 150 according to the conventional example 1 is formed at the end portion in the channel width direction (Y direction in FIG. 11B) of the back channel region forming pattern 152. The concave portion 155 is formed by the wraparound of light from the surroundings. For this reason, the semiconductor layer in the lower layer is patterned in a shape reflecting the concave shape of the first resist pattern 150. As a result, the channel width is narrower than the lengths of the drain electrode and the source electrode, and the current driving capability of the TFT is reduced.

  In the above conventional example 2, when the concave portion formed at the end of the channel region in the channel width direction is formed in the opposing region of the source electrode 131 and the drain electrode 133, the current driving capability is reduced. In addition, even when a recess formed at the end of the channel region in the channel width direction is formed outside the region where the source electrode 131 and the drain electrode 133 are opposed to each other, the current amount is rate-limiting in the recess. There was a problem that.

  If there is a concave or convex portion at the end of the channel region, a portion where the film thickness of the interlayer insulating film stacked on the channel region is not uniformly formed is likely to occur, which causes a pinhole or the like. When the pinhole is formed in the interlayer insulating film, moisture or the like is mixed during the manufacturing process, and the metal that is the material of the source electrode and the drain electrode is corroded, resulting in a decrease in yield.

  In the case where the photomask 170a described in the conventional example 3 is used, if the dimensional accuracy of the photomask pattern is different between the vertical direction and the horizontal direction, the thickness of the resist pattern formed inside the channel region and on both edges 14 of the channel region. There was a problem that would be different. As a result, the channel length and the amount of expansion of the channel width from the source electrode and the drain electrode vary due to the variation of the exposure amount, and the stability of the on-current characteristics of the TFT is deteriorated. For this reason, it is necessary to strictly manage the dimensional accuracy of the photomask.

  The present invention has been made in view of the above-described background, and its object is to achieve an excellent stabilization of the ON characteristics of the TFT and improve the current driving capability while achieving low cost and high yield. It is an object of the present invention to provide a method of manufacturing a thin film transistor that can be used.

A method of manufacturing a thin film transistor according to the present invention includes a step of forming a gate electrode on a substrate, a step of sequentially stacking a gate insulating film, a semiconductor layer, a conductive film, and a resist on the gate electrode, and an upper portion of the resist. A step of forming a first resist pattern having a step structure in a thickness direction by a photoengraving process by disposing a photomask; a step of etching the conductive film and the semiconductor layer using the first resist pattern as a mask; Forming a second resist pattern so that a thick portion of the first resist pattern remains as a pattern; etching of the conductive film in a back channel portion using the second resist pattern as a mask; and the semiconductor layer Forming a back channel. The first resist pattern has the source electrode forming light-shielding region formed on the photomask transferred thereto and the drain electrode forming light-shielding region formed on the photomask transferred thereto. A drain electrode forming pattern; and a back channel region forming pattern formed on the photomask and having a transflective region for forming a back channel region having a pattern below a resolution limit with respect to light to be exposed. . The back channel region forming pattern, from both ends of the side RL _D of the drain electrode forming pattern which faces the source electrode forming pattern, the sides of the source electrode forming pattern which faces the drain electrode forming pattern towards RL _S, substantially continuous width is formed to expand on both sides, the second resist pattern are those from the first resist pattern to remove the back channel region forming pattern.

  According to the present invention, it is possible to provide a method of manufacturing a thin film transistor that is excellent in stabilizing the ON characteristics of a TFT and capable of improving current driving capability while achieving low cost and high yield. Has an effect.

  Hereinafter, an example of an embodiment to which the present invention is applied will be described. It goes without saying that other embodiments may also belong to the category of the present invention as long as they match the gist of the present invention. Moreover, the size and ratio of each member in the following drawings are for convenience of explanation, and are not limited to this.

[Embodiment 1]
FIG. 1A is a plan view showing the configuration of the TFT 1 according to the first embodiment, and FIG. 1B is a cross-sectional view taken along the line Ib-Ib in FIG. The TFT 1 is of an inverted stagger type and is manufactured by channel etching (CE). For convenience of explanation, in FIG. 1A, the gate insulating film 7 and the interlayer insulating film 8 are illustrated so that the positional relationship among the gate electrode 6, the source electrode 31, and the drain electrode 33 can be easily understood. Omitted.

  As shown in FIG. 1B, the TFT 1 includes an insulating substrate 5, a gate electrode 6, a gate insulating film 7, a first semiconductor film 10 and a second semiconductor film 20 as semiconductor layers, a source electrode 31, a drain electrode 33, It has an interlayer insulating film 8 and the like.

  As the insulating substrate 5, a transparent substrate such as a glass substrate or a quartz substrate is used. A gate electrode 6 is formed on the insulating substrate 5. The gate insulating film 7 is formed in an upper layer so as to cover the gate electrode 6. The first semiconductor film 10 is formed on the gate insulating film 7, and at least a part of the first semiconductor film 10 is disposed to face the gate electrode 6 with the gate insulating film 7 interposed therebetween.

  The second semiconductor film 20 is formed in the upper layer of the first semiconductor film 10. The source electrode 31 and the drain electrode 33 are formed on the second semiconductor film 20. The region of the second semiconductor film 20 in which the source electrode 31 is stacked becomes the source region 21, and the region of the second semiconductor film 20 in which the drain electrode 33 is stacked becomes the drain region 23. Of the first semiconductor film 10, the first semiconductor film 10 located between the source region 21 and the drain region 23 is the channel region 12.

  The source electrode 31 and the drain electrode 33 are disposed to face at least a part of the gate electrode 6 with the gate insulating film 7, the first semiconductor film 10, and the second semiconductor film 20 interposed therebetween. That is, in order to operate as a TFT, the thin film transistor region 80 exists on the gate electrode 6 and is easily affected by an electric field when a voltage is applied to the gate electrode.

Here, the side wall of the source electrode 31 facing the drain electrode 33 is PSw _S , and the side wall of the drain electrode 33 facing the source electrode 31 is PSw _D (see FIG. 1A). PSw _S and PSw _D are opposed to each other substantially in parallel. Then, PSw _S is longer than PSw _D, there is a non-opposed region between PSw _D to both ends of PSw _S.

  As described above, the second semiconductor film 20 having substantially the same shape as these is formed under the drain electrode 33 and the source electrode 31. Then, as shown in FIG. 1A, the first semiconductor film 10 having substantially the same shape whose size is large only at the edge portion 14 is formed under the second semiconductor film 20. The interlayer insulating film 8 is formed so as to cover the channel region 12, the source electrode 31, and the drain electrode 33 (see FIG. 1B).

  The edge portion 14 of the first semiconductor film 10 is isotropic in the lateral direction because the ashing of the resist 40 is isotropic in the TFT manufacturing process (step of etching the source / drain electrode material) described later. Is formed by retreating. The presence of the edge 14 region does not affect the TFT operation.

  Next, a manufacturing method of the TFT 1 configured as described above will be described with reference to FIGS.

  First, a first conductive film is formed on the insulating substrate 5 by sputtering or the like. The first conductive film is, for example, Cr, Al, Ti, Mo or the like, an alloy containing these as a main component, or a laminated film of these metals. Thereafter, a resist that is a photosensitive resin is applied onto the first conductive film by a spin coating method. Then, the applied resist is exposed from above the photomask to expose the resist. Next, the exposed resist is developed to pattern the resist. Thereafter, the exposed first conductive film is etched to remove the resist pattern. Thereby, the first conductive film is patterned into a predetermined shape, and the gate electrode 6, the gate signal line, and the like are formed (see FIG. 2A).

Next, on the gate electrode 6 and the insulating substrate 5, the first semiconductor film 10 and the second semiconductor film 20 functioning as the gate insulating film 7 and the semiconductor layer by various CVD methods such as plasma CVD (Chemical Vapor Deposition). The second conductive film 30 functioning as a conductive film is continuously formed. The gate insulating film 7 is made of SiN _x , SiO _y, or the like. The first semiconductor film 10 is a pure semiconductor to which impurities are not added, a so-called intrinsic semiconductor. As the first semiconductor film 10, a-Si (amorphous silicon) or the like is used. The second semiconductor film 20 is an n-type semiconductor, and an n ⁺ a-Si (n ⁺ amorphous silicon) film obtained by doping a-Si with a slight amount of P (phosphorus) or the like is used.

  The first semiconductor film 10 and the second semiconductor film 20 are desirably formed in the same chamber. By forming the first semiconductor film 10 and the second semiconductor film 20 in the same chamber, the electrical connection resistance between the two silicon layers can be reduced. Of course, the gate insulating film 7 may also be formed in the same chamber. The second conductive film 30 is, for example, Cr, Al, Mo, an alloy mainly containing these, or a laminated film of these metals.

  Next, a resist 40 that is a photosensitive resin is applied on the second conductive film 30 by a spin coating method. Then, the applied resist 40 is exposed from above the photomask 70 as shown in FIG. FIG. 3 shows a plan view of the photomask 70. 4A is a plan view of the first resist pattern 50 obtained by development after exposure, and FIG. 4B is a cross-sectional view taken along the line IVb-IVb in FIG. 4A.

The photomask 70 includes a source electrode forming light-shielding region 71, a drain electrode forming light-shielding region 73, and a semi-transmission region 72 for forming a back channel region having a pattern that is less than the resolution limit with respect to light to be exposed. The source electrode forming light shielding region 71 and the drain electrode forming light shielding region 73 are obtained by patterning a metal such as Mo formed on glass or quartz in order to shield light during exposure. The source electrode forming light shielding region 71 is formed in a pattern so that the source electrode 31 finally formed in the planar shape shown in FIG. 1A is obtained, and the drain electrode forming light shielding region 73 is finally formed. The drain electrode 33 formed in the planar shape shown in FIG. Here, the side of the source electrode forming light shielding region 71 on the side facing the drain electrode forming light shielding region 73 is the side ML _S , and the side of the drain electrode forming light shielding region 73 on the side facing the source electrode forming light shielding region 71 is Is the side ML _D.

  Between the drain electrode forming light shielding region 73 and the source electrode forming light shielding region 71, a transflective region 72 for forming a back channel region is disposed. The semi-transmissive region 72 for forming the back channel region is below the resolution limit with respect to the light to be exposed, and the S-side linear transmissive portion between the linear pattern 76 and the linear pattern 76 and the light shielding region 71 for forming the source electrode. 75, a D-side linear transmission portion 77 between the linear pattern 76 and the drain electrode forming light shielding region 73. The width e of the S-side linear transmission portion 75, the width f in the short side direction of the linear pattern 76, and the width g of the D-side linear transmission portion 77 are the physical properties of the material used as the resist 40, the wavelength of light used for exposure, The value is set to a value below the exposure resolution limit determined by the optical system of the exposure apparatus, such as the aperture ratio of the lens.

Here, the width of the linear pattern 76 in the channel width direction is MW. Further, the protruding length of the upper first end E1 in FIG. 3 in the long side direction of the linear pattern 76 protruding from the drain electrode forming light shielding region 73 is a ₁ , and the lower second end in FIG. the protruding length of the parts E2 and _{b 1.} Further, the distance between the drain electrode forming light shielding region 73 and the source electrode forming light shielding region 71 is L. In this embodiment, L is also the sum of the width f in the short side direction of the linear pattern 76, the width e in the short side direction of the S-side linear transmission part, and the width g in the short side direction of the D-side linear transmission part. . Further, the protruding length of the first end E3 on the upper side (the same side as the first end E1) in FIG. 3 in the channel direction of the source electrode forming light shielding region 71 protruding from the drain electrode forming light shielding region 73. C, and the protruding length of the second end E4 on the lower side (the same side as the second end E2) in FIG. In the first embodiment, the channel length L is set to 3.0 μm, and the above e, f, and g are set to 1.0 μm.

As shown in FIG. 3, the width MW of the linear pattern 76 of the photomask 70 according to the first embodiment has a width MW of the drain electrode forming light shielding region 73 on the side facing the light shielding region 71 for forming the source electrode. It is longer than the side ML _D and shorter than the side ML _S of the source electrode forming light shielding region 71 on the side facing the drain electrode forming light shielding region 73. The photomask 70 satisfies the following <Expression 1> and <Expression 2>.

<Formula 1> a _m ≧ L × m / (n + 1) and b _m ≧ L × m / (n + 1)
Here, m represents an array number when the linear pattern is counted from the drain electrode forming light shielding region side, and n represents the total number of linear patterns. In the first embodiment, since the number of linear patterns is one, m = 1 and n = 1. That is, the protrusion length a ₁ and the protrusion length b ₁ (see FIG. 3) in the long-side direction of the linear pattern 76 protruding from the side ML _D are each set to a distance L between the side ML _D and the side ML _S of 2 More than the value divided by. a ₁ and b ₁ do not necessarily have the same length. By satisfying the above <Formula 1>, it is possible to prevent a recess from being formed in the channel region of the first semiconductor film 10. By making the separation distance L smaller than 3.0 μm, the projecting length a ₁ and the projecting length b ₁ can be made smaller than 1.5 μm.

<Formula 2> c ≧ L and d ≧ L
That is, each of the protrusion length c and the protrusion length d (see FIG. 3) of the side ML _S protruding from the side ML _D is equal to or greater than the separation distance L.

Furthermore, it is preferable to satisfy the following <Formula 4> from the viewpoint of preventing a convex portion from being formed at the end of the channel region in the channel width direction.
<Formula 4> c ≧ a _m or / and d ≧ b _m
Namely, in this embodiment 1, each long side direction protruding length of a ₁ and the projecting length of the linear pattern 76 projecting from the side ML _D b _{1 (see} FIG. 3), edges projecting from the side ML _D The protrusion length c and the protrusion length d (see FIG. 3) of the ML _S are set to be equal to or less.

  As shown in FIG. 2B, the photomask 70 configured as described above is arranged on the top of the resist 40 and irradiated with light having a predetermined wavelength by an exposure apparatus (not shown). Then, in the transmission region of the photomask 70, the resist 40 is irradiated with light, and this portion becomes an exposed portion. In the drain electrode forming light-shielding region 73 and the source electrode forming light-shielding region 71, light is shielded, and the resist 40 in that portion becomes an unexposed portion. In the resist located in the lower layer of the semi-transmission region 72 for forming the back channel region, the amount of light irradiated by the S-side linear transmission portion 75, the linear pattern 76, and the D-side linear transmission portion 77 as compared with the exposure portion. A semi-exposure portion with less is formed.

  After the exposure process, the resist 40 is developed. As a result, the resist in the exposed portion is removed, and a first resist pattern 50 as shown in FIG. 4 is obtained. That is, in the exposed portion, the second conductive film 30 is exposed on the surface by removing the resist 40. In the unexposed portion, the resist 40 is not removed and a resist pattern having a predetermined film thickness is formed. In the half-exposed portion, the resist 40 is removed to such an extent that it is not exposed on the surface of the second conductive film 30, and a pattern having a thin film thickness is formed as compared with the predetermined film thickness of the unexposed portion. In other words, the first resist pattern 50 is a pattern having two step structures in the film thickness direction between the unexposed part and the semi-exposed part.

  In the first resist pattern 50, the source electrode forming light-shielding region 71 formed on the photomask 70 and the drain electrode forming light-shielding region 73 formed on the photomask 70 are transferred. The drain electrode forming pattern 53 and the transflective region 72 for forming the back channel region comprising the S-side linear transmitting portion 75, the linear pattern 76, and the D-side linear transmitting portion 77 formed on the photomask 70 are transferred. And a back channel region forming pattern 52.

In practice, the first resist pattern 50 is formed by integrally forming a source electrode forming pattern 51, a drain electrode forming pattern 53, and a back channel region forming pattern 52 as one pattern. Here, each regarded as a collection of different patterns, the sides of the drain electrode forming pattern 53 that faces the source electrode forming pattern 51 and RL _D, source electrode formation pattern that faces the drain electrode forming pattern 53 _Let 51 be RL _S.

Back channel region forming pattern 52, from both ends of the side RL _D of the drain electrode forming pattern 53 that faces the source electrode forming pattern 51, the sides of the drain electrode forming pattern 53 opposite to the source electrode forming pattern 51 Toward RL _S , the width is substantially continuously increased on both sides.

  Subsequently, an etching process is performed. As a result, the exposed second conductive film 30, and the second semiconductor film 20 and the first semiconductor film 10 located therebelow are removed. Thereafter, the thin portion of the first resist pattern 50, that is, the back channel region forming pattern 52 is removed, and an ashing process is performed so that the second conductive film 30 in the lower layer is exposed. For the ashing process, for example, a known apparatus such as an RIE-DE apparatus or a UV asher can be used. As a result of the ashing process, the thick region of the unexposed portion is also thinned by ashing, but remains as a resist pattern. In addition, the size of the side wall portion of the resist becomes smaller as the edge portion 14 by ashing. Thereby, the edge part 14 of the 1st semiconductor film 10 as shown to Fig.1 (a) is formed.

  By ashing the first resist pattern 50, a second resist pattern 60 as shown in FIGS. 5A and 5B is obtained. The second resist pattern 60 includes a second drain electrode forming pattern 63 and a second source electrode resist pattern 61. The channel length Cha-L of the channel region 12 is determined by the distance 64 between the second drain electrode forming pattern 63 after the ashing process and the second source electrode resist pattern 61.

  Using the second resist pattern 60 as a mask, the exposed second conductive film 30 is removed. Then, the exposed second semiconductor film 20 and a part of the first semiconductor film 10 located therebelow are removed by etching. Thereby, a back channel is formed (see FIG. 5C). The channel region 12 has a structure in which the channel width CW substantially continuously increases from the drain region 23 toward the source region 21. Here, “substantially continuously expanding” is not limited to a concave shape as shown in the conventional example, and may be not only a linear shape but also a curved shape.

Thereafter, an interlayer insulating film 8 is formed by various CVD methods such as plasma CVD so as to cover the gate insulating film 7, the channel region 12, the source electrode 31, and the drain electrode 33. As the interlayer insulating film 8, SiN _x , SiO _y or the like, or a mixture or laminate thereof can be used. When the TFT 1 is mounted on a liquid crystal display device, after removing the second resist pattern 60, a contact hole is formed in the interlayer insulating film 8, and a pixel electrode is further formed. A pixel electrode is connected from the source electrode 31 through the TFT, and a potential for driving the liquid crystal is supplied, so that a desired image can be displayed. Through a series of these steps, the TFT 1 shown in FIG. 1B is formed.

  The TFT according to the first embodiment can be mounted as a TFT array substrate or the like on a display device such as a flat display device (flat panel display) such as a liquid crystal display device or an EL display device.

According to the first embodiment, since the resist 40 is patterned using the photomask 70 that satisfies the above <Expression 1> to <Expression 3>, the back channel region forming pattern 52 of the first resist pattern 50 is used. However, the width of the drain electrode forming pattern 53 is substantially continuously increased from both ends of the side RL _D toward the side RL _S of the source electrode forming pattern 51 on both sides. Then, after performing an etching process using the first resist pattern 50 as a mask, the back channel region forming pattern 52 having the above-described form is removed to form a second resist pattern, and back channel etching is performed. . Thereby, the channel region 12 in which the channel width CW is smoothly expanded substantially continuously on both sides from each end of the drain region 23 toward the source region 21 can be easily obtained. As a result, the channel region can be prevented from being narrowed, the ON characteristics of the TFT are excellently stabilized, and the current driving capability can be improved.

  Furthermore, since the end portion of the channel region 42 according to the first embodiment is not formed into a concave or convex shape, uneven film formation of the interlayer insulating film can be prevented, and pinholes are generated in the interlayer insulating film. Can be prevented. In addition, it is possible to improve the point that the amount of current is rate-limited by the recess. Further, since the semi-transmissive region 72 of the photomask 70 according to the first embodiment is formed only from patterns in the same direction, it is not necessary to manage the dimensional accuracy of the photomask as strictly as in the conventional example 3. . Accordingly, the interlayer insulating film can be formed uniformly, so that the manufacturing yield can be improved. In addition, since a TFT can be formed with four masks in a process that conventionally requires five masks, cost reduction can be achieved.

[Embodiment 2]
Next, an example of a TFT having a structure different from that of the first embodiment will be described. In the following description, the same elements as those in the above embodiment are given the same reference numerals, and the description thereof is omitted as appropriate.

  A basic configuration of the TFT 2 according to the second embodiment is the same as that of the first embodiment except for the following points. That is, in the first embodiment, the channel region 12 is formed from the end of the drain region 23 toward the end of the source region 21, whereas the channel region 12 according to the second embodiment It is different in that it is composed of a site formed from the end of the region 23 toward the end of the source region 21 and a site formed from the end of the drain region 23 toward the side wall of the source region 21. .

FIG. 6A is a plan view of a main part of the TFT 2 according to the second embodiment, and FIG. 6B is a plan view of a photomask 70a for manufacturing the TFT 2 according to the second embodiment. . As shown in FIG. 6A, one of the two non-opposing regions of the side wall PSw _S of the source electrode 31b facing the drain electrode 33 is longer in the channel width direction than in the first embodiment. Has been extended. This is because one of the source electrodes 31a is connected to a signal wiring or the like. Even source electrode 31a having such a shape, the back channel region forming pattern 52 of the first resist pattern 50 is, from both ends of the side RL _D of the drain electrode forming pattern 53, the source electrode forming pattern 51 To the side RL _S , it can be formed so that the width is substantially continuously increased on both sides. As a result, a TFT having a structure in which the channel width CW increases substantially continuously as the channel region 12 moves from the drain electrode side to the source electrode side can be obtained.

  According to the second embodiment, since the design flexibility of the source electrode 31a is high, the same effects as those of the first embodiment can be obtained while selecting the TFT structure flexibly according to the purpose of use and application. it can.

[Embodiment 3]
A basic configuration of the TFT 3 according to the third embodiment is the same as that of the first embodiment except for the following points. That is, in the first embodiment, the channel region 12 is formed from the end of the drain region 23 toward the end of the source region 21, whereas the channel region 12 according to the third embodiment It is different in that it is formed from each end of the region 23 toward the side wall of the source region 21.

FIG. 7 is a plan view of the main part of the TFT 3 according to the third embodiment. As shown in FIG. 7, two non-opposed region of sidewalls PSw _S of the source electrode 31b facing the drain electrode 33 are Zaisa longer extends in the channel width direction as compared with the first embodiment. The source electrode 31b according to the third embodiment is a part of the wiring. As shown in FIG. 7, the source electrode 31b, the drain electrode 33, and the channel region 12 have a structure similar to a T shape in plan view. It has become. Even source electrode 31b having such a shape, the back channel region forming pattern 52 of the first resist pattern 50 is, from both ends of the side RL _D of the drain electrode forming pattern 53, the source electrode forming pattern 51 To the side RL _S , it can be formed so that the width is substantially continuously increased on both sides. As a result, it is possible to obtain a TFT having a structure in which the channel width increases substantially continuously as the channel region 12 moves from the drain electrode side to the source electrode side.

  According to the TFT 3 according to the third embodiment, since the design flexibility of the source electrode 31b is high, the same effects as those of the first embodiment can be obtained while selecting the structure of the TFT flexibly according to the purpose of use and application. be able to.

[Embodiment 4]
The basic configuration of the photomask according to the fourth embodiment is the same as that of the second embodiment except for the following points. That is, in the second embodiment, one linear pattern 76 is formed, but the linear pattern according to the fourth embodiment is different in that there are two.

FIG. 8 is a plan view of a photomask according to the fourth embodiment. As shown in FIG. 8, the photomask 70b includes a source electrode forming light-shielding region 71b, a drain electrode forming light-shielding region 73, and a half for forming a back channel region having a pattern below the resolution limit with respect to light to be exposed. A transmissive region 72b is provided. The source electrode forming light shielding region 71b and the drain electrode forming light shielding region 73 are constituted by a light shielding part that shields light during exposure. The source electrode forming light-shielding region 71b is formed in a pattern that finally obtains the source electrode 31b formed in the planar shape shown in FIG. 6A, and the drain electrode forming light-shielding region 73 is finally formed. The drain electrode 33 formed in the planar shape shown in FIG. 6A is formed in such a pattern as to be obtained. Here, the sides of the drain electrode forming light-shielding region 73 opposed to the side of the source electrode forming the light shielding region 71b side ML S _b, the source electrode forming the light shielding region 71b opposite to the side of the drain electrode forming light-shielding region 73 Let the side be the side ML _D b.

  Between the drain electrode forming light shielding region 73 and the source electrode forming light shielding region 71b, a transflective region 72b for forming a back channel region is disposed. The transflective region 72b for forming the back channel region has a first linear pattern 76b and a second linear pattern 78 which are not more than the resolution limit with respect to the exposure light and are arranged in the same direction. Further, between the first linear pattern 76 b and the drain electrode forming light-shielding region 73, the D-side linear transmission portion 77 b and the transmission between the linear patterns between the first linear pattern 76 b and the second linear pattern 78 are transmitted. Between the portion 79, the second linear pattern 78, and the source electrode forming light-shielding region 71b, there is an S-side linear transmission portion 75b. A width f in the short side direction of the first linear pattern 76b, a width h in the short side direction of the second linear pattern 78, a width e of the S-side linear transmission part 75b, a width i of the transmission part 79 between the linear patterns, and The width g of the D-side linear transmission portion 77b is set to a value not more than the exposure resolution limit determined by the optical system of the exposure apparatus, such as the physical properties of the material used as the resist 40, the wavelength of light used for exposure, and the aperture ratio of the lens. .

Here, the width in the long side direction of the first linear pattern 76b is MW1, and the width in the long side direction of the second linear pattern 78 is MW2. Further, the protruding length of the first linear pattern 76b protruding from the drain electrode forming light shielding region 73 on the first end E5 side in FIG. 8 in the long side direction is a ₁ , and the drain electrode forming light shielding region 73 is formed. the third end portion projecting length of the E6-side upper side in FIG. 8 in the longitudinal direction of the second linear pattern 78 and a ₂ to more projects. Further, the protruding length of the first linear pattern 76b protruding from the drain electrode forming light shielding region 73 on the second end E7 side in the lower side in FIG. 8 in the long side direction is b ₁ , and the drain electrode forming light shielding region. the long side direction FIG lower fourth end E8-side protruding length of 8 in the second linear pattern 78 and b ₂ projecting from 73.

  Further, the distance between the drain electrode forming light shielding region 73 and the source electrode forming light shielding region 71b is L. In this embodiment, L is the width f in the short side direction of the first linear pattern 76, the width h in the short side direction of the second linear pattern 78, the width g in the short side direction of the D-side linear transmission portion, It is also the sum of the width e in the short side direction of the S-side linear transmission part and the width i between the linear patterns. In the third embodiment, the channel length L is 6.0 μm, and e, f, g, h, and i are each 1.2 μm. Note that the lengths of e, f, g, h, and i are not limited to the resolution limit so that a desired transmission amount can be obtained, and the lengths may be different.

Each of the width MW1 in the long side direction of the first linear pattern 76b and the width MW2 in the long side direction of the second linear pattern 78 of the photomask 70b according to the fourth embodiment is as shown in FIG. The side ML Db of the source electrode forming light shielding region 71b on the side that is longer than the side ML _D b of the drain electrode forming light shielding region 73 on the side facing the source electrode forming light shielding region 71b. _It is assumed that it is shorter than Sb.

  Further, the width MW1 in the long side direction of the first linear pattern 76b on the side of the light shielding region 71b for forming the source electrode is the width MW2 in the direction of long side of the second linear pattern 78 on the side of the light shielding region 73 for forming the drain electrode. To be the same or larger. In the fourth embodiment, a photomask 70b that satisfies the relationship of the following <Expression 1> to <Expression 3> is used.

<Formula 1> a _m ≧ L × m / (n + 1) and b _m ≧ L × m / (n + 1)
However, m shows the number of arrangement | sequences from the light shielding area side for drain electrode formation of a linear pattern. N represents the total number of linear patterns. In the fourth embodiment, since the number of linear patterns is two, m = 1 and 2, and n = 2. That is, the protrusion length a ₁ and the protrusion length b _{1 in} the long side direction of the first linear pattern 76 b are equal to or greater than the value obtained by dividing the separation distance L between the side ML _D and the side ML _S by 3. Further, the protrusion length a ₂ and the protrusion length b _{2 in} the long side direction of the second linear pattern 78 are further multiplied by 2 to the value obtained by dividing the separation distance L between the side ML _D and the side ML _S by 3. To be greater than or equal to
<Formula 2> c ≧ L and d ≧ L
That is, the protrusion length c and the protrusion length d (see FIG. 3) of the side ML _S protruding from the side ML _D are set to be equal to or greater than the separation distance L.

<Formula 3> a _m−1 ≦ a _m and b _m−1 ≦ b _m
That is, when a plurality of linear patterns are provided, the linear patterns are arranged so as to be spaced apart from each other and substantially parallel to each other, and the protrusions of the linear patterns become larger as they are closer to the light shielding region for forming the source electrode. However, adjacent linear patterns may have a structure that does not protrude from each other. In the fourth embodiment, a ₂ ≧ a ₁ and b ₂ ≧ b ₁ are satisfied. In other words, the protruding lengths a ₁ and b ₁ in the long side direction of the first linear pattern 76b protruding from the side ML _D are the protruding lengths in the long side direction of the second linear pattern 78 protruding from the side ML _D. a ₂ and b ₂ or less.

Furthermore, it is preferable to satisfy the following <Formula 4> from the viewpoint of preventing a convex portion from being formed at the end of the channel region in the channel width direction.
<Formula 4> c ≧ a _m or / and d ≧ b _m
That is, in the present embodiment 4, _(see FIG. 3) second linear pattern long side direction protruding length of 78 a ₂ and the projecting length b ₂ projecting from the side ML _D, respectively, protrude from the sides ML _D The projection length c and the projection length d (see FIG. 3) of the side ML _{S to be set} are equal to or shorter than those.

  The photomask 70b configured as described above is placed on the top of the resist, and light having a predetermined wavelength is irradiated by the exposure apparatus. Then, in the transmission region of the photomask 70b, the resist is irradiated with light, and this portion becomes an exposed portion. In the drain electrode forming light-shielding region 73 and the source electrode forming light-shielding region 71b, light is shielded, and the resist in that portion becomes an unexposed portion. In the resist located in the lower layer of the semi-transmission region 72b for forming the back channel region, the S-side linear transmission part 75b, the first linear pattern 76b, the second linear pattern 78, the linear inter-pattern transmission part 79, and D The side-line transmission part 77b forms a semi-exposure part with a smaller amount of light irradiation than the exposure part.

  After the exposure process, the resist is developed. As a result, as described in the first embodiment, a first resist pattern having two step structures in the film thickness direction can be obtained between the unexposed portion and the half-exposed portion. The first resist pattern includes a source electrode formation pattern formed by transferring the source electrode formation light shielding region 71b formed on the photomask 70b and a drain electrode formed by transferring the drain electrode formation light shielding region 73 formed on the photomask 70b. By the electrode formation pattern, the first linear pattern 76b, the second linear pattern 78, the inter-linear pattern transmission part 79, the S-side linear transmission part 75b, and the D-side linear transmission part 77b formed on the photomask 70b. The formed half-exposure portion includes a back channel region forming pattern to which the transferred portion is transferred.

  The back channel region forming pattern is formed in the channel width direction from both ends of the side of the drain electrode forming pattern facing the source electrode forming pattern toward the side of the source electrode forming pattern facing the drain electrode forming pattern. It becomes the shape which width expands substantially continuously at both ends. Subsequently, an etching process is performed, and a second resist pattern is formed by the same method as in the first embodiment by ashing. Then, back channels are formed by the same method as in the first embodiment, and these are covered with an interlayer insulating film. By such a process, as in the first embodiment, the channel region has a shape in which the channel width is substantially continuously increased on both sides from each end of the drain region toward the source region. it can. As a result, the ON characteristics of the TFT are excellently stabilized, and the current driving capability can be improved.

  According to the fourth embodiment, it is particularly effective when the channel length of the channel region is large, and the same effect as in the first embodiment can be obtained while increasing the degree of freedom in designing the channel region. In the fourth embodiment, an example in which there are two linear patterns has been described. However, this is only an example, and a structure having a plurality of linear patterns can be employed. In the case of having a plurality of linear patterns, the plurality of linear patterns are spaced apart from each other and arranged substantially in parallel so that adjacent linear patterns do not protrude or are closer to the light-shielding region for forming the source electrode. In addition, it is preferable to arrange the linear patterns so that the protruding lengths of the linear patterns become large because the channel region having the above-described configuration can be easily obtained.

[Embodiment 5]
The basic configuration of the photomask according to the fifth embodiment is the same as that of the second embodiment except for the following points. That is, in the second embodiment, the semi-transmission region 72 for forming the back channel region is composed of a line and a space made up of a linear pattern and a linear transmission portion, whereas in the fifth embodiment, The difference is that the transflective region 72 for forming the back channel region is constituted by a geometric pattern mask.

  FIG. 9A is a plan view of a photomask 70c according to the fifth embodiment, and FIG. 9B is a partially enlarged view of a transflective region 72c for forming a back channel region of the photomask 70c.

As shown in FIG. 9A, the photomask 70c has a source electrode forming light-shielding region 71c, a drain electrode forming light-shielding region 73, and a back channel region forming pattern having a pattern less than the resolution limit with respect to the light to be exposed. A semi-transmissive region 72c for use. The source electrode forming light shielding region 71c and the drain electrode forming light shielding region 73 are constituted by a light shielding part that shields light during exposure. The source electrode forming light-shielding region 71c is formed in a pattern so that a source electrode is finally obtained, and the drain electrode forming light-shielding region 73 is formed in a pattern so that a drain electrode is finally obtained. Here, the sides of the drain electrode forming light-shielding region 73 opposed to the side of the source electrode forming the light-shielding region 71c of the side ML S _c, a source electrode forming the light-shielding region 71c and the opposite side of the drain electrode forming light-shielding region 73 Let the side be the side ML _D c.

Between the drain electrode forming light shielding region 73 and the source electrode forming light shielding region 71c, a semi-transmissive region 72c for forming a back channel region is disposed. The transflective region 72 for forming the back channel region is a source facing the drain electrode forming light shielding region 73 from both ends of the side ML _D c of the drain electrode forming light shielding region 73 facing the source electrode forming light shielding region 71c. towards the side ML S _c of the electrode forming the light-shielding region 71c, substantially continuously width on both sides are constituted by a mask of a shape to expand. As shown in FIG. 9B, the mask portion is constituted by a mesh-shaped pattern mask which is a geometric pattern having a dimension less than the resolution limit with respect to the exposure light.

  By using the photomask 70c, the back channel region forming pattern of the first resist pattern is substantially on both sides from both ends of the side of the drain electrode forming pattern toward the side of the source electrode forming pattern. The width can be continuously increased. Then, through the same process as in the first embodiment, the channel region 12 has a structure similar to that in the second embodiment, in which the channel width increases substantially continuously from the drain region 23 toward the source region 21. Can be obtained.

  The geometric pattern of the photomask is not limited to a mesh shape. In addition, a wide array of geometric patterns arranged in a slit or lattice shape can be used. Further, instead of the geometric pattern mask, the translucent region may be configured by a pattern mask (halftone mask) such as a translucent film having transmittance.

According to the fifth embodiment, it is not always necessary to satisfy the condition of the above <Expression 1> that is required to be satisfied in the first embodiment. That is, the present invention can be applied even when the protruding length c and the protruding length d (see FIG. 3) of the side ML _S protruding from the side ML _D are smaller than the separation distance L. Further, the width of the channel region in the channel direction can be substantially continuously increased toward the source electrode regardless of the shape of the side wall PSw _{S of the} source electrode and the side wall PSw _D of the drain electrode. Therefore, the degree of freedom in designing the TFT can be increased. This is particularly effective when the width of the source electrode 31a in the channel direction is small.

  In the first to fifth embodiments, an example using a positive photoresist has been described. However, a negative photoresist may be used. In that case, the light shielding part and the transmission part of the photomask are reversed.

  In the first to fifth embodiments, the example in which the channel width direction of the channel region is enlarged at substantially the same angle from the drain region to the source region has been described. It is not limited to the example expanded by.

Further, as the photomask, the back channel region forming pattern 52 of the first resist pattern 50 is, from both ends of the side RL _D of the drain electrode forming pattern 53, toward the sides RL _S of the source electrode forming pattern 51 In addition to the above-described embodiment, a known half-tone mask technique, a gray-tone mask technique, or a combination thereof may be used as long as it can be formed so that the width is substantially continuously increased on both sides. Can be used.

Further, although the example has been described in which the side wall PSw _S of the source electrode facing the drain electrode and the side wall PSw _D of the drain electrode 33 facing the source electrode 31 are arranged to face each other substantially in parallel, the present invention is limited to this. If the width of the PSw _{S in} the channel direction is longer than the width of the PSw _{D in} the channel direction and there are non-opposing regions with the PSw _D at both ends of the PSw _S , the shape of the side wall portion is not limited. For example, a curved shape, a U-shape, a zigzag shape, or the like may be used.

  FIG. 10 shows an example of a modification of the photomask applicable to the present invention. As shown in FIG. 10, the photomask 70d includes a source electrode forming light-shielding region 71d, a drain electrode forming light-shielding region 73d, and a half for forming a back channel region having a pattern less than the resolution limit with respect to light to be exposed. A transmissive region 72d is provided. The source electrode forming light shielding region 71d and the drain electrode forming light shielding region 73d are configured by a light shielding portion that shields light during exposure. The source electrode forming light-shielding region 71d is formed in a pattern so that a source electrode is finally obtained, and the drain electrode forming light-shielding region 73d is formed in a pattern so that a drain electrode is finally obtained.

  Between the drain electrode forming light shielding region 73d and the source electrode forming light shielding region 71d, a transflective region 72d for forming a back channel region is disposed. The transflective region 72d for forming the back channel region has a curved linear pattern 76d that is below the resolution limit with respect to the exposure light. Further, an S-side curved transmission portion 75d is provided between the curved linear pattern 76d and the source electrode forming light-shielding region 71d, and a D-side curve is provided between the linear pattern 76d and the drain electrode forming light-shielding region 73d. 77d. The widths in the minor axis direction of the linear pattern 76d, the S-side curved transmission part 75d, and the D-side curved transmission part 77d are the properties of the resist material, the wavelength of light used for exposure, the aperture ratio of the lens, etc. It is set to a value below the exposure resolution limit determined by the optical system.

By using the photomask 70d shown in FIG. 10, a source electrode / drain electrode having a curved shape can be obtained with the sidewall PSw _{S of} the source electrode facing the drain electrode and the sidewall PSw _{D of the} drain electrode facing the source electrode. it can. A channel region in which the channel width CW increases smoothly and continuously on both sides from each end of the drain region toward the source region can be easily obtained. As described above, the source electrode and the drain electrode can be variously modified without departing from the scope of the present invention.

(A) is a top view of the principal part of TFT concerning Embodiment 1, (b) is Ib-Ib cutting part sectional drawing of Fig.1 (a). (A), (b) is sectional drawing for demonstrating the manufacturing process of TFT which concerns on Embodiment 1. FIG. FIG. 3 is a plan view of the photomask according to the first embodiment. (A) is a top view of the 1st resist pattern which concerns on Embodiment 1, (b) is IVb-IVb cutting part sectional drawing of Fig.4 (a). FIG. 5A is a plan view of a second resist pattern according to the first embodiment, FIG. 5B is a cross-sectional view taken along the line Vb-Vb in FIG. 5A, and FIG. Sectional drawing for demonstrating a process. (A) is a top view of the principal part of TFT which concerns on Embodiment 2, (b) is a top view of the photomask which concerns on Embodiment 2. FIG. FIG. 6 is a plan view of a main part of a TFT according to Embodiment 3. FIG. 6 is a plan view of a photomask according to Embodiment 4. (A) is a top view of the photomask which concerns on Embodiment 5, (b) is the elements on larger scale of the photomask which concerns on Embodiment 5. FIG. The top view of the photomask which concerns on a modification. (A) is a top view of the photomask which concerns on the prior art example 1, (b) is a top view of the 1st resist pattern which concerns on the prior art example 1. FIG. (A) is a top view of the photomask which concerns on the prior art example 2, (b) is a top view of the principal part of TFT which concerns on the prior art example 2. FIG. (A) is a top view of the photomask which concerns on the prior art example 3, (b) is a top view of the principal part of TFT which concerns on the prior art example 3. FIG.

Explanation of symbols

1,2,3 TFT
5 Insulating substrate 6 Gate electrode 7 Gate insulating film 8 Interlayer insulating film 10 First semiconductor film 12 Channel region 20 Second semiconductor film 21 Source region 23 Drain region 30 Second conductive film 31 Source electrode 33 Drain electrode 40 Resist 50 First Resist pattern 51 Source electrode formation pattern 52 Back channel region formation pattern 53 Drain electrode formation pattern 60 Second resist pattern 61 Second source electrode formation pattern 63 Second drain electrode formation pattern 70 Photomask 71 Source electrode formation Light-shielding region 72 Semi-transmissive region 73 for forming the back channel region Light-shielding region 74 for forming the drain electrode Transparent substrate 75 S-side linear transmission portion 76 Linear pattern 77 D-side linear transmission portion 80 Thin-film transistor region PSw _S Source facing the drain electrode Side wall PS of electrode _D source electrode and the opposing side walls CW channel region side ML _D source electrode forming the light-shielding region facing the drain electrode of the source electrode forming the light-shielding region facing the width ML _S drain electrode forming the light-shielding region in the channel direction of the drain electrode long side length RL _S of the drain electrode formation pattern opposite to the source electrode formation pattern side RL _D source electrode formation pattern and opposite sides of the drain electrode forming pattern sides MW linear patterns forming light-shielding regions a side ML _D first end portion side of the projecting length b side ML _D long side direction of the second end portion side of the projecting length c side of the linear pattern projecting from the long side direction of the linear pattern projecting from the first short-side direction of the second protrusion length of the end portion side e S side wire-shaped transmissive portion of the end projection length of the side d sides ML _D side protrudes from ML _S sides ML _S projecting from ML _D of the channel length of the distance Cha-L channel region between the width L side ML _D and the side ML _S in the short side direction of the width g D side wire-shaped transmissive portion in the short side direction of the f linear pattern

Claims (7)

A method for manufacturing a thin film transistor, comprising:
Forming a gate electrode on the substrate;
A step of sequentially stacking a gate insulating film, a semiconductor layer, a conductive film, and a resist on the gate electrode;
A step of forming a first resist pattern having a step structure in the thickness direction by a photoengraving process by arranging a photomask on the resist; and
Etching the conductive film and the semiconductor layer using the first resist pattern as a mask;
Forming a second resist pattern such that a thick portion of the first resist pattern remains as a pattern;
Etching the conductive film in a back channel portion using the second resist pattern as a mask and forming a back channel in the semiconductor layer, and
The first resist pattern is:
A source electrode forming pattern in which the source electrode forming light-shielding region formed on the photomask is transferred;
A drain electrode forming pattern in which a drain electrode forming light-shielding region formed on the photomask is transferred;
A back channel region forming pattern formed on the photomask and transferred with a transflective region for forming a back channel region having a pattern below the resolution limit with respect to light to be exposed, and
The back channel region forming pattern, from said opposite end portions of the side RL _D of the drain electrode formation pattern that faces the source electrode forming pattern, the sides of the source electrode forming pattern which faces the drain electrode forming pattern To the RL _S , formed so that the width is substantially continuously increased on both sides,
The source electrode formed from the source electrode forming pattern and the drain electrode formed from the drain electrode forming pattern are arranged such that side walls facing each other are substantially parallel to each other,
The method of manufacturing a thin film transistor, wherein the second resist pattern is obtained by removing the back channel region forming pattern from the first resist pattern. In the manufacturing method of the thin-film transistor of Claim 1,
The semi-transmission region for forming the back channel region in the photomask includes a linear pattern and a linear transmission portion arranged in the same direction at a resolution limit or less with respect to light to be exposed,
The projecting length on the first end side in the long side direction of the linear pattern projecting from the side ML _{D of the} drain electrode forming light shielding region on the side facing the source electrode forming light shielding region is denoted by a _m ,
B _m , the protruding length on the second end side in the long side direction of the linear pattern protruding from the side ML _D ,
The protruding length on the first end side of the side ML _S of the source electrode forming light shielding region on the side facing the drain electrode forming light shielding region, which protrudes from the side ML _D , is c,
The protruding length on the second end side of the side ML _S protruding from the side ML _D is d,
The distance between the side ML _D and the side ML _S is L,
The first end of the linear pattern and the first end of the source electrode are on the same side with respect to the channel width direction, and the second end of the linear pattern and the source electrode When the second end is on the same side with respect to the channel width direction,
The method for producing a thin film transistor, wherein the photomask satisfies the following <formula 1> and <formula 2>.
<Formula 1> a _m ≧ L × m / (n + 1) and b _m ≧ L × m / (n + 1)
(However, m represents an array number when the linear pattern is counted from the drain electrode forming light-shielding region side, and n represents the total number of the linear patterns.)
<Formula 2> c ≧ L and d ≧ L In the manufacturing method of the thin-film transistor of Claim 2,
A plurality of the linear patterns;
The linear patterns are spaced apart from each other and arranged substantially in parallel,
The method for producing a thin film transistor, wherein the photomask satisfies the following <Equation 3>.
<Formula 3> a _m−1 ≦ a _m and b _m−1 ≦ b _m In the manufacturing method of the thin-film transistor of Claim 1,
A method for manufacturing a thin film transistor, comprising: a semi-transmission region for forming the back channel region in the photomask, a geometric pattern mask having a resolution limit or less with respect to light to be exposed. In the manufacturing method of the thin-film transistor of Claim 1,
A method of manufacturing a thin film transistor, comprising a mask made of a film having a transmittance as a semi-transmissive region for forming the back channel region in the photomask. A photomask for manufacturing a reverse stagger type thin film transistor,
A transparent substrate;
A source electrode forming light-shielding region, a drain electrode forming light-shielding region, and a back-channel region forming semi-transparent region having a pattern below the resolution limit with respect to light to be exposed, formed on the transparent substrate. Prepared,
The transflective region for forming the back channel region has a linear pattern arranged in the same direction, and a linear transmission part,
The projecting length on the first end side in the long side direction of the linear pattern projecting from the side ML _{D of the} drain electrode forming light shielding region on the side facing the source electrode forming light shielding region is denoted by a _m ,
B _m , the protruding length on the second end side in the long side direction of the linear pattern protruding from the side ML _D ,
The protruding length on the first end side of the side ML _S of the source electrode forming light shielding region on the side facing the drain electrode forming light shielding region, which protrudes from the side ML _D , is c,
The protruding length on the second end side of the side ML _S protruding from the side ML _D is d,
The distance between the side ML _D and the side ML _S is L,
And, said first end of said first end portion and the source over the source electrode of said linear pattern by the same side with respect to the channel width direction, the source electrode and the second ends of the linear pattern When the second end of the same side is the same side with respect to the channel width direction,
The photomask satisfies <Formula 1> and <Formula 2> below ,
The source electrode formed from the light shielding region for forming the source electrode and the drain electrode formed from the light shielding region for forming the drain electrode are arranged such that side walls facing each other are arranged substantially in parallel. Photomask for manufacturing.
<Formula 1> a _m ≧ L × m / (n + 1) and b _m ≧ L × m / (n + 1)
(However, m represents an array number when the linear pattern is counted from the drain electrode forming light-shielding region side, and n represents the total number of the linear patterns.)
<Formula 2> c ≧ L and d ≧ L The photomask for manufacturing a thin film transistor according to claim 6,
A plurality of the linear patterns;
The linear patterns are spaced apart from each other and arranged substantially in parallel,
A photomask for manufacturing a thin film transistor, wherein the photomask satisfies the following <Equation 3>.
<Formula 3> a _m−1 ≦ a _m and b _m−1 ≦ b _m

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