JP4370844B2 - DC converter - Google Patents

Description

  The present invention relates to a DC converter having high efficiency and low noise.

  FIG. 12 shows a circuit configuration diagram of this type of conventional DC converter (Patent Document 1). The DC converter shown in FIG. 12 is called an active clamp system, and a main switch Q1 made of a MOSFET or the like is connected to a DC power source Vdc1 via a primary winding P (number of turns n1) of a transformer T. A series circuit composed of an auxiliary switch Q2 made of a MOSFET or the like and a capacitor C2 is connected to both ends of the line P.

  A parallel circuit composed of a diode D1 and a capacitor C1 is connected to both ends of the main switch Q1. A diode D2 is connected to both ends of the auxiliary switch Q2. The main switch Q1 and the auxiliary switch Q2 are turned on / off alternately by PWM control of the control circuit 100.

  Further, the primary winding P of the transformer T and the secondary winding S of the transformer T are wound so that opposite phase voltages are generated, and the secondary winding S (number of turns n2) of the transformer T is A rectifying / smoothing circuit comprising a diode D5 and a capacitor C5 is connected. The rectifying / smoothing circuit rectifies and smoothes the voltage induced in the secondary winding S of the transformer T (pulse voltage controlled on / off) and outputs a DC output to the load RL.

  Based on the output voltage of the load RL, the control circuit 100 generates a control signal including pulses for controlling on / off of the main switch Q1, and controls the output voltage to be a predetermined voltage.

  Next, the operation of the DC converter configured as described above will be described with reference to timing charts shown in FIGS. FIG. 13 shows an operation waveform at a heavy load, and FIG. 14 shows an operation waveform at a light load. The voltage Q1v across the main switch Q1, the current Q1i flowing through the main switch Q1, the main switch A gate signal Q1g for on / off control of Q1 is shown, a voltage Q2v across the auxiliary switch Q2, a current Q2i flowing through the auxiliary switch Q2, and a gate signal Q2g for on / off control of the auxiliary switch Q2.

At time _{t 31,} when the main switch Q1 by the gate signal Q1g is turned on, Vdc1 → P → Q1 → Vdc1 current Q1i flows into the main switch Q1, energy is stored in the primary winding P of the transformer T. Current Q1i is, continue to increase with the passage of time until the time _{t 32.}

Then, at time t _32, when the main switch Q1 by the gate signal Q1g is turned off, unbound and induced excitation energy in the primary winding P of the transformer T, a leakage inductor Lg (2 winding S inductance The excitation energy of) charges the capacitor C1. When the voltage of the capacitor C1 becomes equal to the voltage of the capacitor C2, the diode D2 is turned on, and the energy is stored in the capacitor C2.

That is, from time t ₃₂ to time t ₃₃ , current flows through P → D 2 → C 2 → P. While the current flows through the diode D2, the auxiliary switch Q2 can be zero-voltage switched by turning on the auxiliary switch Q2 after the time when the voltage Q2v of the auxiliary switch Q2 becomes zero. At this time, current flows through S → D5 → C5 → S, and most of the energy is released to the output.

Since even after the energy stored in the primary winding P of the transformer T is moved to the capacitor C2 (time _{t 33} ~ time _{t 34),} the auxiliary switch Q2 is turned on, C2 → Q2 → P → C2 Current Q2i flows, and the energy stored in the capacitor C2 moves to the primary winding P of the transformer T.

Then, at time _{t 34} (time _{t 31} same), the auxiliary when the switch is turned off Q2, a current flows in the P → Vdc1 → C1 → P by the energy stored in the primary winding P, a capacitor C1 ( The main switch Q1) is discharged and the voltage decreases. When the main switch Q1 is turned on after the discharge is finished, the main switch Q1 can be zero-voltage switched.

Therefore, the capacitor C2 and the capacitor C5 have the same value through the turn ratio of the transformer T, and this does not change even when the load fluctuates. The voltage of the capacitor C2 is determined by its duty if the input voltage and the main switch Q1 and the auxiliary switch Q2 are alternately turned on / off (the integral value of the positive and negative voltages of the transformer T is zero), which is also a load current. Do not depend. For this reason, in the flyback method (method in which the primary winding and the secondary winding of the transformer T are in opposite phases), as shown in FIGS. 13 and 14, it is related to the load current (load fluctuation). The on / off duty is constant.
JP 2000-92829 A

Further, as shown in FIG. 14, the on / off duty is constant regardless of the fluctuation of the load, and a considerably large circulating current flows at a light load. This circulating current is the current at time TM from time _{t 31} ~ time _{t 32} of the auxiliary switch Q2 at time _{t 35} ~ time _{t 34} current and the main switch Q1 at the time TM until the zero-cross point of the current (for example, time t ₃₃ ) is near the center of the time TM, and the excitation energy and the flyback energy are substantially equal. This loss due to the circulating current causes a reduction in efficiency at light loads.

  It is an object of the present invention to provide a DC converter that can reduce loss by reducing circulating current at light load and can reduce power consumption at light load.

The present invention has the following configuration in order to solve the above problems. According to the first aspect of the present invention, there is provided a first series circuit which is connected to both ends of a DC power source and in which a primary winding of a transformer and a main switch are connected in series; both ends of the main switch or the primary winding of the transformer A rectifying element is connected to a second series circuit in which an auxiliary switch and a capacitor are connected in series, and a secondary winding wound in a phase opposite to the primary winding of the transformer. And a rectifying / smoothing circuit for rectifying and smoothing with a smoothing element, and a control circuit for alternately turning on and off the main switch and the auxiliary switch by a signal having a predetermined switching frequency, the control circuit at light load When the determination is made, a time constant for light load is selected for delaying the off time of the auxiliary switch to shorten the on time, and the auxiliary switch is moved to the main switch at light load according to the selected time constant. Sui Of not turning on the off time allowed to continue off, the main switch said turns off the auxiliary switch from on before turning on, the on-time of the auxiliary switch at this time from OFF time of the main switch of the auxiliary switch It is characterized in that it is shorter than the period until the on time .

According to a second aspect of the present invention, there is provided a series circuit in which a primary winding of a transformer, a capacitor, and a main switch are connected in series, and both ends of the main switch or the primary winding of the transformer. The auxiliary switch connected to both ends of the series circuit of the capacitor and the capacitor, and the voltage generated in the secondary winding wound in the opposite phase to the primary winding of the transformer is rectified and smoothed by the rectifying element and the smoothing element Rectifying and smoothing circuit, and a control circuit for alternately turning on and off the main switch and the auxiliary switch by a signal having a predetermined switching frequency, and when the control circuit is determined to be in light load, the time constant for at light load for which delays the off time of the auxiliary switch shorten the oN time is selected, the time constant is selected, off of the main switching the auxiliary switch in the light load Time allowed to continue off is not on, the main switch turns off the auxiliary switch from on before turning on the on-time of the auxiliary switch the on time of the auxiliary switch from off time of the main switch at this time It is characterized in that it is shorter than the period until .

According to a third aspect of the present invention, in the DC converter according to the first or second aspect of the present invention, the DC conversion device further includes a current detection unit that detects a current flowing through the main switch, and the control circuit includes a current detected by the current detection unit. Determining means for determining whether or not the current value is less than or equal to a threshold value; and OFF for shortening the on time of the auxiliary switch by delaying the off time of the auxiliary switch when the current is less than or equal to the threshold value Delay control means.

According to a fourth aspect of the present invention, in the DC converter according to any one of the first to third aspects, the control circuit reduces the switching frequency at a light load.

According to a fifth aspect of the present invention, in the DC converter according to the fourth aspect , the control circuit shifts to a burst mode in which the switching frequency is further lowered at a light load.

According to a sixth aspect of the present invention, in the DC converter according to the third aspect , the control circuit generates an error voltage signal that includes an error between the output voltage of the smoothing element and a reference voltage; Frequency control means for generating a frequency control signal for reducing the switching frequency in accordance with the value of the error voltage signal when the value of the error voltage signal generated by the voltage generation means reaches a first threshold value; A pulse width for controlling the pulse width based on the output voltage and generating a pulse signal having a reduced switching frequency in accordance with the frequency control signal generated by the frequency control means and outputting the pulse signal to the off-delay control means And a control means.

According to a seventh aspect of the present invention, in the DC converter according to the sixth aspect , the frequency control means has a value of the error voltage signal generated by the error voltage generation means smaller than the first threshold value. When the threshold value of 2 is reached, a transition is made to a burst mode in which the switching frequency is further lowered.

  ADVANTAGE OF THE INVENTION According to this invention, loss can be reduced by reducing the circulating current at the time of light load, and the DC converter which can reduce the power consumption at the time of light load can be provided.

  DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments of a DC converter according to the present invention will be described in detail with reference to the drawings. In the flyback (reverse) control system that supplies energy from the primary side to the secondary side of the transformer when the main switch is off, the DC converter according to the embodiment includes an active clamp circuit including an auxiliary switch and a capacitor. By turning on the auxiliary switch for a short time just before the main switch on time at light load, the circulating current at light load can be reduced to reduce loss and reduce power consumption at light load And

  FIG. 1 is a circuit configuration diagram of the DC converter according to the first embodiment. The DC converter shown in FIG. 1 differs from the DC converter shown in FIG. 12 in the configuration of the control circuit 10, and a resistor R1 (corresponding to the current detecting means of the present invention) is connected in series with the main switch Q1. Therefore, only the configuration of the different parts will be described. In the configuration shown in FIG. 1, the same parts as those shown in FIG.

  Instead of connecting to both ends of the primary winding P, a series circuit composed of the auxiliary switch Q2 and the capacitor C2 may be connected to both ends of the main switch Q1. The diode D1 may be a parasitic diode of the main switch Q1, and the diode D2 may be a parasitic diode of the auxiliary switch Q2. Further, the capacitor C1 may be a parasitic capacitor of the main switch Q1.

  The control circuit 10 turns on the auxiliary switch Q2 for a short time immediately before the on-time of the main switch Q1 during light load. In addition, the control circuit 10 regulates the minimum on-time of the main switch Q1, thereby detecting the increase of the output voltage at the time of light load, and lowering the switching frequency at the time of light load.

  Therefore, the control circuit 10 includes a comparison circuit 11, an oscillator 13, a comparator 15, a bottom detection circuit 17, an on-delay circuit 19, an inverter 20, an off-delay circuit 21, a low-side driver 23, a high-side driver 25, and a comparison circuit 27. ing. FIG. 2 shows a specific circuit configuration diagram of the control circuit, which will be described later.

  The comparison circuit 11 (corresponding to the error voltage generating means of the present invention) generates an error voltage signal composed of an error between the voltage of the capacitor C5 and the reference voltage, and outputs this error voltage signal to the comparator 15 as a feedback signal FB. The comparison circuit 11 determines that the load is light when the feedback signal FB is equal to or lower than the first threshold value, and outputs, for example, an H level to the oscillator 13.

  The oscillator 13 (corresponding to the frequency control means of the present invention) is the voltage of the error voltage signal from the comparison circuit 11 when the feedback signal FB is below the first threshold value, that is, when the load is light. A triangular wave signal (corresponding to the frequency control signal of the present invention) having a reduced switching frequency according to the value is generated.

  The comparator 15 (corresponding to the pulse width control means of the present invention) inputs the triangular wave signal from the oscillator 13 and the feedback signal FB from the comparison circuit 11, and turns on when the value of the feedback signal FB is equal to or greater than the value of the triangular wave signal. Thus, a pulse signal that is turned off when the value of the feedback signal FB is less than the value of the triangular wave signal is generated, and the pulse signal is output to the on-delay circuit 19 and the inverter 20.

  The bottom detection circuit 17 detects the minimum voltage (hereinafter referred to as a bottom detection signal) of the main switch Q1 after the auxiliary switch Q2 is turned off. The on-delay circuit 19 generates an on-delay signal for turning on the main switch Q1 at the time of the minimum voltage of the main switch Q1 based on the bottom detection signal from the bottom detection circuit 17 and the pulse signal from the comparator 15. The low-side driver 23 applies the on-delay signal from the on-delay circuit 19 to the gate of the main switch Q1 to drive the main switch Q1.

  The inverter 20 inverts the pulse signal from the comparator 15 and outputs it to the off-delay circuit 21. The comparison circuit 27 detects the voltage of the resistor R1 generated by the current of the main switch Q1 flowing through the resistor R1, compares the detected voltage with the threshold voltage, and if the detected voltage is equal to or lower than the threshold voltage, If it is determined that there is a load, a delay signal for delaying the off time of the auxiliary switch Q2 to shorten the on time is output to the off-delay circuit 21. The off-delay circuit 21 generates an off-delay signal based on the pulse signal inverted by the inverter 20 and the delay signal from the comparison circuit 27 and outputs the off-delay signal to the high side driver 25. The high side driver 25 applies the off-delay signal from the off-delay circuit 21 to the gate of the auxiliary switch Q2 to drive the auxiliary switch Q2.

  Next, the operation of the DC converter according to the first embodiment configured as described above will be described with reference to the timing chart shown in FIG. FIG. 6 shows an operation waveform at a light load. The voltage Q1v across the main switch Q1, the current Q1i flowing through the main switch Q1, the gate signal Q1g for controlling on / off of the main switch Q1, and the auxiliary switch Q2 2 shows a voltage Q2v between the two terminals, a current Q2i flowing through the auxiliary switch Q2, and a gate signal Q2g for controlling on / off of the auxiliary switch Q2.

  Further, the operation at the heavy load is the same as the operation at the heavy load of the conventional DC converter, and the same operation as the timing chart of FIG. 13 is performed, so the description of the operation at the heavy load is omitted. Here, the operation at light load will be described with reference to FIG.

  First, at the time of heavy load, as shown in FIG. 13, the on / off duty of the gate signal Q2g of the auxiliary switch Q2 is about 50% in this example. The current flowing through the main switch Q1 is reduced. For this reason, the comparison circuit 27 detects the voltage of the resistor R1 generated by the current of the main switch Q1 flowing through the resistor R1, and determines that the load is light when the detected voltage is lower than the reference voltage. A delay signal for delaying the off time to shorten the on time is output to the off-delay circuit 21.

The off-delay circuit 21 generates a gate signal Q2g shown in FIG. 6 as an off-delay signal based on the pulse signal inverted by the inverter 20 and the delayed signal from the comparison circuit 27. That is, the gate signal Q2g shown in FIG. 6, the on-time (for example, time _{t 1} ~ time _{t 2)} becomes short. From time t ₁ to time t ₂ , the gate signal Q2g is applied to the gate of the auxiliary switch Q2 via the high side driver 25, and the auxiliary switch Q2 is turned on.

  That is, since the ON time of the auxiliary switch Q2 is short, the circulating current (reactive current) of C2, Q2, P, and C2 can be reduced. Thereby, the efficiency at the time of a light load can be improved.

  However, since the on-time of the auxiliary switch Q2 is short, the voltage of the main switch Q1 becomes oscillating. However, as shown in FIG. 6, the auxiliary switch Q2 is turned on at the peak of the voltage of the main switch Q1. If so, switching loss can be reduced.

Then, at time _{t 2, the} when to turn off the auxiliary switch Q2, the voltage of the current flows in the P → Vdc1 → C1 → P by the energy stored in the primary winding P, a capacitor C1 (the main switch Q1) is It goes down. At this time, the bottom detection circuit 17 detects the minimum voltage of the main switch Q1, that is, the bottom. Then, the on-delay circuit 19 generates a gate signal Q1g, which is an on-delay signal for turning on the main switch Q1, at the time of the minimum voltage of the main switch Q1, and the main switch Q1 is turned on by this gate signal Q1g. That is, the switching loss of the main switch Q1 can be reduced (bottom voltage switching) by turning on at the bottom of the voltage of the main switch Q1.

When the main switch Q1 is turned on, a current Q1i flows through the main switch Q1 as Vdc1 → P → Q1 → Vdc1. This current Q1i is gradually linearly increased with time until time t _3.

Then, at time t _3, when the main switch Q1 by the gate signal Q1g is turned off, the induced excitation energy in the primary winding P of the transformer T, the excitation energy of the leakage inductor Lg is to charge the capacitor C1. When the voltage of the capacitor C1 becomes equal to the voltage of the capacitor C2, the diode D2 is turned on and the energy is stored in the capacitor C2. That is, from time t ₃ to time t ₄ , current flows through P → D 2 → C 2 → P.

Next, an operation for reducing the switching frequency at light load will be described. First, if the control circuit 10 defines the minimum on-time of the main switch Q1 and does not shorten it further, the output voltage of the capacitor C5 tends to increase when the load is light. At this time, the comparison circuit 11 generates an error voltage signal including an error between the voltage of the capacitor C5 and the reference voltage, and outputs this error voltage signal to the comparator 15 as a feedback signal FB. The comparison circuit 11, when the feedback signal FB becomes the first threshold value V ₁ or less, it is determined that a light load, and outputs for example the H level to the oscillator 13.

Next, the oscillator 13 sets the switching frequency according to the voltage value of the error voltage signal from the comparison circuit 11 when the feedback signal FB becomes equal to or lower than the first threshold value, that is, when the load is light. A reduced triangular wave signal is generated. For example, as shown in FIG. 3, as the voltage of the feedback signal FB decreases as V ₁ and V ₂ , the switching frequency is decreased as f ₁ and f ₂ . As shown in FIG. 5, this usually means that the switching frequency is 100 KHz, for example, and corresponds to lowering the switching frequency according to the load factor when the load is light.

  Next, the comparator 15 receives the triangular wave signal from the oscillator 13 and the feedback signal FB from the comparison circuit 11, and is turned on when the value of the feedback signal FB is equal to or larger than the value of the triangular wave signal, and the value of the feedback signal FB is A pulse signal that is turned off when the value is less than the value of the triangular wave signal is generated, and the pulse signal is output to the on-delay circuit 19 and the inverter 20.

As shown in FIG. 4, when the value of the feedback signal FB is V ₁ was, by the triangular wave signal of frequency f ₁ corresponding to the voltage V _1, the pulse signal of the frequency f ₁ is generated, the value of the feedback signal FB when the voltage V ₂ is a triangular wave signal of frequency f ₂ corresponding to the voltage V _2, the pulse signal of frequency f ₂ is generated. That is, when the load is light, the switching frequency is lowered, so that the switching loss can be further reduced.

  In the oscillator 13, as shown in FIG. 7, when the lower limit of the switching frequency is set to a frequency slightly higher than the audible frequency (for example, 20 KHz) and the frequency is lowered to this frequency according to the load factor, If the frequency drops, the mode is shifted to the burst mode. In the burst mode, as shown in FIG. 8, a burst of about 3 pulses with a frequency of 50 to 100 Hz, for example, is inserted. By operating in this way, it is possible to prevent the transformer T from being audible at an audible frequency and to reduce the switching loss at the time of further light load.

(Specific circuit configuration)
FIG. 2 is a specific circuit configuration diagram of a control circuit provided in the DC converter according to the first embodiment. The comparison circuit 11 illustrated in FIG. 2 includes an error amplifier 111 and a comparator 113. The error amplifier 111, the voltage of the capacitor C5 - is input to the terminal, the reference voltage V ₀ is input to the + terminal, this error and generates an error voltage signal composed of the error between the voltage and the reference voltage V ₀ which capacitor C5 The voltage signal is output to the comparator 15 as a feedback signal FB.

Comparator 113, the feedback signal FB from the error amplifier 111 is - being input to the terminal, the reference voltages V ₁ is input to the + terminal, the resistor R4 is connected between the output terminal and the power source Vcc, the reference feedback signal FB it is determined that the load is light if it becomes voltages V ₁ or less, and outputs the VCO131 constituting the oscillator 13, for example, H level.

VCO131 is a voltage controlled oscillator for generating a signal having a frequency corresponding to a voltage value, when inputting the H level from the comparator 113, i.e., when the feedback signal FB becomes the reference voltages V ₁ or less, the error amplifier A triangular wave signal having a switching frequency lowered according to the voltage value of the error voltage signal from 111 is generated.

  The comparator 15 is turned on when the feedback signal FB from the error amplifier 111 is input to the + terminal, the triangular wave signal from the VCO 131 is input to the − terminal, and the value of the feedback signal FB is greater than or equal to the value of the triangular wave signal. A pulse signal that is turned off when the value of FB is less than the value of the triangular wave signal is generated, and the pulse signal is output to the on-delay circuit 19 and the inverter 20.

  In the bottom detection circuit 17, the cathode of the diode D7, one end of the resistor R5, and one end of the resistor R7 are connected to the base of the transistor Q3, and the emitter of the transistor Q3 is connected to the anode of the diode D7 and grounded. . One end of a resistor R6 is connected to the collector of the transistor Q3, and the other end of the resistor R5 and the other end of the resistor R6 are connected to the power supply Vcc. The other end of the resistor R7 is connected to the drain of the main switch Q1 via the capacitor C7. The collector of the transistor Q3 is connected to the inverter 191 of the on-delay circuit 19.

  In the on-delay circuit 19, the output of the comparator 15 is connected to the cathode of the diode D8 via the buffer 192, and the anode of the diode D8 is connected to one end of the capacitor C8 and one end of the resistor R8. The other end of the capacitor C8 is grounded, and the other end of the resistor R8 is connected to the power source Vcc. A connection point between the resistor R8 and the capacitor C8 is connected to the gate of the main switch Q1 through the low side driver 23. The output of the inverter 191 is connected to the cathode of the diode D8.

  In the off-delay circuit 21, the output of the inverter 20 is connected to the cathode of the diode D9 via the buffer 211, and the anode of the diode D9 is connected to one end of the capacitor C9 and one end of the resistor R9. The other end of the resistor R9 is connected to the power source Vcc, and the other end of the capacitor C9 is grounded. A series circuit of a switch S1 and a capacitor C10 is connected to both ends of the capacitor C9. The output of the buffer 212 is connected to the control terminal of the switch S1, and the input of the buffer 212 is connected to the output of the comparator 271. A connection point between the resistor R9 and the capacitor C9 is connected to the gate of the auxiliary switch Q2 via the high side driver 25.

In the comparison circuit 27, the comparator 271 has a detection signal from the resistor R1 input to the − terminal, a reference voltage _Er input to the + terminal, a resistor R10 connected between the output terminal and the power supply Vcc, and a feedback signal. FB is determined to be a light load when it becomes the reference voltages V ₁ or less, for example, the H level is output to the switch S1 via the buffer 212 to turn on the switch S1.

According to such a specific circuit, the error amplifier 111, a comparator 113, VCO 131, and is provided with the comparator 15, as shown in FIG. 4, when the value of the feedback signal FB is _{V 1} was, voltage V the triangular wave signal of frequency f ₁ corresponding to _1, is generated a pulse signal of a frequency f _1, when the value of the feedback signal FB voltage V ₂ is a triangular wave signal of frequency f ₂ corresponding to the voltage V _2, pulse signal of frequency f ₂ is generated. That is, when the load is light, the switching frequency is lowered, so that the switching loss can be further reduced.

Further, when the load is light, the maximum current flowing from the main switch Q1 to the resistor R1 is small, so that the voltage input from the resistor R1 to the negative terminal of the comparator 271 is smaller than the reference voltage _Er . Therefore, an H level signal is output from the comparator 271. Since this H level signal is applied to the switch S1 via the buffer 212, the switch S1 is turned on, and the capacitor C9 and the capacitor C10 are connected in parallel. For this reason, since the time constant of C and R becomes large, the charging time to the capacitor C9 and the capacitor C10 becomes long, and the off time of the auxiliary switch Q2 becomes long. That is, since the on-time of the auxiliary switch Q2 becomes short, the circulating current can be reduced.

  The comparison circuit 27 may be a circuit that compares an average value of the current flowing through the resistor R1 with a threshold value.

Next, at time _{t 2} shown in FIG. 6, when the voltage Q1v a minimum value (bottom), Vdc1 → P → C7 → R7 → Q3 or by Vcc → R5 → Q3 and current flows, the transistor Q3 is turned on . Therefore, the bottom detection circuit 17 detects the minimum value (bottom) of the voltage Q1v. At this time, the L level bottom detection signal is output from the collector of the transistor Q3 to the inverter 191, and this bottom detection signal is inverted by the inverter 191, and the H level is input to the cathode of the diode D8.

  For this reason, the diode D8 is turned off, a current flows from the power supply Vcc to the capacitor C8 via the resistor R8, and the voltage of the capacitor C8 increases. Therefore, the voltage of the capacitor C8 is output to the low-side driver 23 and the gate signal Q1g is applied to the gate of the main switch Q1, so that the main switch Q1 is turned on. That is, since the switch is turned on at the bottom of the main switch Q1, the switching loss of the main switch Q1 can be reduced (bottom voltage switching).

  Next, a DC converter according to a second embodiment will be described. The direct-current converter according to the second embodiment is characterized in that the on-time of the auxiliary switch Q2 is set to a short time even during a heavy load, as in a light load.

  FIG. 9 is a circuit configuration diagram showing a DC converter according to the second embodiment. The DC converter according to the second embodiment shown in FIG. 9 is different from the DC converter according to the first embodiment shown in FIG. 1 in that the resistor R1 and the comparison circuit 27 are deleted, and the off-delay circuit 21a. Since the other configuration is the same as that shown in FIG. 1, the same reference numerals are given to the same parts.

  The off-delay circuit 21a generates a signal for delaying the off time of the auxiliary switch Q2 to shorten the on time regardless of whether the load is heavy or light. Specifically, in the off-delay circuit 21 shown in FIG. 2, the off-time is extended by using a capacitor C9 and a capacitor C10 connected in parallel. Accordingly, the on-time of the auxiliary switch Q2 becomes a short time as a result, so that the circulating current can be reduced.

  The timing chart at light load is the same as the timing chart shown in FIG. A timing chart at the time of heavy load is shown in FIG. As shown in FIG. 10, the ON time of the gate signal Q2g is the same as the ON time of the gate signal Q2g at the time of light load shown in FIG.

  As described above, according to the DC converter according to the second embodiment, the on-time of the auxiliary switch Q2 is set to a short time in the heavy load as well as in the light load. Therefore, the comparison circuit as shown in FIG. 27 becomes unnecessary, and the control circuit 10a can be simplified.

  Next, a DC converter according to a third embodiment will be described. FIG. 11 is a circuit configuration diagram showing a DC converter according to the third embodiment.

  In FIG. 11, a series circuit of a primary winding P of the transformer T, a capacitor C2, and a main switch Q1 is connected to both ends of the DC power supply Vdc1. A series circuit of a capacitor C2 and an auxiliary switch Q2 is connected to both ends of the primary winding P of the transformer T. A diode D2 is connected to both ends of the auxiliary switch Q2.

  The other configurations are the same as the configurations shown in FIG. 1, and the same portions are denoted by the same reference numerals and the description thereof is omitted.

  As described above, according to the DC converter according to the third embodiment, the voltage of the capacitor C2 becomes equal to the voltage of the capacitor C5 through the turns ratio of the transformer T. For this reason, the on / off duty is not affected by the load, as in the DC converter according to the first embodiment. Therefore, the operation is the same as the operation of the DC converter according to the first embodiment, and the same effect as that of the DC converter according to the first embodiment is obtained. Since the series circuit of the main switch Q1 and the auxiliary switch Q2 is connected in parallel to the DC power supply Vdc1, the maximum voltage applied to the main switch Q1 and the auxiliary switch Q2 becomes the voltage of the DC power supply Vdc1, and the main switch The withstand voltage of Q1 and auxiliary switch Q2 can be small.

  The DC converter of the present invention can be applied to a DC-DC conversion type power supply circuit and an AC-DC conversion type power supply circuit.

It is a circuit block diagram which shows the DC converter which concerns on 1st Embodiment. It is a specific circuit block diagram of the control circuit provided in the DC converter which concerns on 1st Embodiment. It is a figure which shows the characteristic of the oscillator which changes a frequency according to the voltage of a feedback signal. It is a timing chart of the pulse signal which reduced the frequency according to the load factor at the time of light load. It is a figure which shows the characteristic which changes a frequency according to a load factor at the time of light load. It is a timing chart of the signal in each part at the time of light load of the direct-current converter concerning a 1st embodiment. It is a figure which shows the 2nd example which changes a switching frequency according to a load factor. It is a figure which shows the burst of the 2nd example which changes a switching frequency according to a load factor. It is a circuit block diagram which shows the DC converter which concerns on 2nd Embodiment. It is a timing chart of the signal in each part at the time of heavy load of the direct-current converter concerning a 2nd embodiment. It is a circuit block diagram which shows the DC converter which concerns on 3rd Embodiment. It is a circuit block diagram which shows the conventional DC converter. It is a timing chart of the signal in each part at the time of heavy load of the conventional DC converter. It is a timing chart of the signal in each part at the time of light load of the conventional DC converter.

Explanation of symbols

Vdc1 DC power supply 10, 10a, 100 Control circuit Q1 Main switch Q2 Auxiliary switch Q3 Transistor RL Load
R1, R4 to R10 Resistor C1, C5, C7 to C10 Capacitor C2 Capacitor D1, D2, D5, D7 to D9 Diode T Transformer P Primary winding (n1)
S Secondary winding (n2)
11, 27 Comparison circuit 13 Oscillator 15 Comparator 17 Bottom detection circuit 19 On-delay circuit 20 Inverter 21 Off-delay circuit 23 Low-side driver 25 High-side driver

Claims (7)

A first series circuit connected to both ends of the DC power source, wherein the primary winding of the transformer and the main switch are connected in series;
A second series circuit connected to both ends of the main switch or both ends of the primary winding of the transformer, and an auxiliary switch and a capacitor connected in series;
A rectifying / smoothing circuit that rectifies and smoothes a voltage generated in a secondary winding wound in a phase opposite to the primary winding of the transformer with a rectifying element and a smoothing element;
A control circuit for alternately turning on and off the main switch and the auxiliary switch by a signal having a predetermined switching frequency;
When it is determined that the load is light , the control circuit selects a light load time constant for delaying the off time of the auxiliary switch to shorten the on time, and the light time is selected according to the selected time constant. At the time of load , the auxiliary switch is kept on without being turned on at the time of turning off the main switch, and the auxiliary switch is turned off from on before turning on the main switch. A DC converter characterized in that the DC converter is made shorter than a period from an off time of a main switch to an on time of the auxiliary switch . A series circuit connected to both ends of the DC power source, in which the primary winding of the transformer, the capacitor, and the main switch are connected in series;
An auxiliary switch connected to both ends of the main switch or to both ends of a series circuit of a primary winding of the transformer and the capacitor;
A rectifying / smoothing circuit that rectifies and smoothes a voltage generated in a secondary winding wound in a phase opposite to the primary winding of the transformer with a rectifying element and a smoothing element;
A control circuit for alternately turning on and off the main switch and the auxiliary switch by a signal having a predetermined switching frequency;
When it is determined that the load is light , the control circuit selects a light load time constant for delaying the off time of the auxiliary switch to shorten the on time, and the light time is selected according to the selected time constant. At the time of load , the auxiliary switch is kept on without being turned on at the time of turning off the main switch, and the auxiliary switch is turned off from on before turning on the main switch. A DC converter characterized in that the DC converter is made shorter than a period from an off time of a main switch to an on time of the auxiliary switch . Current detection means for detecting a current flowing through the main switch;
  The control circuit includes:
  Determination means for determining whether or not the current detected by the current detection means is equal to or less than a threshold;
  Off-delay control means for shortening the on-time of the auxiliary switch by delaying the off-time of the auxiliary switch when the current falls below the threshold;
The DC converter according to claim 1, further comprising: 4. The DC converter according to claim 1, wherein the control circuit reduces the switching frequency at a light load. 5. 5. The DC converter according to claim 4, wherein the control circuit shifts to a burst mode in which the switching frequency is further lowered at a light load. The control circuit includes:
  Error voltage generation means for generating an error voltage signal comprising an error between the output voltage of the smoothing element and a reference voltage;
  Frequency control for generating a frequency control signal for lowering the switching frequency in accordance with the value of the error voltage signal when the value of the error voltage signal generated by the error voltage generation means reaches a first threshold value Means,
  Pulse width control for controlling a pulse width based on the output voltage and generating a pulse signal having a reduced switching frequency in accordance with the frequency control signal generated by the frequency control means and outputting the pulse signal to the off-delay control means Means,
The DC converter according to claim 3, comprising: The frequency control means further reduces the switching frequency when the value of the error voltage signal generated by the error voltage generation means reaches a second threshold value that is smaller than the first threshold value. 7. The DC converter according to claim 6, wherein the DC converter is shifted to a burst mode.

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